1//===-- RegisterScavenging.h - Machine register scavenging ------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares the machine register scavenger class. It can provide
11// information such as unused register at any point in a machine basic block.
12// It also provides a mechanism to make registers availbale by evicting them
13// to spill slots.
14//
15//===----------------------------------------------------------------------===//
16
17#ifndef LLVM_CODEGEN_REGISTER_SCAVENGING_H
18#define LLVM_CODEGEN_REGISTER_SCAVENGING_H
19
20#include "llvm/CodeGen/MachineBasicBlock.h"
21#include "llvm/CodeGen/MachineRegisterInfo.h"
22#include "llvm/ADT/BitVector.h"
23
24namespace llvm {
25
26class MachineRegisterInfo;
27class TargetRegisterInfo;
28class TargetInstrInfo;
29class TargetRegisterClass;
30
31class RegScavenger {
32  const TargetRegisterInfo *TRI;
33  const TargetInstrInfo *TII;
34  MachineRegisterInfo* MRI;
35  MachineBasicBlock *MBB;
36  MachineBasicBlock::iterator MBBI;
37  unsigned NumPhysRegs;
38
39  /// Tracking - True if RegScavenger is currently tracking the liveness of
40  /// registers.
41  bool Tracking;
42
43  /// ScavengingFrameIndex - Special spill slot used for scavenging a register
44  /// post register allocation.
45  int ScavengingFrameIndex;
46
47  /// ScavengedReg - If none zero, the specific register is currently being
48  /// scavenged. That is, it is spilled to the special scavenging stack slot.
49  unsigned ScavengedReg;
50
51  /// ScavengedRC - Register class of the scavenged register.
52  ///
53  const TargetRegisterClass *ScavengedRC;
54
55  /// ScavengeRestore - Instruction that restores the scavenged register from
56  /// stack.
57  const MachineInstr *ScavengeRestore;
58
59  /// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
60  ///
61  BitVector CalleeSavedRegs;
62
63  /// RegsAvailable - The current state of all the physical registers immediately
64  /// before MBBI. One bit per physical register. If bit is set that means it's
65  /// available, unset means the register is currently being used.
66  BitVector RegsAvailable;
67
68  // These BitVectors are only used internally to forward(). They are members
69  // to avoid frequent reallocations.
70  BitVector KillRegs, DefRegs;
71
72public:
73  RegScavenger()
74    : MBB(NULL), NumPhysRegs(0), Tracking(false),
75      ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}
76
77  /// enterBasicBlock - Start tracking liveness from the begin of the specific
78  /// basic block.
79  void enterBasicBlock(MachineBasicBlock *mbb);
80
81  /// initRegState - allow resetting register state info for multiple
82  /// passes over/within the same function.
83  void initRegState();
84
85  /// forward - Move the internal MBB iterator and update register states.
86  void forward();
87
88  /// forward - Move the internal MBB iterator and update register states until
89  /// it has processed the specific iterator.
90  void forward(MachineBasicBlock::iterator I) {
91    if (!Tracking && MBB->begin() != I) forward();
92    while (MBBI != I) forward();
93  }
94
95  /// skipTo - Move the internal MBB iterator but do not update register states.
96  ///
97  void skipTo(MachineBasicBlock::iterator I) { MBBI = I; }
98
99  /// getRegsUsed - return all registers currently in use in used.
100  void getRegsUsed(BitVector &used, bool includeReserved);
101
102  /// getRegsAvailable - Return all available registers in the register class
103  /// in Mask.
104  BitVector getRegsAvailable(const TargetRegisterClass *RC);
105
106  /// FindUnusedReg - Find a unused register of the specified register class.
107  /// Return 0 if none is found.
108  unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const;
109
110  /// setScavengingFrameIndex / getScavengingFrameIndex - accessor and setter of
111  /// ScavengingFrameIndex.
112  void setScavengingFrameIndex(int FI) { ScavengingFrameIndex = FI; }
113  int getScavengingFrameIndex() const { return ScavengingFrameIndex; }
114
115  /// scavengeRegister - Make a register of the specific register class
116  /// available and do the appropriate bookkeeping. SPAdj is the stack
117  /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
118  /// Returns the scavenged register.
119  unsigned scavengeRegister(const TargetRegisterClass *RegClass,
120                            MachineBasicBlock::iterator I, int SPAdj);
121  unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
122    return scavengeRegister(RegClass, MBBI, SPAdj);
123  }
124
125  /// setUsed - Tell the scavenger a register is used.
126  ///
127  void setUsed(unsigned Reg);
128private:
129  /// isReserved - Returns true if a register is reserved. It is never "unused".
130  bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); }
131
132  /// isUsed / isUnused - Test if a register is currently being used.
133  ///
134  bool isUsed(unsigned Reg) const   {
135    return !RegsAvailable.test(Reg) || isReserved(Reg);
136  }
137
138  /// isAliasUsed - Is Reg or an alias currently in use?
139  bool isAliasUsed(unsigned Reg) const;
140
141  /// setUsed / setUnused - Mark the state of one or a number of registers.
142  ///
143  void setUsed(BitVector &Regs) {
144    RegsAvailable.reset(Regs);
145  }
146  void setUnused(BitVector &Regs) {
147    RegsAvailable |= Regs;
148  }
149
150  /// Add Reg and all its sub-registers to BV.
151  void addRegWithSubRegs(BitVector &BV, unsigned Reg);
152
153  /// findSurvivorReg - Return the candidate register that is unused for the
154  /// longest after StartMI. UseMI is set to the instruction where the search
155  /// stopped.
156  ///
157  /// No more than InstrLimit instructions are inspected.
158  unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
159                           BitVector &Candidates,
160                           unsigned InstrLimit,
161                           MachineBasicBlock::iterator &UseMI);
162
163};
164
165} // End llvm namespace
166
167#endif
168