1/* 2 * Copyright (C) 2014 Apple Inc. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY APPLE INC. ``AS IS'' AND ANY 14 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 16 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR 17 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 18 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 19 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 20 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 21 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 23 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 26#include "config.h" 27#include "FTLDWARFRegister.h" 28 29#if ENABLE(FTL_JIT) 30 31#include "FPRInfo.h" 32#include "GPRInfo.h" 33 34namespace JSC { namespace FTL { 35 36Reg DWARFRegister::reg() const 37{ 38#if CPU(X86_64) 39 if (m_dwarfRegNum >= 0 && m_dwarfRegNum < 16) { 40 switch (dwarfRegNum()) { 41 case 0: 42 return X86Registers::eax; 43 case 1: 44 return X86Registers::edx; 45 case 2: 46 return X86Registers::ecx; 47 case 3: 48 return X86Registers::ebx; 49 case 4: 50 return X86Registers::esi; 51 case 5: 52 return X86Registers::edi; 53 case 6: 54 return X86Registers::ebp; 55 case 7: 56 return X86Registers::esp; 57 default: 58 RELEASE_ASSERT(m_dwarfRegNum < 16); 59 // Registers r8..r15 are numbered sensibly. 60 return static_cast<GPRReg>(m_dwarfRegNum); 61 } 62 } 63 if (m_dwarfRegNum >= 17 && m_dwarfRegNum <= 32) 64 return static_cast<FPRReg>(m_dwarfRegNum - 17); 65#elif CPU(ARM64) 66 if (m_dwarfRegNum >= 0 && m_dwarfRegNum <= 31) 67 return static_cast<GPRReg>(m_dwarfRegNum); 68 if (m_dwarfRegNum >= 64 && m_dwarfRegNum <= 95) 69 return static_cast<FPRReg>(m_dwarfRegNum - 64); 70#endif 71 return Reg(); 72} 73 74void DWARFRegister::dump(PrintStream& out) const 75{ 76 Reg reg = this->reg(); 77 if (!!reg) 78 out.print(reg); 79 else 80 out.print("<unknown:", m_dwarfRegNum, ">"); 81} 82 83} } // namespace JSC::FTL 84 85#endif // ENABLE(FTL_JIT) 86 87