1139749Simp// SPDX-License-Identifier: GPL-2.0 212496Speter// 310015Speter// MediaTek ALSA SoC Audio DAI ADDA Control 434832Speter// 510015Speter// Copyright (c) 2020 MediaTek Inc. 656505Speter// Author: Shane Chien <shane.chien@mediatek.com> 710015Speter// 810015Speter 910015Speter#include <linux/delay.h> 1010015Speter#include <linux/regmap.h> 1110015Speter 1210015Speter#include "mt8192-afe-clk.h" 1310015Speter#include "mt8192-afe-common.h" 1410015Speter#include "mt8192-afe-gpio.h" 1510015Speter#include "mt8192-interconnection.h" 1610015Speter#include "../common/mtk-dai-adda-common.h" 1710015Speter 1810015Speterenum { 1910015Speter UL_IIR_SW = 0, 2010015Speter UL_IIR_5HZ, 2110015Speter UL_IIR_10HZ, 2210015Speter UL_IIR_25HZ, 2310015Speter UL_IIR_50HZ, 2410015Speter UL_IIR_75HZ, 2510015Speter}; 2610015Speter 2710015Speterenum { 2810015Speter AUDIO_SDM_LEVEL_MUTE = 0, 2910015Speter AUDIO_SDM_LEVEL_NORMAL = 0x1d, 3010015Speter /* if you change level normal */ 3110015Speter /* you need to change formula of hp impedance and dc trim too */ 3210015Speter}; 3310015Speter 3410015Speterenum { 35119419Sobrien AUDIO_SDM_2ND = 0, 36119419Sobrien AUDIO_SDM_3RD, 37119419Sobrien}; 3810015Speter 3934832Speter#define SDM_AUTO_RESET_THRESHOLD 0x190000 4034832Speter 4156505Speter/* dai component */ 4210015Speterstatic const struct snd_kcontrol_new mtk_adda_dl_ch1_mix[] = { 4310015Speter SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1", AFE_CONN3, I_DL1_CH1, 1, 0), 4431778Seivind SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH1", AFE_CONN3, I_DL12_CH1, 1, 0), 4532929Seivind SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1", AFE_CONN3, I_DL2_CH1, 1, 0), 46166091Smarius SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH1", AFE_CONN3, I_DL3_CH1, 1, 0), 4731778Seivind SOC_DAPM_SINGLE_AUTODISABLE("DL4_CH1", AFE_CONN3_1, I_DL4_CH1, 1, 0), 4810015Speter SOC_DAPM_SINGLE_AUTODISABLE("DL5_CH1", AFE_CONN3_1, I_DL5_CH1, 1, 0), 4910015Speter SOC_DAPM_SINGLE_AUTODISABLE("DL6_CH1", AFE_CONN3_1, I_DL6_CH1, 1, 0), 50136058Sphk SOC_DAPM_SINGLE_AUTODISABLE("DL8_CH1", AFE_CONN3_1, I_DL8_CH1, 1, 0), 5110015Speter SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH3", AFE_CONN3, 5210015Speter I_ADDA_UL_CH3, 1, 0), 5324131Sbde SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2", AFE_CONN3, 5410015Speter I_ADDA_UL_CH2, 1, 0), 5510015Speter SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1", AFE_CONN3, 56164033Srwatson I_ADDA_UL_CH1, 1, 0), 5715683Speter SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH1", AFE_CONN3, 5856498Speter I_GAIN1_OUT_CH1, 1, 0), 5956498Speter SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH1", AFE_CONN3, 6056498Speter I_PCM_1_CAP_CH1, 1, 0), 6156498Speter SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH1", AFE_CONN3, 6210015Speter I_PCM_2_CAP_CH1, 1, 0), 6310015Speter SOC_DAPM_SINGLE_AUTODISABLE("SRC_1_OUT_CH1", AFE_CONN3_1, 6412659Sbde I_SRC_1_OUT_CH1, 1, 0), 6512662Sdg SOC_DAPM_SINGLE_AUTODISABLE("SRC_2_OUT_CH1", AFE_CONN3_1, 6612659Sbde I_SRC_2_OUT_CH1, 1, 0), 6713353Speter}; 6810015Speter 6956498Speterstatic const struct snd_kcontrol_new mtk_adda_dl_ch2_mix[] = { 7056505Speter SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1", AFE_CONN4, I_DL1_CH1, 1, 0), 7156498Speter SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH2", AFE_CONN4, I_DL1_CH2, 1, 0), 7256498Speter SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH2", AFE_CONN4, I_DL12_CH2, 1, 0), 7310015Speter SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1", AFE_CONN4, I_DL2_CH1, 1, 0), 7410015Speter SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH2", AFE_CONN4, I_DL2_CH2, 1, 0), 7534832Speter SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH1", AFE_CONN4, I_DL3_CH1, 1, 0), 7634832Speter SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH2", AFE_CONN4, I_DL3_CH2, 1, 0), 7710015Speter SOC_DAPM_SINGLE_AUTODISABLE("DL4_CH2", AFE_CONN4_1, I_DL4_CH2, 1, 0), 7834832Speter SOC_DAPM_SINGLE_AUTODISABLE("DL5_CH2", AFE_CONN4_1, I_DL5_CH2, 1, 0), 7934832Speter SOC_DAPM_SINGLE_AUTODISABLE("DL6_CH2", AFE_CONN4_1, I_DL6_CH2, 1, 0), 8033395Speter SOC_DAPM_SINGLE_AUTODISABLE("DL8_CH2", AFE_CONN4_1, I_DL8_CH2, 1, 0), 8134832Speter SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH3", AFE_CONN4, 8210015Speter I_ADDA_UL_CH3, 1, 0), 8310015Speter SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2", AFE_CONN4, 84182871Speter I_ADDA_UL_CH2, 1, 0), 85179589Speter SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1", AFE_CONN4, 8617547Speter I_ADDA_UL_CH1, 1, 0), 87179589Speter SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH2", AFE_CONN4, 8817547Speter I_GAIN1_OUT_CH2, 1, 0), 8912496Speter SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH1", AFE_CONN4, 9034832Speter I_PCM_1_CAP_CH1, 1, 0), 9134832Speter SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH1", AFE_CONN4, 9215639Speter I_PCM_2_CAP_CH1, 1, 0), 9310015Speter SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH2", AFE_CONN4, 9456498Speter I_PCM_1_CAP_CH2, 1, 0), 95130585Sphk SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH2", AFE_CONN4, 96182871Speter I_PCM_2_CAP_CH2, 1, 0), 97182871Speter SOC_DAPM_SINGLE_AUTODISABLE("SRC_1_OUT_CH2", AFE_CONN4_1, 9825047Sbde I_SRC_1_OUT_CH2, 1, 0), 99182871Speter SOC_DAPM_SINGLE_AUTODISABLE("SRC_2_OUT_CH2", AFE_CONN4_1, 10010015Speter I_SRC_2_OUT_CH2, 1, 0), 101182871Speter}; 102182871Speter 103182871Speterstatic const struct snd_kcontrol_new mtk_adda_dl_ch3_mix[] = { 104182871Speter SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1", AFE_CONN52, I_DL1_CH1, 1, 0), 105182871Speter SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH1", AFE_CONN52, I_DL12_CH1, 1, 0), 106182871Speter SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1", AFE_CONN52, I_DL2_CH1, 1, 0), 10756505Speter SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH1", AFE_CONN52, I_DL3_CH1, 1, 0), 10856498Speter SOC_DAPM_SINGLE_AUTODISABLE("DL4_CH1", AFE_CONN52_1, I_DL4_CH1, 1, 0), 10956498Speter SOC_DAPM_SINGLE_AUTODISABLE("DL5_CH1", AFE_CONN52_1, I_DL5_CH1, 1, 0), 11010708Speter SOC_DAPM_SINGLE_AUTODISABLE("DL6_CH1", AFE_CONN52_1, I_DL6_CH1, 1, 0), 111136058Sphk SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH3", AFE_CONN52, 112126080Sphk I_ADDA_UL_CH3, 1, 0), 113136058Sphk SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2", AFE_CONN52, 114111815Sphk I_ADDA_UL_CH2, 1, 0), 115126080Sphk SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1", AFE_CONN52, 11638485Sbde I_ADDA_UL_CH1, 1, 0), 11712675Sjulian SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH1", AFE_CONN52, 11810962Speter I_GAIN1_OUT_CH1, 1, 0), 11910962Speter SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH1", AFE_CONN52, 120182871Speter I_PCM_1_CAP_CH1, 1, 0), 12110015Speter SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH1", AFE_CONN52, 12234832Speter I_PCM_2_CAP_CH1, 1, 0), 123100743Speter}; 12434832Speter 12556498Speterstatic const struct snd_kcontrol_new mtk_adda_dl_ch4_mix[] = { 12610044Speter SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1", AFE_CONN53, I_DL1_CH1, 1, 0), 12756505Speter SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH2", AFE_CONN53, I_DL1_CH2, 1, 0), 12856498Speter SOC_DAPM_SINGLE_AUTODISABLE("DL12_CH2", AFE_CONN53, I_DL12_CH2, 1, 0), 129182871Speter SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1", AFE_CONN53, I_DL2_CH1, 1, 0), 130182871Speter SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH2", AFE_CONN53, I_DL2_CH2, 1, 0), 131182871Speter SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH1", AFE_CONN53, I_DL3_CH1, 1, 0), 132182871Speter SOC_DAPM_SINGLE_AUTODISABLE("DL3_CH2", AFE_CONN53, I_DL3_CH2, 1, 0), 133182871Speter SOC_DAPM_SINGLE_AUTODISABLE("DL4_CH2", AFE_CONN53_1, I_DL4_CH2, 1, 0), 13412174Speter SOC_DAPM_SINGLE_AUTODISABLE("DL5_CH2", AFE_CONN53_1, I_DL5_CH2, 1, 0), 13510015Speter SOC_DAPM_SINGLE_AUTODISABLE("DL6_CH2", AFE_CONN53_1, I_DL6_CH1, 1, 0), 13610015Speter SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH3", AFE_CONN53, 137182871Speter I_ADDA_UL_CH3, 1, 0), 13850442Speter SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2", AFE_CONN53, 13950442Speter I_ADDA_UL_CH2, 1, 0), 14050442Speter SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1", AFE_CONN53, 14150442Speter I_ADDA_UL_CH1, 1, 0), 14250442Speter SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH2", AFE_CONN53, 14350442Speter I_GAIN1_OUT_CH2, 1, 0), 14450442Speter SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH1", AFE_CONN53, 14550442Speter I_PCM_1_CAP_CH1, 1, 0), 14650442Speter SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH1", AFE_CONN53, 14750442Speter I_PCM_2_CAP_CH1, 1, 0), 14850442Speter SOC_DAPM_SINGLE_AUTODISABLE("PCM_1_CAP_CH2", AFE_CONN53, 14950442Speter I_PCM_1_CAP_CH2, 1, 0), 15050442Speter SOC_DAPM_SINGLE_AUTODISABLE("PCM_2_CAP_CH2", AFE_CONN53, 15150442Speter I_PCM_2_CAP_CH2, 1, 0), 15250442Speter}; 15310015Speter 15410015Speterstatic const struct snd_kcontrol_new mtk_stf_ch1_mix[] = { 15510015Speter SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1", AFE_CONN19, 15610015Speter I_ADDA_UL_CH1, 1, 0), 15715683Speter}; 15856498Speter 15915639Speterstatic const struct snd_kcontrol_new mtk_stf_ch2_mix[] = { 16016403Speter SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2", AFE_CONN20, 16117547Speter I_ADDA_UL_CH2, 1, 0), 16250442Speter}; 16310015Speter 16456498Speterenum { 16510015Speter SUPPLY_SEQ_ADDA_AFE_ON, 16610015Speter SUPPLY_SEQ_ADDA_DL_ON, 16710015Speter SUPPLY_SEQ_ADDA_AUD_PAD_TOP, 16810015Speter SUPPLY_SEQ_ADDA_MTKAIF_CFG, 16910015Speter SUPPLY_SEQ_ADDA6_MTKAIF_CFG, 17010015Speter SUPPLY_SEQ_ADDA_FIFO, 171136058Sphk SUPPLY_SEQ_ADDA_AP_DMIC, 17210015Speter SUPPLY_SEQ_ADDA_UL_ON, 17310015Speter}; 17434832Speter 17510015Speterstatic int mtk_adda_ul_src_dmic(struct mtk_base_afe *afe, int id) 17610015Speter{ 17733395Speter unsigned int reg; 17833395Speter 17933395Speter switch (id) { 18010015Speter case MT8192_DAI_ADDA: 18110015Speter case MT8192_DAI_AP_DMIC: 182179589Speter reg = AFE_ADDA_UL_SRC_CON0; 183179589Speter break; 184179589Speter case MT8192_DAI_ADDA_CH34: 185179589Speter case MT8192_DAI_AP_DMIC_CH34: 186179589Speter reg = AFE_ADDA6_UL_SRC_CON0; 187179589Speter break; 188179589Speter default: 189179589Speter return -EINVAL; 190179589Speter } 191179589Speter 192179589Speter /* dmic mode, 3.25M*/ 193179589Speter regmap_update_bits(afe->regmap, reg, 194179589Speter DIGMIC_3P25M_1P625M_SEL_CTL_MASK_SFT, 195179589Speter 0x0); 196179589Speter regmap_update_bits(afe->regmap, reg, 197179589Speter DMIC_LOW_POWER_MODE_CTL_MASK_SFT, 198179589Speter 0x0); 199179589Speter 200179589Speter /* turn on dmic, ch1, ch2 */ 201179589Speter regmap_update_bits(afe->regmap, reg, 202179589Speter UL_SDM_3_LEVEL_CTL_MASK_SFT, 203179589Speter 0x1 << UL_SDM_3_LEVEL_CTL_SFT); 204179589Speter regmap_update_bits(afe->regmap, reg, 205179589Speter UL_MODE_3P25M_CH1_CTL_MASK_SFT, 206179589Speter 0x1 << UL_MODE_3P25M_CH1_CTL_SFT); 207179589Speter regmap_update_bits(afe->regmap, reg, 208179589Speter UL_MODE_3P25M_CH2_CTL_MASK_SFT, 209179589Speter 0x1 << UL_MODE_3P25M_CH2_CTL_SFT); 21056498Speter return 0; 21156498Speter} 21256498Speter 21356498Speterstatic int mtk_adda_ul_event(struct snd_soc_dapm_widget *w, 21456498Speter struct snd_kcontrol *kcontrol, 21556498Speter int event) 21656498Speter{ 217132771Skan struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); 218132771Skan struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); 219132771Skan struct mt8192_afe_private *afe_priv = afe->platform_priv; 220132771Skan int mtkaif_dmic = afe_priv->mtkaif_dmic; 221132771Skan 22256498Speter switch (event) { 223132771Skan case SND_SOC_DAPM_PRE_PMU: 22456498Speter mt8192_afe_gpio_request(afe->dev, true, MT8192_DAI_ADDA, 1); 22556498Speter 22656498Speter /* update setting to dmic */ 22756498Speter if (mtkaif_dmic) { 228132771Skan /* mtkaif_rxif_data_mode = 1, dmic */ 229132771Skan regmap_update_bits(afe->regmap, AFE_ADDA_MTKAIF_RX_CFG0, 230132771Skan 0x1, 0x1); 231132771Skan 232132771Skan /* dmic mode, 3.25M*/ 23356498Speter regmap_update_bits(afe->regmap, AFE_ADDA_MTKAIF_RX_CFG0, 234132771Skan MTKAIF_RXIF_VOICE_MODE_MASK_SFT, 23556498Speter 0x0); 23656498Speter mtk_adda_ul_src_dmic(afe, MT8192_DAI_ADDA); 23756498Speter } 23856498Speter break; 239132771Skan case SND_SOC_DAPM_POST_PMD: 240132771Skan /* should delayed 1/fs(smallest is 8k) = 125us before afe off */ 241132771Skan usleep_range(125, 135); 242132771Skan mt8192_afe_gpio_request(afe->dev, false, MT8192_DAI_ADDA, 1); 243132771Skan break; 24456498Speter default: 245132771Skan break; 24656498Speter } 24756498Speter 248182871Speter return 0; 249182871Speter} 250182871Speter 251182871Speterstatic int mtk_adda_ch34_ul_event(struct snd_soc_dapm_widget *w, 252182871Speter struct snd_kcontrol *kcontrol, 253182871Speter int event) 254182871Speter{ 255182871Speter struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); 256182871Speter struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); 257182871Speter struct mt8192_afe_private *afe_priv = afe->platform_priv; 258182871Speter int mtkaif_dmic = afe_priv->mtkaif_dmic_ch34; 259182871Speter int mtkaif_adda6_only = afe_priv->mtkaif_adda6_only; 260182871Speter 261182871Speter switch (event) { 262182871Speter case SND_SOC_DAPM_PRE_PMU: 263182871Speter mt8192_afe_gpio_request(afe->dev, true, MT8192_DAI_ADDA_CH34, 264182871Speter 1); 265182871Speter 266182871Speter /* update setting to dmic */ 267182871Speter if (mtkaif_dmic) { 268182871Speter /* mtkaif_rxif_data_mode = 1, dmic */ 269182871Speter regmap_update_bits(afe->regmap, 27034832Speter AFE_ADDA6_MTKAIF_RX_CFG0, 27110015Speter 0x1, 0x1); 27210015Speter 27356505Speter /* dmic mode, 3.25M*/ 27456498Speter regmap_update_bits(afe->regmap, 27510015Speter AFE_ADDA6_MTKAIF_RX_CFG0, 27656498Speter MTKAIF_RXIF_VOICE_MODE_MASK_SFT, 27756498Speter 0x0); 27810015Speter mtk_adda_ul_src_dmic(afe, MT8192_DAI_ADDA_CH34); 279136058Sphk } 28010015Speter 28110015Speter /* when using adda6 without adda enabled, 28210015Speter * RG_ADDA6_MTKAIF_RX_SYNC_WORD2_DISABLE_SFT need to be set or 28310015Speter * data cannot be received. 28410015Speter */ 28512174Speter if (mtkaif_adda6_only) { 28610015Speter regmap_update_bits(afe->regmap, 28756498Speter AFE_ADDA_MTKAIF_SYNCWORD_CFG, 28856498Speter 0x1 << 23, 0x1 << 23); 28910015Speter } 29056505Speter break; 29156505Speter case SND_SOC_DAPM_POST_PMD: 29256505Speter /* should delayed 1/fs(smallest is 8k) = 125us before afe off */ 29356505Speter usleep_range(125, 135); 29456498Speter mt8192_afe_gpio_request(afe->dev, false, MT8192_DAI_ADDA_CH34, 29510015Speter 1); 29656498Speter 29756498Speter /* reset dmic */ 29856498Speter afe_priv->mtkaif_dmic_ch34 = 0; 29956498Speter 30056498Speter if (mtkaif_adda6_only) { 30156498Speter regmap_update_bits(afe->regmap, 30256498Speter AFE_ADDA_MTKAIF_SYNCWORD_CFG, 30356498Speter 0x1 << 23, 0x0 << 23); 30456498Speter } 30533395Speter break; 30633395Speter default: 30733395Speter break; 30810015Speter } 30910015Speter 31010015Speter return 0; 31110015Speter} 31234832Speter 31334832Speterstatic int mtk_adda_pad_top_event(struct snd_soc_dapm_widget *w, 31434832Speter struct snd_kcontrol *kcontrol, 315166091Smarius int event) 31634832Speter{ 31756498Speter struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); 318166091Smarius struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); 31934832Speter struct mt8192_afe_private *afe_priv = afe->platform_priv; 32034832Speter 32134832Speter switch (event) { 32234832Speter case SND_SOC_DAPM_PRE_PMU: 32334832Speter if (afe_priv->mtkaif_protocol == MTKAIF_PROTOCOL_2_CLK_P2) 32434832Speter regmap_write(afe->regmap, AFE_AUD_PAD_TOP, 0x38); 32534832Speter else 32634832Speter regmap_write(afe->regmap, AFE_AUD_PAD_TOP, 0x30); 32734832Speter break; 32834832Speter default: 32934832Speter break; 33034832Speter } 33134832Speter 33234832Speter return 0; 33334832Speter} 33434832Speter 33556498Speterstatic int mtk_adda_mtkaif_cfg_event(struct snd_soc_dapm_widget *w, 33634832Speter struct snd_kcontrol *kcontrol, 33734832Speter int event) 33834832Speter{ 33934832Speter struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); 34034832Speter struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); 34136956Ssteve struct mt8192_afe_private *afe_priv = afe->platform_priv; 34233395Speter int delay_data; 34356498Speter int delay_cycle; 34434832Speter 34534832Speter switch (event) { 34634832Speter case SND_SOC_DAPM_PRE_PMU: 34734832Speter if (afe_priv->mtkaif_protocol == MTKAIF_PROTOCOL_2_CLK_P2) { 34856498Speter /* set protocol 2 */ 34934832Speter regmap_write(afe->regmap, AFE_ADDA_MTKAIF_CFG0, 35034832Speter 0x00010000); 35134832Speter regmap_write(afe->regmap, AFE_ADDA6_MTKAIF_CFG0, 35233395Speter 0x00010000); 35356498Speter 35434832Speter if (snd_soc_dapm_widget_name_cmp(w, "ADDA_MTKAIF_CFG") == 0 && 35534832Speter (afe_priv->mtkaif_chosen_phase[0] < 0 || 35633395Speter afe_priv->mtkaif_chosen_phase[1] < 0)) { 35710015Speter dev_warn(afe->dev, 35834832Speter "%s(), mtkaif_chosen_phase[0/1]:%d/%d\n", 35934832Speter __func__, 36010015Speter afe_priv->mtkaif_chosen_phase[0], 361166091Smarius afe_priv->mtkaif_chosen_phase[1]); 36210015Speter break; 36334832Speter } else if (snd_soc_dapm_widget_name_cmp(w, "ADDA6_MTKAIF_CFG") == 0 && 36434832Speter afe_priv->mtkaif_chosen_phase[2] < 0) { 36556498Speter dev_warn(afe->dev, 36656498Speter "%s(), mtkaif_chosen_phase[2]:%d\n", 36710015Speter __func__, 368166091Smarius afe_priv->mtkaif_chosen_phase[2]); 36933395Speter break; 37034832Speter } 37133395Speter 37233395Speter /* mtkaif_rxif_clkinv_adc inverse for calibration */ 37333395Speter regmap_update_bits(afe->regmap, AFE_ADDA_MTKAIF_CFG0, 37433395Speter MTKAIF_RXIF_CLKINV_ADC_MASK_SFT, 37533395Speter 0x1 << MTKAIF_RXIF_CLKINV_ADC_SFT); 37633395Speter regmap_update_bits(afe->regmap, AFE_ADDA6_MTKAIF_CFG0, 37733395Speter MTKAIF_RXIF_CLKINV_ADC_MASK_SFT, 37833395Speter 0x1 << MTKAIF_RXIF_CLKINV_ADC_SFT); 37933395Speter 38033395Speter /* set delay for ch12 */ 38134832Speter if (afe_priv->mtkaif_phase_cycle[0] >= 38256498Speter afe_priv->mtkaif_phase_cycle[1]) { 38334832Speter delay_data = DELAY_DATA_MISO1; 38434832Speter delay_cycle = afe_priv->mtkaif_phase_cycle[0] - 38556498Speter afe_priv->mtkaif_phase_cycle[1]; 38634832Speter } else { 38734832Speter delay_data = DELAY_DATA_MISO2; 38856498Speter delay_cycle = afe_priv->mtkaif_phase_cycle[1] - 38934832Speter afe_priv->mtkaif_phase_cycle[0]; 39034832Speter } 39156498Speter 39234832Speter regmap_update_bits(afe->regmap, 39334832Speter AFE_ADDA_MTKAIF_RX_CFG2, 39456498Speter MTKAIF_RXIF_DELAY_DATA_MASK_SFT, 39534832Speter delay_data << 39634832Speter MTKAIF_RXIF_DELAY_DATA_SFT); 39734832Speter 39833395Speter regmap_update_bits(afe->regmap, 39910015Speter AFE_ADDA_MTKAIF_RX_CFG2, 40010015Speter MTKAIF_RXIF_DELAY_CYCLE_MASK_SFT, 40110015Speter delay_cycle << 40210015Speter MTKAIF_RXIF_DELAY_CYCLE_SFT); 40310015Speter 40410015Speter /* set delay between ch3 and ch2 */ 40510015Speter if (afe_priv->mtkaif_phase_cycle[2] >= 40656498Speter afe_priv->mtkaif_phase_cycle[1]) { 40710015Speter delay_data = DELAY_DATA_MISO1; /* ch3 */ 40810015Speter delay_cycle = afe_priv->mtkaif_phase_cycle[2] - 40956498Speter afe_priv->mtkaif_phase_cycle[1]; 41010015Speter } else { 41110015Speter delay_data = DELAY_DATA_MISO2; /* ch2 */ 41256498Speter delay_cycle = afe_priv->mtkaif_phase_cycle[1] - 41310015Speter afe_priv->mtkaif_phase_cycle[2]; 41410015Speter } 41510015Speter 41610015Speter regmap_update_bits(afe->regmap, 41710015Speter AFE_ADDA6_MTKAIF_RX_CFG2, 41834832Speter MTKAIF_RXIF_DELAY_DATA_MASK_SFT, 41934832Speter delay_data << 42056498Speter MTKAIF_RXIF_DELAY_DATA_SFT); 42110015Speter regmap_update_bits(afe->regmap, 42210015Speter AFE_ADDA6_MTKAIF_RX_CFG2, 42310015Speter MTKAIF_RXIF_DELAY_CYCLE_MASK_SFT, 42410015Speter delay_cycle << 42510015Speter MTKAIF_RXIF_DELAY_CYCLE_SFT); 42610015Speter } else if (afe_priv->mtkaif_protocol == MTKAIF_PROTOCOL_2) { 42710015Speter regmap_write(afe->regmap, AFE_ADDA_MTKAIF_CFG0, 42810015Speter 0x00010000); 42910015Speter regmap_write(afe->regmap, AFE_ADDA6_MTKAIF_CFG0, 43010015Speter 0x00010000); 43110015Speter } else { 43210015Speter regmap_write(afe->regmap, AFE_ADDA_MTKAIF_CFG0, 0x0); 43310015Speter regmap_write(afe->regmap, AFE_ADDA6_MTKAIF_CFG0, 0x0); 43412174Speter } 43556498Speter break; 43610015Speter default: 43736956Ssteve break; 43834832Speter } 43934832Speter 44034832Speter return 0; 44134832Speter} 44234832Speter 44334832Speterstatic int mtk_adda_dl_event(struct snd_soc_dapm_widget *w, 44434832Speter struct snd_kcontrol *kcontrol, 44534832Speter int event) 44634832Speter{ 44710015Speter struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); 44810015Speter struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); 44910015Speter 45010015Speter switch (event) { 45110015Speter case SND_SOC_DAPM_PRE_PMU: 45210015Speter mt8192_afe_gpio_request(afe->dev, true, MT8192_DAI_ADDA, 0); 45310015Speter break; 45410015Speter case SND_SOC_DAPM_POST_PMD: 45510015Speter /* should delayed 1/fs(smallest is 8k) = 125us before afe off */ 45610015Speter usleep_range(125, 135); 45710015Speter mt8192_afe_gpio_request(afe->dev, false, MT8192_DAI_ADDA, 0); 45834832Speter break; 45910015Speter default: 46056498Speter break; 46110015Speter } 46210015Speter 46310015Speter return 0; 46410015Speter} 46510015Speter 46610015Speterstatic int mtk_adda_ch34_dl_event(struct snd_soc_dapm_widget *w, 46710015Speter struct snd_kcontrol *kcontrol, 46810015Speter int event) 46910015Speter{ 47012174Speter struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); 47134832Speter struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); 47234832Speter 47310015Speter switch (event) { 47434832Speter case SND_SOC_DAPM_PRE_PMU: 47534832Speter mt8192_afe_gpio_request(afe->dev, true, MT8192_DAI_ADDA_CH34, 47634832Speter 0); 47710015Speter break; 47834832Speter case SND_SOC_DAPM_POST_PMD: 47934832Speter /* should delayed 1/fs(smallest is 8k) = 125us before afe off */ 48034832Speter usleep_range(125, 135); 48134832Speter mt8192_afe_gpio_request(afe->dev, false, MT8192_DAI_ADDA_CH34, 48234832Speter 0); 48334832Speter break; 48434832Speter default: 48534832Speter break; 48634832Speter } 48734832Speter 48834832Speter return 0; 48934832Speter} 49034832Speter 49134832Speter/* stf */ 49234832Speterstatic int stf_positive_gain_get(struct snd_kcontrol *kcontrol, 49334832Speter struct snd_ctl_elem_value *ucontrol) 49434832Speter{ 49534832Speter struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol); 49634832Speter struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); 49734832Speter struct mt8192_afe_private *afe_priv = afe->platform_priv; 49834832Speter 49934832Speter ucontrol->value.integer.value[0] = afe_priv->stf_positive_gain_db; 50034832Speter return 0; 50134832Speter} 50234832Speter 50334832Speterstatic int stf_positive_gain_set(struct snd_kcontrol *kcontrol, 50434832Speter struct snd_ctl_elem_value *ucontrol) 50534832Speter{ 50634832Speter struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol); 50734832Speter struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); 50810015Speter struct mt8192_afe_private *afe_priv = afe->platform_priv; 50910015Speter int gain_db = ucontrol->value.integer.value[0]; 51010015Speter bool change = false; 51134832Speter 51210015Speter afe_priv->stf_positive_gain_db = gain_db; 51334832Speter 51434832Speter if (gain_db >= 0 && gain_db <= 24) { 51534832Speter regmap_update_bits_check(afe->regmap, 51634832Speter AFE_SIDETONE_GAIN, 51734832Speter POSITIVE_GAIN_MASK_SFT, 51834832Speter (gain_db / 6) << POSITIVE_GAIN_SFT, 51934832Speter &change); 52034832Speter } else { 52134832Speter return -EINVAL; 52234832Speter } 52334832Speter 52434832Speter return change; 52510015Speter} 52610015Speter 52710015Speterstatic int mt8192_adda_dmic_get(struct snd_kcontrol *kcontrol, 52810015Speter struct snd_ctl_elem_value *ucontrol) 52910015Speter{ 53010015Speter struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol); 53169781Sdwmalone struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); 53210015Speter struct mt8192_afe_private *afe_priv = afe->platform_priv; 53310015Speter 53410015Speter ucontrol->value.integer.value[0] = afe_priv->mtkaif_dmic; 53556498Speter return 0; 53610015Speter} 53710015Speter 53810015Speterstatic int mt8192_adda_dmic_set(struct snd_kcontrol *kcontrol, 53910015Speter struct snd_ctl_elem_value *ucontrol) 54010015Speter{ 54110015Speter struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol); 54210015Speter struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); 54310015Speter struct mt8192_afe_private *afe_priv = afe->platform_priv; 54410015Speter int dmic_on; 54534832Speter bool change; 54610015Speter 54734832Speter dmic_on = ucontrol->value.integer.value[0]; 54834832Speter 54934832Speter change = (afe_priv->mtkaif_dmic != dmic_on) || 55010015Speter (afe_priv->mtkaif_dmic_ch34 != dmic_on); 55134832Speter 55234832Speter afe_priv->mtkaif_dmic = dmic_on; 55334832Speter afe_priv->mtkaif_dmic_ch34 = dmic_on; 55434832Speter 55534832Speter return change; 55634832Speter} 55734832Speter 55834832Speterstatic int mt8192_adda6_only_get(struct snd_kcontrol *kcontrol, 55934832Speter struct snd_ctl_elem_value *ucontrol) 56034832Speter{ 56134832Speter struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol); 56234832Speter struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); 56334832Speter struct mt8192_afe_private *afe_priv = afe->platform_priv; 56434832Speter 56534832Speter ucontrol->value.integer.value[0] = afe_priv->mtkaif_adda6_only; 56610015Speter return 0; 56734832Speter} 56810015Speter 56934832Speterstatic int mt8192_adda6_only_set(struct snd_kcontrol *kcontrol, 57034832Speter struct snd_ctl_elem_value *ucontrol) 57134832Speter{ 57234832Speter struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol); 57334832Speter struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); 57434832Speter struct mt8192_afe_private *afe_priv = afe->platform_priv; 57534832Speter int mtkaif_adda6_only; 57634832Speter bool change; 57734832Speter 57834832Speter mtkaif_adda6_only = ucontrol->value.integer.value[0]; 57934832Speter 58034832Speter change = afe_priv->mtkaif_adda6_only != mtkaif_adda6_only; 58134832Speter afe_priv->mtkaif_adda6_only = mtkaif_adda6_only; 58234832Speter 583136058Sphk return change; 584154081Sjhb} 585154081Sjhb 586136058Sphkstatic const struct snd_kcontrol_new mtk_adda_controls[] = { 587193018Sed SOC_SINGLE("Sidetone_Gain", AFE_SIDETONE_GAIN, 588182871Speter SIDE_TONE_GAIN_SFT, SIDE_TONE_GAIN_MASK, 0), 58934832Speter SOC_SINGLE_EXT("Sidetone_Positive_Gain_dB", SND_SOC_NOPM, 0, 24, 0, 59034832Speter stf_positive_gain_get, stf_positive_gain_set), 59110015Speter SOC_SINGLE("ADDA_DL_GAIN", AFE_ADDA_DL_SRC2_CON1, 59234832Speter DL_2_GAIN_CTL_PRE_SFT, DL_2_GAIN_CTL_PRE_MASK, 0), 59310015Speter SOC_SINGLE_BOOL_EXT("MTKAIF_DMIC Switch", 0, 59410015Speter mt8192_adda_dmic_get, mt8192_adda_dmic_set), 59510015Speter SOC_SINGLE_BOOL_EXT("MTKAIF_ADDA6_ONLY Switch", 0, 59612174Speter mt8192_adda6_only_get, mt8192_adda6_only_set), 59734832Speter}; 59834832Speter 59910015Speterstatic const struct snd_kcontrol_new stf_ctl = 60010015Speter SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0); 60110015Speter 60210015Speterstatic const u16 stf_coeff_table_16k[] = { 60310015Speter 0x049C, 0x09E8, 0x09E0, 0x089C, 60412502Sjulian 0xFF54, 0xF488, 0xEAFC, 0xEBAC, 605154081Sjhb 0xfA40, 0x17AC, 0x3D1C, 0x6028, 606154081Sjhb 0x7538 607154081Sjhb}; 608320923Sjhb 609320923Sjhbstatic const u16 stf_coeff_table_32k[] = { 61056498Speter 0xFE52, 0x0042, 0x00C5, 0x0194, 61110015Speter 0x029A, 0x03B7, 0x04BF, 0x057D, 61210015Speter 0x05BE, 0x0555, 0x0426, 0x0230, 61312675Sjulian 0xFF92, 0xFC89, 0xF973, 0xF6C6, 614182871Speter 0xF500, 0xF49D, 0xF603, 0xF970, 61510015Speter 0xFEF3, 0x065F, 0x0F4F, 0x1928, 61610015Speter 0x2329, 0x2C80, 0x345E, 0x3A0D, 617182871Speter 0x3D08 618179589Speter}; 61910015Speter 62010015Speterstatic const u16 stf_coeff_table_48k[] = { 62110015Speter 0x0401, 0xFFB0, 0xFF5A, 0xFECE, 62210015Speter 0xFE10, 0xFD28, 0xFC21, 0xFB08, 62310015Speter 0xF9EF, 0xF8E8, 0xF80A, 0xF76C, 62415639Speter 0xF724, 0xF746, 0xF7E6, 0xF90F, 62510015Speter 0xFACC, 0xFD1E, 0xFFFF, 0x0364, 62610015Speter 0x0737, 0x0B62, 0x0FC1, 0x1431, 62710015Speter 0x188A, 0x1CA4, 0x2056, 0x237D, 628182871Speter 0x25F9, 0x27B0, 0x2890 629136058Sphk}; 63010015Speter 63110015Speterstatic int mtk_stf_event(struct snd_soc_dapm_widget *w, 632136058Sphk struct snd_kcontrol *kcontrol, 633136058Sphk int event) 63410015Speter{ 63556498Speter struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); 63610015Speter struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); 637182871Speter 638179589Speter size_t half_tap_num; 639182871Speter const u16 *stf_coeff_table; 640179589Speter unsigned int ul_rate, reg_value; 641182871Speter size_t coef_addr; 64210015Speter 64310015Speter regmap_read(afe->regmap, AFE_ADDA_UL_SRC_CON0, &ul_rate); 644182871Speter ul_rate = ul_rate >> UL_VOICE_MODE_CH1_CH2_CTL_SFT; 645182871Speter ul_rate = ul_rate & UL_VOICE_MODE_CH1_CH2_CTL_MASK; 64610015Speter 64756498Speter if (ul_rate == MTK_AFE_ADDA_UL_RATE_48K) { 64810015Speter half_tap_num = ARRAY_SIZE(stf_coeff_table_48k); 649182871Speter stf_coeff_table = stf_coeff_table_48k; 650179589Speter } else if (ul_rate == MTK_AFE_ADDA_UL_RATE_32K) { 651182871Speter half_tap_num = ARRAY_SIZE(stf_coeff_table_32k); 652182871Speter stf_coeff_table = stf_coeff_table_32k; 653182871Speter } else { 65416575Speter half_tap_num = ARRAY_SIZE(stf_coeff_table_16k); 655182871Speter stf_coeff_table = stf_coeff_table_16k; 656182871Speter } 65716575Speter 658182871Speter regmap_read(afe->regmap, AFE_SIDETONE_CON1, ®_value); 659182871Speter 660182871Speter switch (event) { 66110015Speter case SND_SOC_DAPM_PRE_PMU: 66210015Speter /* set side tone gain = 0 */ 66310015Speter regmap_update_bits(afe->regmap, 664136058Sphk AFE_SIDETONE_GAIN, 66510015Speter SIDE_TONE_GAIN_MASK_SFT, 66610015Speter 0); 667130585Sphk regmap_update_bits(afe->regmap, 66810015Speter AFE_SIDETONE_GAIN, 66910015Speter POSITIVE_GAIN_MASK_SFT, 67056498Speter 0); 67110015Speter /* don't bypass stf */ 67210015Speter regmap_update_bits(afe->regmap, 67310044Speter AFE_SIDETONE_CON1, 67411872Sphk 0x1f << 27, 67510015Speter 0x0); 67610015Speter /* set stf half tap num */ 67710015Speter regmap_update_bits(afe->regmap, 678182871Speter AFE_SIDETONE_CON1, 679182871Speter SIDE_TONE_HALF_TAP_NUM_MASK_SFT, 680179589Speter half_tap_num << SIDE_TONE_HALF_TAP_NUM_SFT); 68110015Speter 68210044Speter /* set side tone coefficient */ 68310044Speter regmap_read(afe->regmap, AFE_SIDETONE_CON0, ®_value); 68410044Speter for (coef_addr = 0; coef_addr < half_tap_num; coef_addr++) { 68510044Speter bool old_w_ready = (reg_value >> W_RDY_SFT) & 0x1; 68610044Speter bool new_w_ready = 0; 68710015Speter int try_cnt = 0; 68810015Speter 68910015Speter regmap_update_bits(afe->regmap, 69010015Speter AFE_SIDETONE_CON0, 691164033Srwatson 0x39FFFFF, 69210015Speter (1 << R_W_EN_SFT) | 69310015Speter (1 << R_W_SEL_SFT) | 69410015Speter (0 << SEL_CH2_SFT) | 69510015Speter (coef_addr << 69610015Speter SIDE_TONE_COEFFICIENT_ADDR_SFT) | 69710015Speter stf_coeff_table[coef_addr]); 69810015Speter 69910015Speter /* wait until flag write_ready changed */ 70010015Speter for (try_cnt = 0; try_cnt < 10; try_cnt++) { 70110015Speter regmap_read(afe->regmap, 70210015Speter AFE_SIDETONE_CON0, ®_value); 70310015Speter new_w_ready = (reg_value >> W_RDY_SFT) & 0x1; 70410015Speter 70510015Speter /* flip => ok */ 70610015Speter if (new_w_ready == old_w_ready) { 70710015Speter udelay(3); 70810015Speter if (try_cnt == 9) { 70910015Speter dev_warn(afe->dev, 71010015Speter "%s(), write coeff not ready", 71110044Speter __func__); 71210044Speter } 71310044Speter } else { 71410015Speter break; 71510044Speter } 71610015Speter } 71756498Speter /* need write -> read -> write to write next coeff */ 71856498Speter regmap_update_bits(afe->regmap, 71910015Speter AFE_SIDETONE_CON0, 72010015Speter R_W_SEL_MASK_SFT, 72110015Speter 0x0); 72210015Speter } 72310015Speter break; 72410015Speter case SND_SOC_DAPM_POST_PMD: 72510015Speter /* bypass stf */ 72610015Speter regmap_update_bits(afe->regmap, 72710015Speter AFE_SIDETONE_CON1, 72810015Speter 0x1f << 27, 72910015Speter 0x1f << 27); 73010015Speter 73110015Speter /* set side tone gain = 0 */ 73210015Speter regmap_update_bits(afe->regmap, 73310015Speter AFE_SIDETONE_GAIN, 73410015Speter SIDE_TONE_GAIN_MASK_SFT, 73510015Speter 0); 73610015Speter regmap_update_bits(afe->regmap, 73710015Speter AFE_SIDETONE_GAIN, 73810015Speter POSITIVE_GAIN_MASK_SFT, 73910015Speter 0); 74010015Speter break; 74110015Speter default: 74210015Speter break; 74310015Speter } 74410015Speter 74510015Speter return 0; 74610015Speter} 74710015Speter 74810015Speter/* stf mux */ 74910015Speterenum { 75010015Speter STF_SRC_ADDA_ADDA6 = 0, 75110015Speter STF_SRC_O19O20, 75210015Speter}; 75310015Speter 75410015Speterstatic const char *const stf_o19o20_mux_map[] = { 75510015Speter "ADDA_ADDA6", 75610015Speter "O19O20", 75710015Speter}; 75810015Speter 75910015Speterstatic int stf_o19o20_mux_map_value[] = { 76010015Speter STF_SRC_ADDA_ADDA6, 76110015Speter STF_SRC_O19O20, 76210015Speter}; 76310015Speter 76410015Speterstatic SOC_VALUE_ENUM_SINGLE_DECL(stf_o19o20_mux_map_enum, 76510015Speter AFE_SIDETONE_CON1, 76610015Speter STF_SOURCE_FROM_O19O20_SFT, 76710015Speter STF_SOURCE_FROM_O19O20_MASK, 76810015Speter stf_o19o20_mux_map, 76910015Speter stf_o19o20_mux_map_value); 77010015Speter 77110015Speterstatic const struct snd_kcontrol_new stf_o19O20_mux_control = 77210015Speter SOC_DAPM_ENUM("STF_O19O20_MUX", stf_o19o20_mux_map_enum); 77310015Speter 77410015Speterenum { 77510015Speter STF_SRC_ADDA = 0, 77610015Speter STF_SRC_ADDA6, 77710015Speter}; 77810044Speter 77910044Speterstatic const char *const stf_adda_mux_map[] = { 78010015Speter "ADDA", 78110044Speter "ADDA6", 78210044Speter}; 78310015Speter 78434832Speterstatic int stf_adda_mux_map_value[] = { 78510015Speter STF_SRC_ADDA, 78610044Speter STF_SRC_ADDA6, 78710044Speter}; 78850442Speter 78910015Speterstatic SOC_VALUE_ENUM_SINGLE_DECL(stf_adda_mux_map_enum, 79010015Speter AFE_SIDETONE_CON1, 79110015Speter STF_O19O20_OUT_EN_SEL_SFT, 79210015Speter STF_O19O20_OUT_EN_SEL_MASK, 79310015Speter stf_adda_mux_map, 79410015Speter stf_adda_mux_map_value); 79510015Speter 79610015Speterstatic const struct snd_kcontrol_new stf_adda_mux_control = 79710015Speter SOC_DAPM_ENUM("STF_ADDA_MUX", stf_adda_mux_map_enum); 79810015Speter 79910015Speter/* ADDA UL MUX */ 80010015Speterenum { 80110015Speter ADDA_UL_MUX_MTKAIF = 0, 80210015Speter ADDA_UL_MUX_AP_DMIC, 80310015Speter ADDA_UL_MUX_MASK = 0x1, 80410015Speter}; 80512724Sphk 80656498Speterstatic const char * const adda_ul_mux_map[] = { 80710015Speter "MTKAIF", "AP_DMIC" 808182871Speter}; 80910015Speter 81010015Speterstatic int adda_ul_map_value[] = { 81110015Speter ADDA_UL_MUX_MTKAIF, 81210015Speter ADDA_UL_MUX_AP_DMIC, 81310015Speter}; 81410161Speter 81510015Speterstatic SOC_VALUE_ENUM_SINGLE_DECL(adda_ul_mux_map_enum, 81610015Speter SND_SOC_NOPM, 817179589Speter 0, 81810015Speter ADDA_UL_MUX_MASK, 81910015Speter adda_ul_mux_map, 82010015Speter adda_ul_map_value); 82110015Speter 82210044Speterstatic const struct snd_kcontrol_new adda_ul_mux_control = 82310044Speter SOC_DAPM_ENUM("ADDA_UL_MUX Select", adda_ul_mux_map_enum); 82410015Speter 82534832Speterstatic const struct snd_kcontrol_new adda_ch34_ul_mux_control = 82610015Speter SOC_DAPM_ENUM("ADDA_CH34_UL_MUX Select", adda_ul_mux_map_enum); 82710015Speter 82810015Speterstatic const struct snd_soc_dapm_widget mtk_dai_adda_widgets[] = { 82910015Speter /* inter-connections */ 830182871Speter SND_SOC_DAPM_MIXER("ADDA_DL_CH1", SND_SOC_NOPM, 0, 0, 83110015Speter mtk_adda_dl_ch1_mix, 832182871Speter ARRAY_SIZE(mtk_adda_dl_ch1_mix)), 83310015Speter SND_SOC_DAPM_MIXER("ADDA_DL_CH2", SND_SOC_NOPM, 0, 0, 83410015Speter mtk_adda_dl_ch2_mix, 83510015Speter ARRAY_SIZE(mtk_adda_dl_ch2_mix)), 83610015Speter 83710015Speter SND_SOC_DAPM_MIXER("ADDA_DL_CH3", SND_SOC_NOPM, 0, 0, 83810015Speter mtk_adda_dl_ch3_mix, 83910015Speter ARRAY_SIZE(mtk_adda_dl_ch3_mix)), 84010015Speter SND_SOC_DAPM_MIXER("ADDA_DL_CH4", SND_SOC_NOPM, 0, 0, 84110015Speter mtk_adda_dl_ch4_mix, 84210161Speter ARRAY_SIZE(mtk_adda_dl_ch4_mix)), 84310161Speter 84410161Speter SND_SOC_DAPM_SUPPLY_S("ADDA Enable", SUPPLY_SEQ_ADDA_AFE_ON, 84510161Speter AFE_ADDA_UL_DL_CON0, ADDA_AFE_ON_SFT, 0, 84610161Speter NULL, 0), 84710161Speter 84810161Speter SND_SOC_DAPM_SUPPLY_S("ADDA Playback Enable", SUPPLY_SEQ_ADDA_DL_ON, 84910161Speter AFE_ADDA_DL_SRC2_CON0, 85010161Speter DL_2_SRC_ON_TMP_CTL_PRE_SFT, 0, 85110161Speter mtk_adda_dl_event, 85210161Speter SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 85310161Speter SND_SOC_DAPM_SUPPLY_S("ADDA CH34 Playback Enable", 85410161Speter SUPPLY_SEQ_ADDA_DL_ON, 85510015Speter AFE_ADDA_3RD_DAC_DL_SRC2_CON0, 85610015Speter DL_2_SRC_ON_TMP_CTL_PRE_SFT, 0, 85710015Speter mtk_adda_ch34_dl_event, 85810161Speter SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 85910015Speter 86010161Speter SND_SOC_DAPM_SUPPLY_S("ADDA Capture Enable", SUPPLY_SEQ_ADDA_UL_ON, 86110015Speter AFE_ADDA_UL_SRC_CON0, 86210161Speter UL_SRC_ON_TMP_CTL_SFT, 0, 86310161Speter mtk_adda_ul_event, 864182871Speter SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 86510161Speter SND_SOC_DAPM_SUPPLY_S("ADDA CH34 Capture Enable", SUPPLY_SEQ_ADDA_UL_ON, 86610015Speter AFE_ADDA6_UL_SRC_CON0, 86710161Speter UL_SRC_ON_TMP_CTL_SFT, 0, 868182871Speter mtk_adda_ch34_ul_event, 86910161Speter SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 87010161Speter 87110161Speter SND_SOC_DAPM_SUPPLY_S("AUD_PAD_TOP", SUPPLY_SEQ_ADDA_AUD_PAD_TOP, 87210161Speter AFE_AUD_PAD_TOP, 87310161Speter RG_RX_FIFO_ON_SFT, 0, 87410161Speter mtk_adda_pad_top_event, 87510161Speter SND_SOC_DAPM_PRE_PMU), 87610161Speter SND_SOC_DAPM_SUPPLY_S("ADDA_MTKAIF_CFG", SUPPLY_SEQ_ADDA_MTKAIF_CFG, 87716575Speter SND_SOC_NOPM, 0, 0, 87810161Speter mtk_adda_mtkaif_cfg_event, 87910161Speter SND_SOC_DAPM_PRE_PMU), 88010161Speter SND_SOC_DAPM_SUPPLY_S("ADDA6_MTKAIF_CFG", SUPPLY_SEQ_ADDA6_MTKAIF_CFG, 88110015Speter SND_SOC_NOPM, 0, 0, 88210161Speter mtk_adda_mtkaif_cfg_event, 88310015Speter SND_SOC_DAPM_PRE_PMU), 88410161Speter 88510015Speter SND_SOC_DAPM_SUPPLY_S("AP_DMIC_EN", SUPPLY_SEQ_ADDA_AP_DMIC, 88610161Speter AFE_ADDA_UL_SRC_CON0, 88710015Speter UL_AP_DMIC_ON_SFT, 0, 888182871Speter NULL, 0), 88910161Speter SND_SOC_DAPM_SUPPLY_S("AP_DMIC_CH34_EN", SUPPLY_SEQ_ADDA_AP_DMIC, 890182871Speter AFE_ADDA6_UL_SRC_CON0, 89110161Speter UL_AP_DMIC_ON_SFT, 0, 892182871Speter NULL, 0), 89310161Speter 894182871Speter SND_SOC_DAPM_SUPPLY_S("ADDA_FIFO", SUPPLY_SEQ_ADDA_FIFO, 89510161Speter AFE_ADDA_UL_DL_CON0, 896182871Speter AFE_ADDA_FIFO_AUTO_RST_SFT, 1, 89710161Speter NULL, 0), 89810161Speter SND_SOC_DAPM_SUPPLY_S("ADDA_CH34_FIFO", SUPPLY_SEQ_ADDA_FIFO, 89910161Speter AFE_ADDA_UL_DL_CON0, 90010161Speter AFE_ADDA6_FIFO_AUTO_RST_SFT, 1, 90110161Speter NULL, 0), 90210161Speter 90310161Speter SND_SOC_DAPM_MUX("ADDA_UL_Mux", SND_SOC_NOPM, 0, 0, 90410015Speter &adda_ul_mux_control), 90510161Speter SND_SOC_DAPM_MUX("ADDA_CH34_UL_Mux", SND_SOC_NOPM, 0, 0, 90610161Speter &adda_ch34_ul_mux_control), 90710161Speter 90810161Speter SND_SOC_DAPM_INPUT("AP_DMIC_INPUT"), 90910161Speter SND_SOC_DAPM_INPUT("AP_DMIC_CH34_INPUT"), 91010161Speter 91110161Speter /* stf */ 91210161Speter SND_SOC_DAPM_SWITCH_E("Sidetone Filter", 91310161Speter AFE_SIDETONE_CON1, SIDE_TONE_ON_SFT, 0, 91410161Speter &stf_ctl, 91510161Speter mtk_stf_event, 91610161Speter SND_SOC_DAPM_PRE_PMU | 91710161Speter SND_SOC_DAPM_POST_PMD), 91810015Speter SND_SOC_DAPM_MUX("STF_O19O20_MUX", SND_SOC_NOPM, 0, 0, 91910161Speter &stf_o19O20_mux_control), 92010015Speter SND_SOC_DAPM_MUX("STF_ADDA_MUX", SND_SOC_NOPM, 0, 0, 92110161Speter &stf_adda_mux_control), 92210161Speter SND_SOC_DAPM_MIXER("STF_CH1", SND_SOC_NOPM, 0, 0, 92310161Speter mtk_stf_ch1_mix, 92456592Speter ARRAY_SIZE(mtk_stf_ch1_mix)), 92510161Speter SND_SOC_DAPM_MIXER("STF_CH2", SND_SOC_NOPM, 0, 0, 92610161Speter mtk_stf_ch2_mix, 92710161Speter ARRAY_SIZE(mtk_stf_ch2_mix)), 92810161Speter SND_SOC_DAPM_OUTPUT("STF_OUTPUT"), 92910161Speter 93010161Speter /* clock */ 93110161Speter SND_SOC_DAPM_CLOCK_SUPPLY("top_mux_audio_h"), 93210161Speter 93310015Speter SND_SOC_DAPM_CLOCK_SUPPLY("aud_dac_clk"), 93410161Speter SND_SOC_DAPM_CLOCK_SUPPLY("aud_dac_predis_clk"), 93510161Speter SND_SOC_DAPM_CLOCK_SUPPLY("aud_3rd_dac_clk"), 93610161Speter SND_SOC_DAPM_CLOCK_SUPPLY("aud_3rd_dac_predis_clk"), 93710161Speter 93810161Speter SND_SOC_DAPM_CLOCK_SUPPLY("aud_adc_clk"), 93910015Speter SND_SOC_DAPM_CLOCK_SUPPLY("aud_adda6_adc_clk"), 94010015Speter}; 94110015Speter 94210015Speterstatic const struct snd_soc_dapm_route mtk_dai_adda_routes[] = { 94310015Speter /* playback */ 94410015Speter {"ADDA_DL_CH1", "DL1_CH1", "DL1"}, 94510161Speter {"ADDA_DL_CH2", "DL1_CH1", "DL1"}, 94610015Speter {"ADDA_DL_CH2", "DL1_CH2", "DL1"}, 94710015Speter 94810015Speter {"ADDA_DL_CH1", "DL12_CH1", "DL12"}, 94910015Speter {"ADDA_DL_CH2", "DL12_CH2", "DL12"}, 95010015Speter 95110015Speter {"ADDA_DL_CH1", "DL6_CH1", "DL6"}, 95210161Speter {"ADDA_DL_CH2", "DL6_CH2", "DL6"}, 95310015Speter 95410015Speter {"ADDA_DL_CH1", "DL8_CH1", "DL8"}, 955136058Sphk {"ADDA_DL_CH2", "DL8_CH2", "DL8"}, 95610015Speter 95710015Speter {"ADDA_DL_CH1", "DL2_CH1", "DL2"}, 95810015Speter {"ADDA_DL_CH2", "DL2_CH1", "DL2"}, 95934832Speter {"ADDA_DL_CH2", "DL2_CH2", "DL2"}, 96034832Speter 961136058Sphk {"ADDA_DL_CH1", "DL3_CH1", "DL3"}, 96210015Speter {"ADDA_DL_CH2", "DL3_CH1", "DL3"}, 96310015Speter {"ADDA_DL_CH2", "DL3_CH2", "DL3"}, 964182871Speter 965182871Speter {"ADDA_DL_CH1", "DL4_CH1", "DL4"}, 96610015Speter {"ADDA_DL_CH2", "DL4_CH2", "DL4"}, 96710015Speter 96810015Speter {"ADDA_DL_CH1", "DL5_CH1", "DL5"}, 96910015Speter {"ADDA_DL_CH2", "DL5_CH2", "DL5"}, 97010015Speter 97110015Speter {"ADDA Playback", NULL, "ADDA_DL_CH1"}, 97210015Speter {"ADDA Playback", NULL, "ADDA_DL_CH2"}, 97310015Speter 97410015Speter {"ADDA Playback", NULL, "ADDA Enable"}, 97510015Speter {"ADDA Playback", NULL, "ADDA Playback Enable"}, 97610015Speter 97710015Speter {"ADDA_DL_CH3", "DL1_CH1", "DL1"}, 978136058Sphk {"ADDA_DL_CH4", "DL1_CH1", "DL1"}, 97910015Speter {"ADDA_DL_CH4", "DL1_CH2", "DL1"}, 980136058Sphk 98110015Speter {"ADDA_DL_CH3", "DL12_CH1", "DL12"}, 98210015Speter {"ADDA_DL_CH4", "DL12_CH2", "DL12"}, 98310015Speter 984182871Speter {"ADDA_DL_CH3", "DL6_CH1", "DL6"}, 985136058Sphk {"ADDA_DL_CH4", "DL6_CH2", "DL6"}, 986179589Speter 98710015Speter {"ADDA_DL_CH3", "DL2_CH1", "DL2"}, 988136058Sphk {"ADDA_DL_CH4", "DL2_CH1", "DL2"}, 98910015Speter {"ADDA_DL_CH4", "DL2_CH2", "DL2"}, 990136058Sphk 991136058Sphk {"ADDA_DL_CH3", "DL3_CH1", "DL3"}, 992136058Sphk {"ADDA_DL_CH4", "DL3_CH1", "DL3"}, 993136058Sphk {"ADDA_DL_CH4", "DL3_CH2", "DL3"}, 994136058Sphk 995136058Sphk {"ADDA_DL_CH3", "DL4_CH1", "DL4"}, 996136058Sphk {"ADDA_DL_CH4", "DL4_CH2", "DL4"}, 997136058Sphk 998136058Sphk {"ADDA_DL_CH3", "DL5_CH1", "DL5"}, 99910015Speter {"ADDA_DL_CH4", "DL5_CH2", "DL5"}, 1000136058Sphk 1001136058Sphk {"ADDA CH34 Playback", NULL, "ADDA_DL_CH3"}, 1002136058Sphk {"ADDA CH34 Playback", NULL, "ADDA_DL_CH4"}, 1003136058Sphk 1004136058Sphk {"ADDA CH34 Playback", NULL, "ADDA Enable"}, 1005136058Sphk {"ADDA CH34 Playback", NULL, "ADDA CH34 Playback Enable"}, 1006136058Sphk 1007136058Sphk /* capture */ 1008136058Sphk {"ADDA_UL_Mux", "MTKAIF", "ADDA Capture"}, 1009136058Sphk {"ADDA_UL_Mux", "AP_DMIC", "AP DMIC Capture"}, 1010136058Sphk 101110015Speter {"ADDA_CH34_UL_Mux", "MTKAIF", "ADDA CH34 Capture"}, 101210015Speter {"ADDA_CH34_UL_Mux", "AP_DMIC", "AP DMIC CH34 Capture"}, 101310015Speter 101410015Speter {"ADDA Capture", NULL, "ADDA Enable"}, 101510015Speter {"ADDA Capture", NULL, "ADDA Capture Enable"}, 101610015Speter {"ADDA Capture", NULL, "AUD_PAD_TOP"}, 101710015Speter {"ADDA Capture", NULL, "ADDA_MTKAIF_CFG"}, 101856498Speter 101910015Speter {"AP DMIC Capture", NULL, "ADDA Enable"}, 102010015Speter {"AP DMIC Capture", NULL, "ADDA Capture Enable"}, 1021179589Speter {"AP DMIC Capture", NULL, "ADDA_FIFO"}, 102210015Speter {"AP DMIC Capture", NULL, "AP_DMIC_EN"}, 102350442Speter 1024182871Speter {"ADDA CH34 Capture", NULL, "ADDA Enable"}, 1025182871Speter {"ADDA CH34 Capture", NULL, "ADDA CH34 Capture Enable"}, 102610015Speter {"ADDA CH34 Capture", NULL, "AUD_PAD_TOP"}, 102710015Speter {"ADDA CH34 Capture", NULL, "ADDA6_MTKAIF_CFG"}, 102810015Speter 102910015Speter {"AP DMIC CH34 Capture", NULL, "ADDA Enable"}, 1030182871Speter {"AP DMIC CH34 Capture", NULL, "ADDA CH34 Capture Enable"}, 1031182871Speter {"AP DMIC CH34 Capture", NULL, "ADDA_CH34_FIFO"}, 1032136058Sphk {"AP DMIC CH34 Capture", NULL, "AP_DMIC_CH34_EN"}, 1033182871Speter 1034182871Speter {"AP DMIC Capture", NULL, "AP_DMIC_INPUT"}, 1035182871Speter {"AP DMIC CH34 Capture", NULL, "AP_DMIC_CH34_INPUT"}, 103610015Speter 103710015Speter /* sidetone filter */ 103810015Speter {"STF_ADDA_MUX", "ADDA", "ADDA_UL_Mux"}, 103910015Speter {"STF_ADDA_MUX", "ADDA6", "ADDA_CH34_UL_Mux"}, 104010015Speter 104110015Speter {"STF_O19O20_MUX", "ADDA_ADDA6", "STF_ADDA_MUX"}, 104210015Speter {"STF_O19O20_MUX", "O19O20", "STF_CH1"}, 104310015Speter {"STF_O19O20_MUX", "O19O20", "STF_CH2"}, 104412174Speter 104512496Speter {"Sidetone Filter", "Switch", "STF_O19O20_MUX"}, 104612496Speter {"STF_OUTPUT", NULL, "Sidetone Filter"}, 104710015Speter {"ADDA Playback", NULL, "Sidetone Filter"}, 104810015Speter {"ADDA CH34 Playback", NULL, "Sidetone Filter"}, 104910708Speter 105010015Speter /* clk */ 105110015Speter {"ADDA Playback", NULL, "aud_dac_clk"}, 105256498Speter {"ADDA Playback", NULL, "aud_dac_predis_clk"}, 105356498Speter 105410015Speter {"ADDA CH34 Playback", NULL, "aud_3rd_dac_clk"}, 105556498Speter {"ADDA CH34 Playback", NULL, "aud_3rd_dac_predis_clk"}, 105612174Speter 105710015Speter {"ADDA Capture Enable", NULL, "aud_adc_clk"}, 105810015Speter {"ADDA CH34 Capture Enable", NULL, "aud_adda6_adc_clk"}, 105911609Speter}; 1060179589Speter 106110015Speter/* dai ops */ 106256498Speterstatic int mtk_dai_adda_hw_params(struct snd_pcm_substream *substream, 106356498Speter struct snd_pcm_hw_params *params, 106456498Speter struct snd_soc_dai *dai) 106510015Speter{ 106610015Speter struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); 106734832Speter unsigned int rate = params_rate(params); 106810015Speter int id = dai->id; 106910015Speter 107033395Speter if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 107110015Speter unsigned int dl_src2_con0 = 0; 107210015Speter unsigned int dl_src2_con1 = 0; 107310015Speter 107410015Speter /* set sampling rate */ 107510015Speter dl_src2_con0 = mtk_adda_dl_rate_transform(afe, rate) << 107612174Speter DL_2_INPUT_MODE_CTL_SFT; 107710015Speter 107810015Speter /* set output mode, UP_SAMPLING_RATE_X8 */ 107910015Speter dl_src2_con0 |= (0x3 << DL_2_OUTPUT_SEL_CTL_SFT); 108010015Speter 108110015Speter /* turn off mute function */ 108210015Speter dl_src2_con0 |= (0x01 << DL_2_MUTE_CH2_OFF_CTL_PRE_SFT); 108312174Speter dl_src2_con0 |= (0x01 << DL_2_MUTE_CH1_OFF_CTL_PRE_SFT); 108412174Speter 108512174Speter /* set voice input data if input sample rate is 8k or 16k */ 108612174Speter if (rate == 8000 || rate == 16000) 108712174Speter dl_src2_con0 |= 0x01 << DL_2_VOICE_MODE_CTL_PRE_SFT; 108812174Speter 108912174Speter /* SA suggest apply -0.3db to audio/speech path */ 109012174Speter dl_src2_con1 = MTK_AFE_ADDA_DL_GAIN_NORMAL << 109112174Speter DL_2_GAIN_CTL_PRE_SFT; 109212174Speter 109312174Speter /* turn on down-link gain */ 109410015Speter dl_src2_con0 |= (0x01 << DL_2_GAIN_ON_CTL_PRE_SFT); 109517547Speter 109656498Speter if (id == MT8192_DAI_ADDA) { 109710015Speter /* clean predistortion */ 109810015Speter regmap_write(afe->regmap, AFE_ADDA_PREDIS_CON0, 0); 109915639Speter regmap_write(afe->regmap, AFE_ADDA_PREDIS_CON1, 0); 110010015Speter 110110015Speter regmap_write(afe->regmap, 110210015Speter AFE_ADDA_DL_SRC2_CON0, dl_src2_con0); 110310015Speter regmap_write(afe->regmap, 110410015Speter AFE_ADDA_DL_SRC2_CON1, dl_src2_con1); 110510015Speter 110610015Speter /* set sdm gain */ 110710015Speter regmap_update_bits(afe->regmap, 110812496Speter AFE_ADDA_DL_SDM_DCCOMP_CON, 110934832Speter ATTGAIN_CTL_MASK_SFT, 111010015Speter AUDIO_SDM_LEVEL_NORMAL << 111156505Speter ATTGAIN_CTL_SFT); 111256498Speter 111310015Speter /* 2nd sdm */ 111456498Speter regmap_update_bits(afe->regmap, 111556498Speter AFE_ADDA_DL_SDM_DCCOMP_CON, 111610015Speter USE_3RD_SDM_MASK_SFT, 111756498Speter AUDIO_SDM_2ND << USE_3RD_SDM_SFT); 111810015Speter 111911872Sphk /* sdm auto reset */ 112012174Speter regmap_write(afe->regmap, 112110015Speter AFE_ADDA_DL_SDM_AUTO_RESET_CON, 112210015Speter SDM_AUTO_RESET_THRESHOLD); 112310015Speter regmap_update_bits(afe->regmap, 112456498Speter AFE_ADDA_DL_SDM_AUTO_RESET_CON, 1125179589Speter ADDA_SDM_AUTO_RESET_ONOFF_MASK_SFT, 112656498Speter 0x1 << ADDA_SDM_AUTO_RESET_ONOFF_SFT); 112756498Speter } else { 112810015Speter /* clean predistortion */ 112910015Speter regmap_write(afe->regmap, 113010015Speter AFE_ADDA_3RD_DAC_PREDIS_CON0, 0); 113110015Speter regmap_write(afe->regmap, 113210015Speter AFE_ADDA_3RD_DAC_PREDIS_CON1, 0); 113334832Speter 113434832Speter regmap_write(afe->regmap, AFE_ADDA_3RD_DAC_DL_SRC2_CON0, 113534832Speter dl_src2_con0); 113610015Speter regmap_write(afe->regmap, AFE_ADDA_3RD_DAC_DL_SRC2_CON1, 113756498Speter dl_src2_con1); 113856498Speter 113956498Speter /* set sdm gain */ 114010015Speter regmap_update_bits(afe->regmap, 114112174Speter AFE_ADDA_3RD_DAC_DL_SDM_DCCOMP_CON, 114212174Speter ATTGAIN_CTL_MASK_SFT, 114312174Speter AUDIO_SDM_LEVEL_NORMAL << 114412174Speter ATTGAIN_CTL_SFT); 114510015Speter 114634832Speter /* 2nd sdm */ 114710015Speter regmap_update_bits(afe->regmap, 114810015Speter AFE_ADDA_3RD_DAC_DL_SDM_DCCOMP_CON, 114910015Speter USE_3RD_SDM_MASK_SFT, 115010015Speter AUDIO_SDM_2ND << USE_3RD_SDM_SFT); 115110015Speter 115210015Speter /* sdm auto reset */ 115310015Speter regmap_write(afe->regmap, 115410015Speter AFE_ADDA_3RD_DAC_DL_SDM_AUTO_RESET_CON, 115510015Speter SDM_AUTO_RESET_THRESHOLD); 115610015Speter regmap_update_bits(afe->regmap, 115710015Speter AFE_ADDA_3RD_DAC_DL_SDM_AUTO_RESET_CON, 115810015Speter ADDA_3RD_DAC_SDM_AUTO_RESET_ONOFF_MASK_SFT, 115933395Speter 0x1 << ADDA_3RD_DAC_SDM_AUTO_RESET_ONOFF_SFT); 116033395Speter } 116133395Speter } else { 116233395Speter unsigned int voice_mode = 0; 116333395Speter unsigned int ul_src_con0 = 0; /* default value */ 116434832Speter 116533395Speter voice_mode = mtk_adda_ul_rate_transform(afe, rate); 116633395Speter 116733395Speter ul_src_con0 |= (voice_mode << 17) & (0x7 << 17); 116833395Speter 116933395Speter /* enable iir */ 1170166091Smarius ul_src_con0 |= (1 << UL_IIR_ON_TMP_CTL_SFT) & 117110015Speter UL_IIR_ON_TMP_CTL_MASK_SFT; 117210015Speter ul_src_con0 |= (UL_IIR_SW << UL_IIRMODE_CTL_SFT) & 117310015Speter UL_IIRMODE_CTL_MASK_SFT; 117456498Speter 117510015Speter switch (id) { 1176166091Smarius case MT8192_DAI_ADDA: 117710015Speter case MT8192_DAI_AP_DMIC: 117810015Speter /* 35Hz @ 48k */ 117910015Speter regmap_write(afe->regmap, 118010015Speter AFE_ADDA_IIR_COEF_02_01, 0x00000000); 118110015Speter regmap_write(afe->regmap, 118210015Speter AFE_ADDA_IIR_COEF_04_03, 0x00003FB8); 118312174Speter regmap_write(afe->regmap, 118412174Speter AFE_ADDA_IIR_COEF_06_05, 0x3FB80000); 118512174Speter regmap_write(afe->regmap, 118650442Speter AFE_ADDA_IIR_COEF_08_07, 0x3FB80000); 118734832Speter regmap_write(afe->regmap, 118810015Speter AFE_ADDA_IIR_COEF_10_09, 0x0000C048); 118910015Speter 1190182871Speter regmap_write(afe->regmap, 119110015Speter AFE_ADDA_UL_SRC_CON0, ul_src_con0); 119210015Speter 119310015Speter /* Using Internal ADC */ 119410015Speter regmap_update_bits(afe->regmap, 119510015Speter AFE_ADDA_TOP_CON0, 119610015Speter 0x1 << 0, 1197179589Speter 0x0 << 0); 1198179589Speter 1199179589Speter /* mtkaif_rxif_data_mode = 0, amic */ 120010015Speter regmap_update_bits(afe->regmap, 120110015Speter AFE_ADDA_MTKAIF_RX_CFG0, 120210015Speter 0x1 << 0, 120310015Speter 0x0 << 0); 1204179589Speter break; 120510015Speter case MT8192_DAI_ADDA_CH34: 120616575Speter case MT8192_DAI_AP_DMIC_CH34: 120716575Speter /* 35Hz @ 48k */ 1208179589Speter regmap_write(afe->regmap, 1209179589Speter AFE_ADDA6_IIR_COEF_02_01, 0x00000000); 121010015Speter regmap_write(afe->regmap, 121110015Speter AFE_ADDA6_IIR_COEF_04_03, 0x00003FB8); 121210015Speter regmap_write(afe->regmap, 1213179589Speter AFE_ADDA6_IIR_COEF_06_05, 0x3FB80000); 121434832Speter regmap_write(afe->regmap, 121510015Speter AFE_ADDA6_IIR_COEF_08_07, 0x3FB80000); 121610015Speter regmap_write(afe->regmap, 121710015Speter AFE_ADDA6_IIR_COEF_10_09, 0x0000C048); 121810015Speter 1219182871Speter regmap_write(afe->regmap, 1220182871Speter AFE_ADDA6_UL_SRC_CON0, ul_src_con0); 122110015Speter 1222182871Speter /* Using Internal ADC */ 122310015Speter regmap_update_bits(afe->regmap, 122410015Speter AFE_ADDA6_TOP_CON0, 122510015Speter 0x1 << 0, 122610015Speter 0x0 << 0); 122710015Speter 122810015Speter /* mtkaif_rxif_data_mode = 0, amic */ 122910015Speter regmap_update_bits(afe->regmap, 123034832Speter AFE_ADDA6_MTKAIF_RX_CFG0, 123112174Speter 0x1 << 0, 1232182871Speter 0x0 << 0); 123312174Speter break; 123412174Speter default: 123516575Speter break; 123610015Speter } 123710015Speter 1238179589Speter /* ap dmic */ 1239182871Speter switch (id) { 124010015Speter case MT8192_DAI_AP_DMIC: 124110015Speter case MT8192_DAI_AP_DMIC_CH34: 124210015Speter mtk_adda_ul_src_dmic(afe, id); 124310015Speter break; 124410015Speter default: 124512174Speter break; 124612174Speter } 124712174Speter } 124812174Speter 124912174Speter return 0; 125012174Speter} 125110015Speter 125210015Speterstatic const struct snd_soc_dai_ops mtk_dai_adda_ops = { 1253179589Speter .hw_params = mtk_dai_adda_hw_params, 125412174Speter}; 125512174Speter 1256182871Speter/* dai driver */ 125710015Speter#define MTK_ADDA_PLAYBACK_RATES (SNDRV_PCM_RATE_8000_48000 |\ 125812174Speter SNDRV_PCM_RATE_96000 |\ 125912174Speter SNDRV_PCM_RATE_192000) 126010015Speter 1261182871Speter#define MTK_ADDA_CAPTURE_RATES (SNDRV_PCM_RATE_8000 |\ 126212174Speter SNDRV_PCM_RATE_16000 |\ 126315640Speter SNDRV_PCM_RATE_32000 |\ 126415640Speter SNDRV_PCM_RATE_48000 |\ 126515640Speter SNDRV_PCM_RATE_96000 |\ 126615640Speter SNDRV_PCM_RATE_192000) 1267179589Speter 126815640Speter#define MTK_ADDA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\ 1269182871Speter SNDRV_PCM_FMTBIT_S24_LE |\ 127015640Speter SNDRV_PCM_FMTBIT_S32_LE) 127115640Speter 127212174Speterstatic struct snd_soc_dai_driver mtk_dai_adda_driver[] = { 127312174Speter { 127415640Speter .name = "ADDA", 127515640Speter .id = MT8192_DAI_ADDA, 127615640Speter .playback = { 1277179589Speter .stream_name = "ADDA Playback", 127812174Speter .channels_min = 1, 127910015Speter .channels_max = 2, 128012174Speter .rates = MTK_ADDA_PLAYBACK_RATES, 128115640Speter .formats = MTK_ADDA_FORMATS, 128215640Speter }, 128312174Speter .capture = { 128412174Speter .stream_name = "ADDA Capture", 128510015Speter .channels_min = 1, 128610015Speter .channels_max = 2, 128712174Speter .rates = MTK_ADDA_CAPTURE_RATES, 128812174Speter .formats = MTK_ADDA_FORMATS, 128912174Speter }, 129012174Speter .ops = &mtk_dai_adda_ops, 129112174Speter }, 129212174Speter { 129312174Speter .name = "ADDA_CH34", 129412496Speter .id = MT8192_DAI_ADDA_CH34, 129510015Speter .playback = { 129612174Speter .stream_name = "ADDA CH34 Playback", 129750442Speter .channels_min = 1, 129810015Speter .channels_max = 2, 129912174Speter .rates = MTK_ADDA_PLAYBACK_RATES, 130012174Speter .formats = MTK_ADDA_FORMATS, 130112496Speter }, 130210015Speter .capture = { 130312174Speter .stream_name = "ADDA CH34 Capture", 130450442Speter .channels_min = 1, 130510015Speter .channels_max = 2, 130612174Speter .rates = MTK_ADDA_CAPTURE_RATES, 130750442Speter .formats = MTK_ADDA_FORMATS, 130810015Speter }, 130912174Speter .ops = &mtk_dai_adda_ops, 131012174Speter }, 131110015Speter { 131212174Speter .name = "AP_DMIC", 131312174Speter .id = MT8192_DAI_AP_DMIC, 131412174Speter .capture = { 131512174Speter .stream_name = "AP DMIC Capture", 131612174Speter .channels_min = 1, 131712174Speter .channels_max = 2, 131812174Speter .rates = MTK_ADDA_CAPTURE_RATES, 131910015Speter .formats = MTK_ADDA_FORMATS, 1320182871Speter }, 132110015Speter .ops = &mtk_dai_adda_ops, 1322182871Speter }, 1323182871Speter { 1324182871Speter .name = "AP_DMIC_CH34", 132510015Speter .id = MT8192_DAI_AP_DMIC_CH34, 132612174Speter .capture = { 132712174Speter .stream_name = "AP DMIC CH34 Capture", 132812174Speter .channels_min = 1, 132912174Speter .channels_max = 2, 133012174Speter .rates = MTK_ADDA_CAPTURE_RATES, 133112174Speter .formats = MTK_ADDA_FORMATS, 133212174Speter }, 133312174Speter .ops = &mtk_dai_adda_ops, 133412174Speter }, 1335182871Speter}; 133612174Speter 133712174Speterint mt8192_dai_adda_register(struct mtk_base_afe *afe) 133812174Speter{ 133912174Speter struct mtk_base_afe_dai *dai; 134010015Speter struct mt8192_afe_private *afe_priv = afe->platform_priv; 1341179589Speter 134210015Speter dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL); 1343182871Speter if (!dai) 1344182871Speter return -ENOMEM; 134510015Speter 134610015Speter list_add(&dai->list, &afe->sub_dais); 134710015Speter 1348182871Speter dai->dai_drivers = mtk_dai_adda_driver; 1349182871Speter dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_adda_driver); 135010015Speter 135110015Speter dai->controls = mtk_adda_controls; 135210015Speter dai->num_controls = ARRAY_SIZE(mtk_adda_controls); 135310015Speter dai->dapm_widgets = mtk_dai_adda_widgets; 135456498Speter dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_adda_widgets); 135510015Speter dai->dapm_routes = mtk_dai_adda_routes; 135610015Speter dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_adda_routes); 135710015Speter 135810015Speter /* ap dmic priv share with adda */ 135912174Speter afe_priv->dai_priv[MT8192_DAI_AP_DMIC] = 136012174Speter afe_priv->dai_priv[MT8192_DAI_ADDA]; 136112174Speter afe_priv->dai_priv[MT8192_DAI_AP_DMIC_CH34] = 136212174Speter afe_priv->dai_priv[MT8192_DAI_ADDA_CH34]; 136312174Speter 136412174Speter return 0; 136512174Speter} 136610015Speter