1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * cht-bsw-max98090.c - ASoc Machine driver for Intel Cherryview-based 4 * platforms Cherrytrail and Braswell, with max98090 & TI codec. 5 * 6 * Copyright (C) 2015 Intel Corp 7 * Author: Fang, Yang A <yang.a.fang@intel.com> 8 * This file is modified from cht_bsw_rt5645.c 9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 10 * 11 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 12 */ 13 14#include <linux/dmi.h> 15#include <linux/gpio/consumer.h> 16#include <linux/module.h> 17#include <linux/platform_device.h> 18#include <linux/slab.h> 19#include <linux/acpi.h> 20#include <linux/clk.h> 21#include <sound/pcm.h> 22#include <sound/pcm_params.h> 23#include <sound/soc.h> 24#include <sound/soc-acpi.h> 25#include <sound/jack.h> 26#include "../../codecs/max98090.h" 27#include "../atom/sst-atom-controls.h" 28#include "../../codecs/ts3a227e.h" 29 30#define CHT_PLAT_CLK_3_HZ 19200000 31#define CHT_CODEC_DAI "HiFi" 32 33#define QUIRK_PMC_PLT_CLK_0 0x01 34 35struct cht_mc_private { 36 struct clk *mclk; 37 struct snd_soc_jack jack; 38 bool ts3a227e_present; 39 int quirks; 40}; 41 42static int platform_clock_control(struct snd_soc_dapm_widget *w, 43 struct snd_kcontrol *k, int event) 44{ 45 struct snd_soc_dapm_context *dapm = w->dapm; 46 struct snd_soc_card *card = dapm->card; 47 struct snd_soc_dai *codec_dai; 48 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card); 49 int ret; 50 51 /* See the comment in snd_cht_mc_probe() */ 52 if (ctx->quirks & QUIRK_PMC_PLT_CLK_0) 53 return 0; 54 55 codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI); 56 if (!codec_dai) { 57 dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n"); 58 return -EIO; 59 } 60 61 if (SND_SOC_DAPM_EVENT_ON(event)) { 62 ret = clk_prepare_enable(ctx->mclk); 63 if (ret < 0) { 64 dev_err(card->dev, 65 "could not configure MCLK state"); 66 return ret; 67 } 68 } else { 69 clk_disable_unprepare(ctx->mclk); 70 } 71 72 return 0; 73} 74 75static const struct snd_soc_dapm_widget cht_dapm_widgets[] = { 76 SND_SOC_DAPM_HP("Headphone", NULL), 77 SND_SOC_DAPM_MIC("Headset Mic", NULL), 78 SND_SOC_DAPM_MIC("Int Mic", NULL), 79 SND_SOC_DAPM_SPK("Ext Spk", NULL), 80 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0, 81 platform_clock_control, SND_SOC_DAPM_PRE_PMU | 82 SND_SOC_DAPM_POST_PMD), 83}; 84 85static const struct snd_soc_dapm_route cht_audio_map[] = { 86 {"IN34", NULL, "Headset Mic"}, 87 {"Headset Mic", NULL, "MICBIAS"}, 88 {"DMICL", NULL, "Int Mic"}, 89 {"Headphone", NULL, "HPL"}, 90 {"Headphone", NULL, "HPR"}, 91 {"Ext Spk", NULL, "SPKL"}, 92 {"Ext Spk", NULL, "SPKR"}, 93 {"HiFi Playback", NULL, "ssp2 Tx"}, 94 {"ssp2 Tx", NULL, "codec_out0"}, 95 {"ssp2 Tx", NULL, "codec_out1"}, 96 {"codec_in0", NULL, "ssp2 Rx" }, 97 {"codec_in1", NULL, "ssp2 Rx" }, 98 {"ssp2 Rx", NULL, "HiFi Capture"}, 99 {"Headphone", NULL, "Platform Clock"}, 100 {"Headset Mic", NULL, "Platform Clock"}, 101 {"Int Mic", NULL, "Platform Clock"}, 102 {"Ext Spk", NULL, "Platform Clock"}, 103}; 104 105static const struct snd_kcontrol_new cht_mc_controls[] = { 106 SOC_DAPM_PIN_SWITCH("Headphone"), 107 SOC_DAPM_PIN_SWITCH("Headset Mic"), 108 SOC_DAPM_PIN_SWITCH("Int Mic"), 109 SOC_DAPM_PIN_SWITCH("Ext Spk"), 110}; 111 112static int cht_aif1_hw_params(struct snd_pcm_substream *substream, 113 struct snd_pcm_hw_params *params) 114{ 115 struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); 116 struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0); 117 int ret; 118 119 ret = snd_soc_dai_set_sysclk(codec_dai, M98090_REG_SYSTEM_CLOCK, 120 CHT_PLAT_CLK_3_HZ, SND_SOC_CLOCK_IN); 121 if (ret < 0) { 122 dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret); 123 return ret; 124 } 125 126 return 0; 127} 128 129static int cht_ti_jack_event(struct notifier_block *nb, 130 unsigned long event, void *data) 131{ 132 struct snd_soc_jack *jack = (struct snd_soc_jack *)data; 133 struct snd_soc_dapm_context *dapm = &jack->card->dapm; 134 135 if (event & SND_JACK_MICROPHONE) { 136 snd_soc_dapm_force_enable_pin(dapm, "SHDN"); 137 snd_soc_dapm_force_enable_pin(dapm, "MICBIAS"); 138 snd_soc_dapm_sync(dapm); 139 } else { 140 snd_soc_dapm_disable_pin(dapm, "MICBIAS"); 141 snd_soc_dapm_disable_pin(dapm, "SHDN"); 142 snd_soc_dapm_sync(dapm); 143 } 144 145 return 0; 146} 147 148static struct notifier_block cht_jack_nb = { 149 .notifier_call = cht_ti_jack_event, 150}; 151 152static struct snd_soc_jack_pin hs_jack_pins[] = { 153 { 154 .pin = "Headphone", 155 .mask = SND_JACK_HEADPHONE, 156 }, 157 { 158 .pin = "Headset Mic", 159 .mask = SND_JACK_MICROPHONE, 160 }, 161}; 162 163static struct snd_soc_jack_gpio hs_jack_gpios[] = { 164 { 165 .name = "hp", 166 .report = SND_JACK_HEADPHONE | SND_JACK_LINEOUT, 167 .debounce_time = 200, 168 }, 169 { 170 .name = "mic", 171 .invert = 1, 172 .report = SND_JACK_MICROPHONE, 173 .debounce_time = 200, 174 }, 175}; 176 177static const struct acpi_gpio_params hp_gpios = { 0, 0, false }; 178static const struct acpi_gpio_params mic_gpios = { 1, 0, false }; 179 180static const struct acpi_gpio_mapping acpi_max98090_gpios[] = { 181 { "hp-gpios", &hp_gpios, 1 }, 182 { "mic-gpios", &mic_gpios, 1 }, 183 {}, 184}; 185 186static int cht_codec_init(struct snd_soc_pcm_runtime *runtime) 187{ 188 int ret; 189 int jack_type; 190 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card); 191 struct snd_soc_jack *jack = &ctx->jack; 192 193 if (ctx->ts3a227e_present) { 194 /* 195 * The jack has already been created in the 196 * cht_max98090_headset_init() function. 197 */ 198 snd_soc_jack_notifier_register(jack, &cht_jack_nb); 199 return 0; 200 } 201 202 jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE; 203 204 ret = snd_soc_card_jack_new_pins(runtime->card, "Headset Jack", 205 jack_type, jack, 206 hs_jack_pins, 207 ARRAY_SIZE(hs_jack_pins)); 208 if (ret) { 209 dev_err(runtime->dev, "Headset Jack creation failed %d\n", ret); 210 return ret; 211 } 212 213 ret = snd_soc_jack_add_gpiods(runtime->card->dev->parent, jack, 214 ARRAY_SIZE(hs_jack_gpios), 215 hs_jack_gpios); 216 if (ret) { 217 /* 218 * flag error but don't bail if jack detect is broken 219 * due to platform issues or bad BIOS/configuration 220 */ 221 dev_err(runtime->dev, 222 "jack detection gpios not added, error %d\n", ret); 223 } 224 225 /* See the comment in snd_cht_mc_probe() */ 226 if (ctx->quirks & QUIRK_PMC_PLT_CLK_0) 227 return 0; 228 229 /* 230 * The firmware might enable the clock at 231 * boot (this information may or may not 232 * be reflected in the enable clock register). 233 * To change the rate we must disable the clock 234 * first to cover these cases. Due to common 235 * clock framework restrictions that do not allow 236 * to disable a clock that has not been enabled, 237 * we need to enable the clock first. 238 */ 239 ret = clk_prepare_enable(ctx->mclk); 240 if (!ret) 241 clk_disable_unprepare(ctx->mclk); 242 243 ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ); 244 245 if (ret) 246 dev_err(runtime->dev, "unable to set MCLK rate\n"); 247 248 return ret; 249} 250 251static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd, 252 struct snd_pcm_hw_params *params) 253{ 254 struct snd_interval *rate = hw_param_interval(params, 255 SNDRV_PCM_HW_PARAM_RATE); 256 struct snd_interval *channels = hw_param_interval(params, 257 SNDRV_PCM_HW_PARAM_CHANNELS); 258 int ret = 0; 259 unsigned int fmt = 0; 260 261 ret = snd_soc_dai_set_tdm_slot(snd_soc_rtd_to_cpu(rtd, 0), 0x3, 0x3, 2, 16); 262 if (ret < 0) { 263 dev_err(rtd->dev, "can't set cpu_dai slot fmt: %d\n", ret); 264 return ret; 265 } 266 267 fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_BP_FP; 268 269 ret = snd_soc_dai_set_fmt(snd_soc_rtd_to_cpu(rtd, 0), fmt); 270 if (ret < 0) { 271 dev_err(rtd->dev, "can't set cpu_dai set fmt: %d\n", ret); 272 return ret; 273 } 274 275 /* The DSP will convert the FE rate to 48k, stereo, 24bits */ 276 rate->min = rate->max = 48000; 277 channels->min = channels->max = 2; 278 279 /* set SSP2 to 16-bit */ 280 params_set_format(params, SNDRV_PCM_FORMAT_S16_LE); 281 return 0; 282} 283 284static int cht_aif1_startup(struct snd_pcm_substream *substream) 285{ 286 return snd_pcm_hw_constraint_single(substream->runtime, 287 SNDRV_PCM_HW_PARAM_RATE, 48000); 288} 289 290static int cht_max98090_headset_init(struct snd_soc_component *component) 291{ 292 struct snd_soc_card *card = component->card; 293 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card); 294 struct snd_soc_jack *jack = &ctx->jack; 295 int jack_type; 296 int ret; 297 298 /* 299 * TI supports 4 buttons headset detection 300 * KEY_MEDIA 301 * KEY_VOICECOMMAND 302 * KEY_VOLUMEUP 303 * KEY_VOLUMEDOWN 304 */ 305 jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE | 306 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 307 SND_JACK_BTN_2 | SND_JACK_BTN_3; 308 309 ret = snd_soc_card_jack_new(card, "Headset Jack", jack_type, jack); 310 if (ret) { 311 dev_err(card->dev, "Headset Jack creation failed %d\n", ret); 312 return ret; 313 } 314 315 return ts3a227e_enable_jack_detect(component, jack); 316} 317 318static const struct snd_soc_ops cht_aif1_ops = { 319 .startup = cht_aif1_startup, 320}; 321 322static const struct snd_soc_ops cht_be_ssp2_ops = { 323 .hw_params = cht_aif1_hw_params, 324}; 325 326static struct snd_soc_aux_dev cht_max98090_headset_dev = { 327 .dlc = COMP_AUX("i2c-104C227E:00"), 328 .init = cht_max98090_headset_init, 329}; 330 331SND_SOC_DAILINK_DEF(dummy, 332 DAILINK_COMP_ARRAY(COMP_DUMMY())); 333 334SND_SOC_DAILINK_DEF(media, 335 DAILINK_COMP_ARRAY(COMP_CPU("media-cpu-dai"))); 336 337SND_SOC_DAILINK_DEF(deepbuffer, 338 DAILINK_COMP_ARRAY(COMP_CPU("deepbuffer-cpu-dai"))); 339 340SND_SOC_DAILINK_DEF(ssp2_port, 341 DAILINK_COMP_ARRAY(COMP_CPU("ssp2-port"))); 342SND_SOC_DAILINK_DEF(ssp2_codec, 343 DAILINK_COMP_ARRAY(COMP_CODEC("i2c-193C9890:00", "HiFi"))); 344 345SND_SOC_DAILINK_DEF(platform, 346 DAILINK_COMP_ARRAY(COMP_PLATFORM("sst-mfld-platform"))); 347 348static struct snd_soc_dai_link cht_dailink[] = { 349 [MERR_DPCM_AUDIO] = { 350 .name = "Audio Port", 351 .stream_name = "Audio", 352 .nonatomic = true, 353 .dynamic = 1, 354 .dpcm_playback = 1, 355 .dpcm_capture = 1, 356 .ops = &cht_aif1_ops, 357 SND_SOC_DAILINK_REG(media, dummy, platform), 358 }, 359 [MERR_DPCM_DEEP_BUFFER] = { 360 .name = "Deep-Buffer Audio Port", 361 .stream_name = "Deep-Buffer Audio", 362 .nonatomic = true, 363 .dynamic = 1, 364 .dpcm_playback = 1, 365 .ops = &cht_aif1_ops, 366 SND_SOC_DAILINK_REG(deepbuffer, dummy, platform), 367 }, 368 /* back ends */ 369 { 370 .name = "SSP2-Codec", 371 .id = 0, 372 .no_pcm = 1, 373 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF 374 | SND_SOC_DAIFMT_CBC_CFC, 375 .init = cht_codec_init, 376 .be_hw_params_fixup = cht_codec_fixup, 377 .dpcm_playback = 1, 378 .dpcm_capture = 1, 379 .ops = &cht_be_ssp2_ops, 380 SND_SOC_DAILINK_REG(ssp2_port, ssp2_codec, platform), 381 }, 382}; 383 384/* use space before codec name to simplify card ID, and simplify driver name */ 385#define SOF_CARD_NAME "bytcht max98090" /* card name will be 'sof-bytcht max98090 */ 386#define SOF_DRIVER_NAME "SOF" 387 388#define CARD_NAME "chtmax98090" 389#define DRIVER_NAME NULL /* card name will be used for driver name */ 390 391/* SoC card */ 392static struct snd_soc_card snd_soc_card_cht = { 393 .owner = THIS_MODULE, 394 .dai_link = cht_dailink, 395 .num_links = ARRAY_SIZE(cht_dailink), 396 .aux_dev = &cht_max98090_headset_dev, 397 .num_aux_devs = 1, 398 .dapm_widgets = cht_dapm_widgets, 399 .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets), 400 .dapm_routes = cht_audio_map, 401 .num_dapm_routes = ARRAY_SIZE(cht_audio_map), 402 .controls = cht_mc_controls, 403 .num_controls = ARRAY_SIZE(cht_mc_controls), 404}; 405 406static const struct dmi_system_id cht_max98090_quirk_table[] = { 407 { 408 /* Banjo model Chromebook */ 409 .matches = { 410 DMI_MATCH(DMI_PRODUCT_NAME, "Banjo"), 411 }, 412 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 413 }, 414 { 415 /* Candy model Chromebook */ 416 .matches = { 417 DMI_MATCH(DMI_PRODUCT_NAME, "Candy"), 418 }, 419 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 420 }, 421 { 422 /* Clapper model Chromebook */ 423 .matches = { 424 DMI_MATCH(DMI_PRODUCT_NAME, "Clapper"), 425 }, 426 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 427 }, 428 { 429 /* Cyan model Chromebook */ 430 .matches = { 431 DMI_MATCH(DMI_PRODUCT_NAME, "Cyan"), 432 }, 433 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 434 }, 435 { 436 /* Enguarde model Chromebook */ 437 .matches = { 438 DMI_MATCH(DMI_PRODUCT_NAME, "Enguarde"), 439 }, 440 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 441 }, 442 { 443 /* Glimmer model Chromebook */ 444 .matches = { 445 DMI_MATCH(DMI_PRODUCT_NAME, "Glimmer"), 446 }, 447 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 448 }, 449 { 450 /* Gnawty model Chromebook (Acer Chromebook CB3-111) */ 451 .matches = { 452 DMI_MATCH(DMI_PRODUCT_NAME, "Gnawty"), 453 }, 454 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 455 }, 456 { 457 /* Heli model Chromebook */ 458 .matches = { 459 DMI_MATCH(DMI_PRODUCT_NAME, "Heli"), 460 }, 461 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 462 }, 463 { 464 /* Kip model Chromebook */ 465 .matches = { 466 DMI_MATCH(DMI_PRODUCT_NAME, "Kip"), 467 }, 468 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 469 }, 470 { 471 /* Ninja model Chromebook */ 472 .matches = { 473 DMI_MATCH(DMI_PRODUCT_NAME, "Ninja"), 474 }, 475 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 476 }, 477 { 478 /* Orco model Chromebook */ 479 .matches = { 480 DMI_MATCH(DMI_PRODUCT_NAME, "Orco"), 481 }, 482 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 483 }, 484 { 485 /* Quawks model Chromebook */ 486 .matches = { 487 DMI_MATCH(DMI_PRODUCT_NAME, "Quawks"), 488 }, 489 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 490 }, 491 { 492 /* Rambi model Chromebook */ 493 .matches = { 494 DMI_MATCH(DMI_PRODUCT_NAME, "Rambi"), 495 }, 496 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 497 }, 498 { 499 /* Squawks model Chromebook */ 500 .matches = { 501 DMI_MATCH(DMI_PRODUCT_NAME, "Squawks"), 502 }, 503 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 504 }, 505 { 506 /* Sumo model Chromebook */ 507 .matches = { 508 DMI_MATCH(DMI_PRODUCT_NAME, "Sumo"), 509 }, 510 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 511 }, 512 { 513 /* Swanky model Chromebook (Toshiba Chromebook 2) */ 514 .matches = { 515 DMI_MATCH(DMI_PRODUCT_NAME, "Swanky"), 516 }, 517 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 518 }, 519 { 520 /* Winky model Chromebook */ 521 .matches = { 522 DMI_MATCH(DMI_PRODUCT_NAME, "Winky"), 523 }, 524 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 525 }, 526 {} 527}; 528 529static int snd_cht_mc_probe(struct platform_device *pdev) 530{ 531 const struct dmi_system_id *dmi_id; 532 struct device *dev = &pdev->dev; 533 int ret_val = 0; 534 struct cht_mc_private *drv; 535 const char *mclk_name; 536 struct snd_soc_acpi_mach *mach; 537 const char *platform_name; 538 bool sof_parent; 539 540 drv = devm_kzalloc(dev, sizeof(*drv), GFP_KERNEL); 541 if (!drv) 542 return -ENOMEM; 543 544 dmi_id = dmi_first_match(cht_max98090_quirk_table); 545 if (dmi_id) 546 drv->quirks = (unsigned long)dmi_id->driver_data; 547 548 drv->ts3a227e_present = acpi_dev_found("104C227E"); 549 if (!drv->ts3a227e_present) { 550 /* no need probe TI jack detection chip */ 551 snd_soc_card_cht.aux_dev = NULL; 552 snd_soc_card_cht.num_aux_devs = 0; 553 554 ret_val = devm_acpi_dev_add_driver_gpios(dev->parent, 555 acpi_max98090_gpios); 556 if (ret_val) 557 dev_dbg(dev, "Unable to add GPIO mapping table\n"); 558 } 559 560 /* override platform name, if required */ 561 snd_soc_card_cht.dev = dev; 562 mach = dev->platform_data; 563 platform_name = mach->mach_params.platform; 564 565 ret_val = snd_soc_fixup_dai_links_platform_name(&snd_soc_card_cht, 566 platform_name); 567 if (ret_val) 568 return ret_val; 569 570 /* register the soc card */ 571 snd_soc_card_set_drvdata(&snd_soc_card_cht, drv); 572 573 if (drv->quirks & QUIRK_PMC_PLT_CLK_0) 574 mclk_name = "pmc_plt_clk_0"; 575 else 576 mclk_name = "pmc_plt_clk_3"; 577 578 drv->mclk = devm_clk_get(dev, mclk_name); 579 if (IS_ERR(drv->mclk)) { 580 dev_err(dev, 581 "Failed to get MCLK from %s: %ld\n", 582 mclk_name, PTR_ERR(drv->mclk)); 583 return PTR_ERR(drv->mclk); 584 } 585 586 /* 587 * Boards which have the MAX98090's clk connected to clk_0 do not seem 588 * to like it if we muck with the clock. If we disable the clock when 589 * it is unused we get "max98090 i2c-193C9890:00: PLL unlocked" errors 590 * and the PLL never seems to lock again. 591 * So for these boards we enable it here once and leave it at that. 592 */ 593 if (drv->quirks & QUIRK_PMC_PLT_CLK_0) { 594 ret_val = clk_prepare_enable(drv->mclk); 595 if (ret_val < 0) { 596 dev_err(dev, "MCLK enable error: %d\n", ret_val); 597 return ret_val; 598 } 599 } 600 601 sof_parent = snd_soc_acpi_sof_parent(dev); 602 603 /* set card and driver name */ 604 if (sof_parent) { 605 snd_soc_card_cht.name = SOF_CARD_NAME; 606 snd_soc_card_cht.driver_name = SOF_DRIVER_NAME; 607 } else { 608 snd_soc_card_cht.name = CARD_NAME; 609 snd_soc_card_cht.driver_name = DRIVER_NAME; 610 } 611 612 /* set pm ops */ 613 if (sof_parent) 614 dev->driver->pm = &snd_soc_pm_ops; 615 616 ret_val = devm_snd_soc_register_card(dev, &snd_soc_card_cht); 617 if (ret_val) { 618 dev_err(dev, 619 "snd_soc_register_card failed %d\n", ret_val); 620 return ret_val; 621 } 622 platform_set_drvdata(pdev, &snd_soc_card_cht); 623 return ret_val; 624} 625 626static void snd_cht_mc_remove(struct platform_device *pdev) 627{ 628 struct snd_soc_card *card = platform_get_drvdata(pdev); 629 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card); 630 631 if (ctx->quirks & QUIRK_PMC_PLT_CLK_0) 632 clk_disable_unprepare(ctx->mclk); 633} 634 635static struct platform_driver snd_cht_mc_driver = { 636 .driver = { 637 .name = "cht-bsw-max98090", 638 }, 639 .probe = snd_cht_mc_probe, 640 .remove_new = snd_cht_mc_remove, 641}; 642 643module_platform_driver(snd_cht_mc_driver) 644 645MODULE_DESCRIPTION("ASoC Intel(R) Braswell Machine driver"); 646MODULE_AUTHOR("Fang, Yang A <yang.a.fang@intel.com>"); 647MODULE_LICENSE("GPL v2"); 648MODULE_ALIAS("platform:cht-bsw-max98090"); 649