1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright(c) 2021-2022 Intel Corporation. All rights reserved. 4 * 5 * Authors: Cezary Rojewski <cezary.rojewski@intel.com> 6 * Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com> 7 */ 8 9#ifndef __SOUND_SOC_INTEL_AVS_MSGS_H 10#define __SOUND_SOC_INTEL_AVS_MSGS_H 11 12#include <linux/sizes.h> 13 14struct avs_dev; 15 16#define AVS_MAILBOX_SIZE SZ_4K 17 18enum avs_msg_target { 19 AVS_FW_GEN_MSG = 0, 20 AVS_MOD_MSG = 1 21}; 22 23enum avs_msg_direction { 24 AVS_MSG_REQUEST = 0, 25 AVS_MSG_REPLY = 1 26}; 27 28enum avs_global_msg_type { 29 AVS_GLB_ROM_CONTROL = 1, 30 AVS_GLB_LOAD_MULTIPLE_MODULES = 15, 31 AVS_GLB_UNLOAD_MULTIPLE_MODULES = 16, 32 AVS_GLB_CREATE_PIPELINE = 17, 33 AVS_GLB_DELETE_PIPELINE = 18, 34 AVS_GLB_SET_PIPELINE_STATE = 19, 35 AVS_GLB_GET_PIPELINE_STATE = 20, 36 AVS_GLB_LOAD_LIBRARY = 24, 37 AVS_GLB_NOTIFICATION = 27, 38}; 39 40union avs_global_msg { 41 u64 val; 42 struct { 43 union { 44 u32 primary; 45 struct { 46 u32 rsvd:24; 47 u32 global_msg_type:5; 48 u32 msg_direction:1; 49 u32 msg_target:1; 50 }; 51 /* set boot config */ 52 struct { 53 u32 rom_ctrl_msg_type:9; 54 u32 dma_id:5; 55 u32 purge_request:1; 56 } boot_cfg; 57 /* module loading */ 58 struct { 59 u32 mod_cnt:8; 60 } load_multi_mods; 61 /* pipeline management */ 62 struct { 63 u32 ppl_mem_size:11; 64 u32 ppl_priority:5; 65 u32 instance_id:8; 66 } create_ppl; 67 struct { 68 u32 rsvd:16; 69 u32 instance_id:8; 70 } ppl; /* generic ppl request */ 71 struct { 72 u32 state:16; 73 u32 ppl_id:8; 74 } set_ppl_state; 75 struct { 76 u32 ppl_id:8; 77 } get_ppl_state; 78 /* library loading */ 79 struct { 80 u32 dma_id:5; 81 u32 rsvd:11; 82 u32 lib_id:4; 83 } load_lib; 84 }; 85 union { 86 u32 val; 87 /* pipeline management */ 88 struct { 89 u32 lp:1; /* low power flag */ 90 u32 rsvd:3; 91 u32 attributes:16; /* additional scheduling flags */ 92 } create_ppl; 93 } ext; 94 }; 95} __packed; 96 97struct avs_tlv { 98 u32 type; 99 u32 length; 100 u32 value[]; 101} __packed; 102 103enum avs_module_msg_type { 104 AVS_MOD_INIT_INSTANCE = 0, 105 AVS_MOD_LARGE_CONFIG_GET = 3, 106 AVS_MOD_LARGE_CONFIG_SET = 4, 107 AVS_MOD_BIND = 5, 108 AVS_MOD_UNBIND = 6, 109 AVS_MOD_SET_DX = 7, 110 AVS_MOD_SET_D0IX = 8, 111 AVS_MOD_DELETE_INSTANCE = 11, 112}; 113 114union avs_module_msg { 115 u64 val; 116 struct { 117 union { 118 u32 primary; 119 struct { 120 u32 module_id:16; 121 u32 instance_id:8; 122 u32 module_msg_type:5; 123 u32 msg_direction:1; 124 u32 msg_target:1; 125 }; 126 }; 127 union { 128 u32 val; 129 struct { 130 u32 param_block_size:16; 131 u32 ppl_instance_id:8; 132 u32 core_id:4; 133 u32 proc_domain:1; 134 } init_instance; 135 struct { 136 u32 data_off_size:20; 137 u32 large_param_id:8; 138 u32 final_block:1; 139 u32 init_block:1; 140 } large_config; 141 struct { 142 u32 dst_module_id:16; 143 u32 dst_instance_id:8; 144 u32 dst_queue:3; 145 u32 src_queue:3; 146 } bind_unbind; 147 struct { 148 /* pre-IceLake */ 149 u32 wake:1; 150 u32 streaming:1; 151 /* IceLake and onwards */ 152 u32 prevent_pg:1; 153 u32 prevent_local_cg:1; 154 } set_d0ix; 155 } ext; 156 }; 157} __packed; 158 159#define AVS_IPC_NOT_SUPPORTED 15 160 161union avs_reply_msg { 162 u64 val; 163 struct { 164 union { 165 u32 primary; 166 struct { 167 u32 status:24; 168 u32 global_msg_type:5; 169 u32 msg_direction:1; 170 u32 msg_target:1; 171 }; 172 }; 173 union { 174 u32 val; 175 /* module loading */ 176 struct { 177 u32 err_mod_id:16; 178 } load_multi_mods; 179 /* pipeline management */ 180 struct { 181 u32 state:5; 182 } get_ppl_state; 183 /* module management */ 184 struct { 185 u32 data_off_size:20; 186 u32 large_param_id:8; 187 u32 final_block:1; 188 u32 init_block:1; 189 } large_config; 190 } ext; 191 }; 192} __packed; 193 194enum avs_notify_msg_type { 195 AVS_NOTIFY_PHRASE_DETECTED = 4, 196 AVS_NOTIFY_RESOURCE_EVENT = 5, 197 AVS_NOTIFY_LOG_BUFFER_STATUS = 6, 198 AVS_NOTIFY_FW_READY = 8, 199 AVS_NOTIFY_EXCEPTION_CAUGHT = 10, 200 AVS_NOTIFY_MODULE_EVENT = 12, 201}; 202 203union avs_notify_msg { 204 u64 val; 205 struct { 206 union { 207 u32 primary; 208 struct { 209 u32 rsvd:16; 210 u32 notify_msg_type:8; 211 u32 global_msg_type:5; 212 u32 msg_direction:1; 213 u32 msg_target:1; 214 }; 215 struct { 216 u16 rsvd:12; 217 u16 core:4; 218 } log; 219 }; 220 union { 221 u32 val; 222 struct { 223 u32 core_id:2; 224 u32 stack_dump_size:16; 225 } coredump; 226 } ext; 227 }; 228} __packed; 229 230#define AVS_MSG(hdr) { .val = hdr } 231 232#define AVS_GLOBAL_REQUEST(msg_type) \ 233{ \ 234 .global_msg_type = AVS_GLB_##msg_type, \ 235 .msg_direction = AVS_MSG_REQUEST, \ 236 .msg_target = AVS_FW_GEN_MSG, \ 237} 238 239#define AVS_MODULE_REQUEST(msg_type) \ 240{ \ 241 .module_msg_type = AVS_MOD_##msg_type, \ 242 .msg_direction = AVS_MSG_REQUEST, \ 243 .msg_target = AVS_MOD_MSG, \ 244} 245 246#define AVS_NOTIFICATION(msg_type) \ 247{ \ 248 .notify_msg_type = AVS_NOTIFY_##msg_type,\ 249 .global_msg_type = AVS_GLB_NOTIFICATION,\ 250 .msg_direction = AVS_MSG_REPLY, \ 251 .msg_target = AVS_FW_GEN_MSG, \ 252} 253 254#define avs_msg_is_reply(hdr) \ 255({ \ 256 union avs_reply_msg __msg = AVS_MSG(hdr); \ 257 __msg.msg_direction == AVS_MSG_REPLY && \ 258 __msg.global_msg_type != AVS_GLB_NOTIFICATION; \ 259}) 260 261/* Notification types */ 262 263struct avs_notify_voice_data { 264 u16 kpd_score; 265 u16 reserved; 266} __packed; 267 268struct avs_notify_res_data { 269 u32 resource_type; 270 u32 resource_id; 271 u32 event_type; 272 u32 reserved; 273 u32 data[6]; 274} __packed; 275 276struct avs_notify_mod_data { 277 u32 module_instance_id; 278 u32 event_id; 279 u32 data_size; 280 u32 data[]; 281} __packed; 282 283/* ROM messages */ 284enum avs_rom_control_msg_type { 285 AVS_ROM_SET_BOOT_CONFIG = 0, 286}; 287 288int avs_ipc_set_boot_config(struct avs_dev *adev, u32 dma_id, u32 purge); 289 290/* Code loading messages */ 291int avs_ipc_load_modules(struct avs_dev *adev, u16 *mod_ids, u32 num_mod_ids); 292int avs_ipc_unload_modules(struct avs_dev *adev, u16 *mod_ids, u32 num_mod_ids); 293int avs_ipc_load_library(struct avs_dev *adev, u32 dma_id, u32 lib_id); 294 295/* Pipeline management messages */ 296enum avs_pipeline_state { 297 AVS_PPL_STATE_INVALID, 298 AVS_PPL_STATE_UNINITIALIZED, 299 AVS_PPL_STATE_RESET, 300 AVS_PPL_STATE_PAUSED, 301 AVS_PPL_STATE_RUNNING, 302}; 303 304int avs_ipc_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority, 305 u8 instance_id, bool lp, u16 attributes); 306int avs_ipc_delete_pipeline(struct avs_dev *adev, u8 instance_id); 307int avs_ipc_set_pipeline_state(struct avs_dev *adev, u8 instance_id, 308 enum avs_pipeline_state state); 309int avs_ipc_get_pipeline_state(struct avs_dev *adev, u8 instance_id, 310 enum avs_pipeline_state *state); 311 312/* Module management messages */ 313int avs_ipc_init_instance(struct avs_dev *adev, u16 module_id, u8 instance_id, 314 u8 ppl_id, u8 core_id, u8 domain, 315 void *param, u32 param_size); 316int avs_ipc_delete_instance(struct avs_dev *adev, u16 module_id, u8 instance_id); 317int avs_ipc_bind(struct avs_dev *adev, u16 module_id, u8 instance_id, 318 u16 dst_module_id, u8 dst_instance_id, 319 u8 dst_queue, u8 src_queue); 320int avs_ipc_unbind(struct avs_dev *adev, u16 module_id, u8 instance_id, 321 u16 dst_module_id, u8 dst_instance_id, 322 u8 dst_queue, u8 src_queue); 323int avs_ipc_set_large_config(struct avs_dev *adev, u16 module_id, 324 u8 instance_id, u8 param_id, 325 u8 *request, size_t request_size); 326int avs_ipc_get_large_config(struct avs_dev *adev, u16 module_id, u8 instance_id, 327 u8 param_id, u8 *request_data, size_t request_size, 328 u8 **reply_data, size_t *reply_size); 329 330/* DSP cores and domains power management messages */ 331struct avs_dxstate_info { 332 u32 core_mask; /* which cores are subject for power transition */ 333 u32 dx_mask; /* bit[n]=1 core n goes to D0, bit[n]=0 it goes to D3 */ 334} __packed; 335 336int avs_ipc_set_dx(struct avs_dev *adev, u32 core_mask, bool powerup); 337int avs_ipc_set_d0ix(struct avs_dev *adev, bool enable_pg, bool streaming); 338 339/* Base-firmware runtime parameters */ 340 341#define AVS_BASEFW_MOD_ID 0 342#define AVS_BASEFW_INST_ID 0 343 344enum avs_basefw_runtime_param { 345 AVS_BASEFW_ENABLE_LOGS = 6, 346 AVS_BASEFW_FIRMWARE_CONFIG = 7, 347 AVS_BASEFW_HARDWARE_CONFIG = 8, 348 AVS_BASEFW_MODULES_INFO = 9, 349 AVS_BASEFW_LIBRARIES_INFO = 16, 350 AVS_BASEFW_SYSTEM_TIME = 20, 351}; 352 353enum avs_log_enable { 354 AVS_LOG_DISABLE = 0, 355 AVS_LOG_ENABLE = 1 356}; 357 358enum avs_skl_log_priority { 359 AVS_SKL_LOG_CRITICAL = 1, 360 AVS_SKL_LOG_HIGH, 361 AVS_SKL_LOG_MEDIUM, 362 AVS_SKL_LOG_LOW, 363 AVS_SKL_LOG_VERBOSE, 364}; 365 366struct avs_skl_log_state { 367 u32 enable; 368 u32 min_priority; 369} __packed; 370 371struct avs_skl_log_state_info { 372 u32 core_mask; 373 struct avs_skl_log_state logs_core[]; 374} __packed; 375 376struct avs_apl_log_state_info { 377 u32 aging_timer_period; 378 u32 fifo_full_timer_period; 379 u32 core_mask; 380 struct avs_skl_log_state logs_core[]; 381} __packed; 382 383enum avs_icl_log_priority { 384 AVS_ICL_LOG_CRITICAL = 0, 385 AVS_ICL_LOG_HIGH, 386 AVS_ICL_LOG_MEDIUM, 387 AVS_ICL_LOG_LOW, 388 AVS_ICL_LOG_VERBOSE, 389}; 390 391enum avs_icl_log_source { 392 AVS_ICL_LOG_INFRA = 0, 393 AVS_ICL_LOG_HAL, 394 AVS_ICL_LOG_MODULE, 395 AVS_ICL_LOG_AUDIO, 396 AVS_ICL_LOG_SENSING, 397 AVS_ICL_LOG_ULP_INFRA, 398}; 399 400struct avs_icl_log_state_info { 401 u32 aging_timer_period; 402 u32 fifo_full_timer_period; 403 u32 enable; 404 u32 logs_priorities_mask[]; 405} __packed; 406 407int avs_ipc_set_enable_logs(struct avs_dev *adev, u8 *log_info, size_t size); 408 409struct avs_fw_version { 410 u16 major; 411 u16 minor; 412 u16 hotfix; 413 u16 build; 414}; 415 416enum avs_fw_cfg_params { 417 AVS_FW_CFG_FW_VERSION = 0, 418 AVS_FW_CFG_MEMORY_RECLAIMED, 419 AVS_FW_CFG_SLOW_CLOCK_FREQ_HZ, 420 AVS_FW_CFG_FAST_CLOCK_FREQ_HZ, 421 AVS_FW_CFG_DMA_BUFFER_CONFIG, 422 AVS_FW_CFG_ALH_SUPPORT_LEVEL, 423 AVS_FW_CFG_IPC_DL_MAILBOX_BYTES, 424 AVS_FW_CFG_IPC_UL_MAILBOX_BYTES, 425 AVS_FW_CFG_TRACE_LOG_BYTES, 426 AVS_FW_CFG_MAX_PPL_COUNT, 427 AVS_FW_CFG_MAX_ASTATE_COUNT, 428 AVS_FW_CFG_MAX_MODULE_PIN_COUNT, 429 AVS_FW_CFG_MODULES_COUNT, 430 AVS_FW_CFG_MAX_MOD_INST_COUNT, 431 AVS_FW_CFG_MAX_LL_TASKS_PER_PRI_COUNT, 432 AVS_FW_CFG_LL_PRI_COUNT, 433 AVS_FW_CFG_MAX_DP_TASKS_COUNT, 434 AVS_FW_CFG_MAX_LIBS_COUNT, 435 AVS_FW_CFG_SCHEDULER_CONFIG, 436 AVS_FW_CFG_XTAL_FREQ_HZ, 437 AVS_FW_CFG_CLOCKS_CONFIG, 438 AVS_FW_CFG_RESERVED, 439 AVS_FW_CFG_POWER_GATING_POLICY, 440 AVS_FW_CFG_ASSERT_MODE, 441}; 442 443struct avs_fw_cfg { 444 struct avs_fw_version fw_version; 445 u32 memory_reclaimed; 446 u32 slow_clock_freq_hz; 447 u32 fast_clock_freq_hz; 448 u32 alh_support; 449 u32 ipc_dl_mailbox_bytes; 450 u32 ipc_ul_mailbox_bytes; 451 u32 trace_log_bytes; 452 u32 max_ppl_count; 453 u32 max_astate_count; 454 u32 max_module_pin_count; 455 u32 modules_count; 456 u32 max_mod_inst_count; 457 u32 max_ll_tasks_per_pri_count; 458 u32 ll_pri_count; 459 u32 max_dp_tasks_count; 460 u32 max_libs_count; 461 u32 xtal_freq_hz; 462 u32 power_gating_policy; 463}; 464 465int avs_ipc_get_fw_config(struct avs_dev *adev, struct avs_fw_cfg *cfg); 466 467enum avs_hw_cfg_params { 468 AVS_HW_CFG_AVS_VER, 469 AVS_HW_CFG_DSP_CORES, 470 AVS_HW_CFG_MEM_PAGE_BYTES, 471 AVS_HW_CFG_TOTAL_PHYS_MEM_PAGES, 472 AVS_HW_CFG_I2S_CAPS, 473 AVS_HW_CFG_GPDMA_CAPS, 474 AVS_HW_CFG_GATEWAY_COUNT, 475 AVS_HW_CFG_HP_EBB_COUNT, 476 AVS_HW_CFG_LP_EBB_COUNT, 477 AVS_HW_CFG_EBB_SIZE_BYTES, 478}; 479 480enum avs_iface_version { 481 AVS_AVS_VER_1_5 = 0x10005, 482 AVS_AVS_VER_1_8 = 0x10008, 483}; 484 485enum avs_i2s_version { 486 AVS_I2S_VER_15_SKYLAKE = 0x00000, 487 AVS_I2S_VER_15_BROXTON = 0x10000, 488 AVS_I2S_VER_15_BROXTON_P = 0x20000, 489 AVS_I2S_VER_18_KBL_CNL = 0x30000, 490}; 491 492struct avs_i2s_caps { 493 u32 i2s_version; 494 u32 ctrl_count; 495 u32 *ctrl_base_addr; 496}; 497 498struct avs_hw_cfg { 499 u32 avs_version; 500 u32 dsp_cores; 501 u32 mem_page_bytes; 502 u32 total_phys_mem_pages; 503 struct avs_i2s_caps i2s_caps; 504 u32 gateway_count; 505 u32 hp_ebb_count; 506 u32 lp_ebb_count; 507 u32 ebb_size_bytes; 508}; 509 510int avs_ipc_get_hw_config(struct avs_dev *adev, struct avs_hw_cfg *cfg); 511 512#define AVS_MODULE_LOAD_TYPE_BUILTIN 0 513#define AVS_MODULE_LOAD_TYPE_LOADABLE 1 514#define AVS_MODULE_STATE_LOADED BIT(0) 515 516struct avs_module_type { 517 u32 load_type:4; 518 u32 auto_start:1; 519 u32 domain_ll:1; 520 u32 domain_dp:1; 521 u32 lib_code:1; 522 u32 rsvd:24; 523} __packed; 524 525union avs_segment_flags { 526 u32 ul; 527 struct { 528 u32 contents:1; 529 u32 alloc:1; 530 u32 load:1; 531 u32 readonly:1; 532 u32 code:1; 533 u32 data:1; 534 u32 rsvd_1:2; 535 u32 type:4; 536 u32 rsvd_2:4; 537 u32 length:16; 538 }; 539} __packed; 540 541struct avs_segment_desc { 542 union avs_segment_flags flags; 543 u32 v_base_addr; 544 u32 file_offset; 545} __packed; 546 547struct avs_module_entry { 548 u16 module_id; 549 u16 state_flags; 550 u8 name[8]; 551 guid_t uuid; 552 struct avs_module_type type; 553 u8 hash[32]; 554 u32 entry_point; 555 u16 cfg_offset; 556 u16 cfg_count; 557 u32 affinity_mask; 558 u16 instance_max_count; 559 u16 instance_bss_size; 560 struct avs_segment_desc segments[3]; 561} __packed; 562 563struct avs_mods_info { 564 u32 count; 565 struct avs_module_entry entries[]; 566} __packed; 567 568static inline bool avs_module_entry_is_loaded(struct avs_module_entry *mentry) 569{ 570 return mentry->type.load_type == AVS_MODULE_LOAD_TYPE_BUILTIN || 571 mentry->state_flags & AVS_MODULE_STATE_LOADED; 572} 573 574int avs_ipc_get_modules_info(struct avs_dev *adev, struct avs_mods_info **info); 575 576struct avs_sys_time { 577 u32 val_l; 578 u32 val_u; 579} __packed; 580 581int avs_ipc_set_system_time(struct avs_dev *adev); 582 583/* Module configuration */ 584 585#define AVS_MIXIN_MOD_UUID \ 586 GUID_INIT(0x39656EB2, 0x3B71, 0x4049, 0x8D, 0x3F, 0xF9, 0x2C, 0xD5, 0xC4, 0x3C, 0x09) 587 588#define AVS_MIXOUT_MOD_UUID \ 589 GUID_INIT(0x3C56505A, 0x24D7, 0x418F, 0xBD, 0xDC, 0xC1, 0xF5, 0xA3, 0xAC, 0x2A, 0xE0) 590 591#define AVS_COPIER_MOD_UUID \ 592 GUID_INIT(0x9BA00C83, 0xCA12, 0x4A83, 0x94, 0x3C, 0x1F, 0xA2, 0xE8, 0x2F, 0x9D, 0xDA) 593 594#define AVS_PEAKVOL_MOD_UUID \ 595 GUID_INIT(0x8A171323, 0x94A3, 0x4E1D, 0xAF, 0xE9, 0xFE, 0x5D, 0xBA, 0xa4, 0xC3, 0x93) 596 597#define AVS_GAIN_MOD_UUID \ 598 GUID_INIT(0x61BCA9A8, 0x18D0, 0x4A18, 0x8E, 0x7B, 0x26, 0x39, 0x21, 0x98, 0x04, 0xB7) 599 600#define AVS_KPBUFF_MOD_UUID \ 601 GUID_INIT(0xA8A0CB32, 0x4A77, 0x4DB1, 0x85, 0xC7, 0x53, 0xD7, 0xEE, 0x07, 0xBC, 0xE6) 602 603#define AVS_MICSEL_MOD_UUID \ 604 GUID_INIT(0x32FE92C1, 0x1E17, 0x4FC2, 0x97, 0x58, 0xC7, 0xF3, 0x54, 0x2E, 0x98, 0x0A) 605 606#define AVS_MUX_MOD_UUID \ 607 GUID_INIT(0x64CE6E35, 0x857A, 0x4878, 0xAC, 0xE8, 0xE2, 0xA2, 0xF4, 0x2e, 0x30, 0x69) 608 609#define AVS_UPDWMIX_MOD_UUID \ 610 GUID_INIT(0x42F8060C, 0x832F, 0x4DBF, 0xB2, 0x47, 0x51, 0xE9, 0x61, 0x99, 0x7b, 0x35) 611 612#define AVS_SRCINTC_MOD_UUID \ 613 GUID_INIT(0xE61BB28D, 0x149A, 0x4C1F, 0xB7, 0x09, 0x46, 0x82, 0x3E, 0xF5, 0xF5, 0xAE) 614 615#define AVS_PROBE_MOD_UUID \ 616 GUID_INIT(0x7CAD0808, 0xAB10, 0xCD23, 0xEF, 0x45, 0x12, 0xAB, 0x34, 0xCD, 0x56, 0xEF) 617 618#define AVS_AEC_MOD_UUID \ 619 GUID_INIT(0x46CB87FB, 0xD2C9, 0x4970, 0x96, 0xD2, 0x6D, 0x7E, 0x61, 0x4B, 0xB6, 0x05) 620 621#define AVS_ASRC_MOD_UUID \ 622 GUID_INIT(0x66B4402D, 0xB468, 0x42F2, 0x81, 0xA7, 0xB3, 0x71, 0x21, 0x86, 0x3D, 0xD4) 623 624#define AVS_INTELWOV_MOD_UUID \ 625 GUID_INIT(0xEC774FA9, 0x28D3, 0x424A, 0x90, 0xE4, 0x69, 0xF9, 0x84, 0xF1, 0xEE, 0xB7) 626 627/* channel map */ 628enum avs_channel_index { 629 AVS_CHANNEL_LEFT = 0, 630 AVS_CHANNEL_RIGHT = 1, 631 AVS_CHANNEL_CENTER = 2, 632 AVS_CHANNEL_LEFT_SURROUND = 3, 633 AVS_CHANNEL_CENTER_SURROUND = 3, 634 AVS_CHANNEL_RIGHT_SURROUND = 4, 635 AVS_CHANNEL_LFE = 7, 636 AVS_CHANNEL_INVALID = 0xF, 637}; 638 639enum avs_channel_config { 640 AVS_CHANNEL_CONFIG_MONO = 0, 641 AVS_CHANNEL_CONFIG_STEREO = 1, 642 AVS_CHANNEL_CONFIG_2_1 = 2, 643 AVS_CHANNEL_CONFIG_3_0 = 3, 644 AVS_CHANNEL_CONFIG_3_1 = 4, 645 AVS_CHANNEL_CONFIG_QUATRO = 5, 646 AVS_CHANNEL_CONFIG_4_0 = 6, 647 AVS_CHANNEL_CONFIG_5_0 = 7, 648 AVS_CHANNEL_CONFIG_5_1 = 8, 649 AVS_CHANNEL_CONFIG_DUAL_MONO = 9, 650 AVS_CHANNEL_CONFIG_I2S_DUAL_STEREO_0 = 10, 651 AVS_CHANNEL_CONFIG_I2S_DUAL_STEREO_1 = 11, 652 AVS_CHANNEL_CONFIG_7_1 = 12, 653 AVS_CHANNEL_CONFIG_INVALID 654}; 655 656enum avs_interleaving { 657 AVS_INTERLEAVING_PER_CHANNEL = 0, 658 AVS_INTERLEAVING_PER_SAMPLE = 1, 659}; 660 661enum avs_sample_type { 662 AVS_SAMPLE_TYPE_INT_MSB = 0, 663 AVS_SAMPLE_TYPE_INT_LSB = 1, 664 AVS_SAMPLE_TYPE_INT_SIGNED = 2, 665 AVS_SAMPLE_TYPE_INT_UNSIGNED = 3, 666 AVS_SAMPLE_TYPE_FLOAT = 4, 667}; 668 669#define AVS_CHANNELS_MAX 8 670#define AVS_ALL_CHANNELS_MASK UINT_MAX 671 672struct avs_audio_format { 673 u32 sampling_freq; 674 u32 bit_depth; 675 u32 channel_map; 676 u32 channel_config; 677 u32 interleaving; 678 u32 num_channels:8; 679 u32 valid_bit_depth:8; 680 u32 sample_type:8; 681 u32 reserved:8; 682} __packed; 683 684struct avs_modcfg_base { 685 u32 cpc; 686 u32 ibs; 687 u32 obs; 688 u32 is_pages; 689 struct avs_audio_format audio_fmt; 690} __packed; 691 692struct avs_pin_format { 693 u32 pin_index; 694 u32 iobs; 695 struct avs_audio_format audio_fmt; 696} __packed; 697 698struct avs_modcfg_ext { 699 struct avs_modcfg_base base; 700 u16 num_input_pins; 701 u16 num_output_pins; 702 u8 reserved[12]; 703 /* input pin formats followed by output ones */ 704 struct avs_pin_format pin_fmts[]; 705} __packed; 706 707enum avs_dma_type { 708 AVS_DMA_HDA_HOST_OUTPUT = 0, 709 AVS_DMA_HDA_HOST_INPUT = 1, 710 AVS_DMA_HDA_LINK_OUTPUT = 8, 711 AVS_DMA_HDA_LINK_INPUT = 9, 712 AVS_DMA_DMIC_LINK_INPUT = 11, 713 AVS_DMA_I2S_LINK_OUTPUT = 12, 714 AVS_DMA_I2S_LINK_INPUT = 13, 715}; 716 717union avs_virtual_index { 718 u8 val; 719 struct { 720 u8 time_slot:4; 721 u8 instance:4; 722 } i2s; 723 struct { 724 u8 queue_id:3; 725 u8 time_slot:2; 726 u8 instance:3; 727 } dmic; 728} __packed; 729 730union avs_connector_node_id { 731 u32 val; 732 struct { 733 u32 vindex:8; 734 u32 dma_type:5; 735 u32 rsvd:19; 736 }; 737} __packed; 738 739#define INVALID_PIPELINE_ID 0xFF 740#define INVALID_NODE_ID \ 741 ((union avs_connector_node_id) { UINT_MAX }) 742 743union avs_gtw_attributes { 744 u32 val; 745 struct { 746 u32 lp_buffer_alloc:1; 747 u32 rsvd:31; 748 }; 749} __packed; 750 751struct avs_copier_gtw_cfg { 752 union avs_connector_node_id node_id; 753 u32 dma_buffer_size; 754 u32 config_length; 755 struct { 756 union avs_gtw_attributes attrs; 757 u32 blob[]; 758 } config; 759} __packed; 760 761struct avs_copier_cfg { 762 struct avs_modcfg_base base; 763 struct avs_audio_format out_fmt; 764 u32 feature_mask; 765 struct avs_copier_gtw_cfg gtw_cfg; 766} __packed; 767 768struct avs_volume_cfg { 769 u32 channel_id; 770 u32 target_volume; 771 u32 curve_type; 772 u32 reserved; /* alignment */ 773 u64 curve_duration; 774} __packed; 775 776struct avs_peakvol_cfg { 777 struct avs_modcfg_base base; 778 struct avs_volume_cfg vols[]; 779} __packed; 780 781struct avs_micsel_cfg { 782 struct avs_modcfg_base base; 783 struct avs_audio_format out_fmt; 784} __packed; 785 786struct avs_mux_cfg { 787 struct avs_modcfg_base base; 788 struct avs_audio_format ref_fmt; 789 struct avs_audio_format out_fmt; 790} __packed; 791 792struct avs_updown_mixer_cfg { 793 struct avs_modcfg_base base; 794 u32 out_channel_config; 795 u32 coefficients_select; 796 s32 coefficients[AVS_CHANNELS_MAX]; 797 u32 channel_map; 798} __packed; 799 800struct avs_src_cfg { 801 struct avs_modcfg_base base; 802 u32 out_freq; 803} __packed; 804 805struct avs_probe_gtw_cfg { 806 union avs_connector_node_id node_id; 807 u32 dma_buffer_size; 808} __packed; 809 810struct avs_probe_cfg { 811 struct avs_modcfg_base base; 812 struct avs_probe_gtw_cfg gtw_cfg; 813} __packed; 814 815struct avs_aec_cfg { 816 struct avs_modcfg_base base; 817 struct avs_audio_format ref_fmt; 818 struct avs_audio_format out_fmt; 819 u32 cpc_lp_mode; 820} __packed; 821 822struct avs_asrc_cfg { 823 struct avs_modcfg_base base; 824 u32 out_freq; 825 u32 rsvd0:1; 826 u32 mode:1; 827 u32 rsvd2:2; 828 u32 disable_jitter_buffer:1; 829 u32 rsvd3:27; 830} __packed; 831 832struct avs_wov_cfg { 833 struct avs_modcfg_base base; 834 u32 cpc_lp_mode; 835} __packed; 836 837/* Module runtime parameters */ 838 839enum avs_copier_runtime_param { 840 AVS_COPIER_SET_SINK_FORMAT = 2, 841}; 842 843struct avs_copier_sink_format { 844 u32 sink_id; 845 struct avs_audio_format src_fmt; 846 struct avs_audio_format sink_fmt; 847} __packed; 848 849int avs_ipc_copier_set_sink_format(struct avs_dev *adev, u16 module_id, 850 u8 instance_id, u32 sink_id, 851 const struct avs_audio_format *src_fmt, 852 const struct avs_audio_format *sink_fmt); 853 854enum avs_peakvol_runtime_param { 855 AVS_PEAKVOL_VOLUME = 0, 856}; 857 858enum avs_audio_curve_type { 859 AVS_AUDIO_CURVE_NONE = 0, 860 AVS_AUDIO_CURVE_WINDOWS_FADE = 1, 861}; 862 863int avs_ipc_peakvol_set_volume(struct avs_dev *adev, u16 module_id, u8 instance_id, 864 struct avs_volume_cfg *vol); 865int avs_ipc_peakvol_get_volume(struct avs_dev *adev, u16 module_id, u8 instance_id, 866 struct avs_volume_cfg **vols, size_t *num_vols); 867 868#define AVS_PROBE_INST_ID 0 869 870enum avs_probe_runtime_param { 871 AVS_PROBE_INJECTION_DMA = 1, 872 AVS_PROBE_INJECTION_DMA_DETACH, 873 AVS_PROBE_POINTS, 874 AVS_PROBE_POINTS_DISCONNECT, 875}; 876 877struct avs_probe_dma { 878 union avs_connector_node_id node_id; 879 u32 dma_buffer_size; 880} __packed; 881 882enum avs_probe_type { 883 AVS_PROBE_TYPE_INPUT = 0, 884 AVS_PROBE_TYPE_OUTPUT, 885 AVS_PROBE_TYPE_INTERNAL 886}; 887 888union avs_probe_point_id { 889 u32 value; 890 struct { 891 u32 module_id:16; 892 u32 instance_id:8; 893 u32 type:2; 894 u32 index:6; 895 } id; 896} __packed; 897 898enum avs_connection_purpose { 899 AVS_CONNECTION_PURPOSE_EXTRACT = 0, 900 AVS_CONNECTION_PURPOSE_INJECT, 901 AVS_CONNECTION_PURPOSE_INJECT_REEXTRACT, 902}; 903 904struct avs_probe_point_desc { 905 union avs_probe_point_id id; 906 u32 purpose; 907 union avs_connector_node_id node_id; 908} __packed; 909 910int avs_ipc_probe_get_dma(struct avs_dev *adev, struct avs_probe_dma **dmas, size_t *num_dmas); 911int avs_ipc_probe_attach_dma(struct avs_dev *adev, struct avs_probe_dma *dmas, size_t num_dmas); 912int avs_ipc_probe_detach_dma(struct avs_dev *adev, union avs_connector_node_id *node_ids, 913 size_t num_node_ids); 914int avs_ipc_probe_get_points(struct avs_dev *adev, struct avs_probe_point_desc **descs, 915 size_t *num_descs); 916int avs_ipc_probe_connect_points(struct avs_dev *adev, struct avs_probe_point_desc *descs, 917 size_t num_descs); 918int avs_ipc_probe_disconnect_points(struct avs_dev *adev, union avs_probe_point_id *ids, 919 size_t num_ids); 920 921#endif /* __SOUND_SOC_INTEL_AVS_MSGS_H */ 922