1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * wm8955.h -- WM8904 ASoC driver 4 * 5 * Copyright 2009 Wolfson Microelectronics, plc 6 * 7 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 8 */ 9 10#ifndef _WM8955_H 11#define _WM8955_H 12 13#define WM8955_CLK_MCLK 1 14 15/* 16 * Register values. 17 */ 18#define WM8955_LOUT1_VOLUME 0x02 19#define WM8955_ROUT1_VOLUME 0x03 20#define WM8955_DAC_CONTROL 0x05 21#define WM8955_AUDIO_INTERFACE 0x07 22#define WM8955_SAMPLE_RATE 0x08 23#define WM8955_LEFT_DAC_VOLUME 0x0A 24#define WM8955_RIGHT_DAC_VOLUME 0x0B 25#define WM8955_BASS_CONTROL 0x0C 26#define WM8955_TREBLE_CONTROL 0x0D 27#define WM8955_RESET 0x0F 28#define WM8955_ADDITIONAL_CONTROL_1 0x17 29#define WM8955_ADDITIONAL_CONTROL_2 0x18 30#define WM8955_POWER_MANAGEMENT_1 0x19 31#define WM8955_POWER_MANAGEMENT_2 0x1A 32#define WM8955_ADDITIONAL_CONTROL_3 0x1B 33#define WM8955_LEFT_OUT_MIX_1 0x22 34#define WM8955_LEFT_OUT_MIX_2 0x23 35#define WM8955_RIGHT_OUT_MIX_1 0x24 36#define WM8955_RIGHT_OUT_MIX_2 0x25 37#define WM8955_MONO_OUT_MIX_1 0x26 38#define WM8955_MONO_OUT_MIX_2 0x27 39#define WM8955_LOUT2_VOLUME 0x28 40#define WM8955_ROUT2_VOLUME 0x29 41#define WM8955_MONOOUT_VOLUME 0x2A 42#define WM8955_CLOCKING_PLL 0x2B 43#define WM8955_PLL_CONTROL_1 0x2C 44#define WM8955_PLL_CONTROL_2 0x2D 45#define WM8955_PLL_CONTROL_3 0x2E 46#define WM8955_PLL_CONTROL_4 0x3B 47 48#define WM8955_REGISTER_COUNT 29 49#define WM8955_MAX_REGISTER 0x3B 50 51/* 52 * Field Definitions. 53 */ 54 55/* 56 * R2 (0x02) - LOUT1 volume 57 */ 58#define WM8955_LO1VU 0x0100 /* LO1VU */ 59#define WM8955_LO1VU_MASK 0x0100 /* LO1VU */ 60#define WM8955_LO1VU_SHIFT 8 /* LO1VU */ 61#define WM8955_LO1VU_WIDTH 1 /* LO1VU */ 62#define WM8955_LO1ZC 0x0080 /* LO1ZC */ 63#define WM8955_LO1ZC_MASK 0x0080 /* LO1ZC */ 64#define WM8955_LO1ZC_SHIFT 7 /* LO1ZC */ 65#define WM8955_LO1ZC_WIDTH 1 /* LO1ZC */ 66#define WM8955_LOUTVOL_MASK 0x007F /* LOUTVOL - [6:0] */ 67#define WM8955_LOUTVOL_SHIFT 0 /* LOUTVOL - [6:0] */ 68#define WM8955_LOUTVOL_WIDTH 7 /* LOUTVOL - [6:0] */ 69 70/* 71 * R3 (0x03) - ROUT1 volume 72 */ 73#define WM8955_RO1VU 0x0100 /* RO1VU */ 74#define WM8955_RO1VU_MASK 0x0100 /* RO1VU */ 75#define WM8955_RO1VU_SHIFT 8 /* RO1VU */ 76#define WM8955_RO1VU_WIDTH 1 /* RO1VU */ 77#define WM8955_RO1ZC 0x0080 /* RO1ZC */ 78#define WM8955_RO1ZC_MASK 0x0080 /* RO1ZC */ 79#define WM8955_RO1ZC_SHIFT 7 /* RO1ZC */ 80#define WM8955_RO1ZC_WIDTH 1 /* RO1ZC */ 81#define WM8955_ROUTVOL_MASK 0x007F /* ROUTVOL - [6:0] */ 82#define WM8955_ROUTVOL_SHIFT 0 /* ROUTVOL - [6:0] */ 83#define WM8955_ROUTVOL_WIDTH 7 /* ROUTVOL - [6:0] */ 84 85/* 86 * R5 (0x05) - DAC Control 87 */ 88#define WM8955_DAT 0x0080 /* DAT */ 89#define WM8955_DAT_MASK 0x0080 /* DAT */ 90#define WM8955_DAT_SHIFT 7 /* DAT */ 91#define WM8955_DAT_WIDTH 1 /* DAT */ 92#define WM8955_DACMU 0x0008 /* DACMU */ 93#define WM8955_DACMU_MASK 0x0008 /* DACMU */ 94#define WM8955_DACMU_SHIFT 3 /* DACMU */ 95#define WM8955_DACMU_WIDTH 1 /* DACMU */ 96#define WM8955_DEEMPH_MASK 0x0006 /* DEEMPH - [2:1] */ 97#define WM8955_DEEMPH_SHIFT 1 /* DEEMPH - [2:1] */ 98#define WM8955_DEEMPH_WIDTH 2 /* DEEMPH - [2:1] */ 99 100/* 101 * R7 (0x07) - Audio Interface 102 */ 103#define WM8955_BCLKINV 0x0080 /* BCLKINV */ 104#define WM8955_BCLKINV_MASK 0x0080 /* BCLKINV */ 105#define WM8955_BCLKINV_SHIFT 7 /* BCLKINV */ 106#define WM8955_BCLKINV_WIDTH 1 /* BCLKINV */ 107#define WM8955_MS 0x0040 /* MS */ 108#define WM8955_MS_MASK 0x0040 /* MS */ 109#define WM8955_MS_SHIFT 6 /* MS */ 110#define WM8955_MS_WIDTH 1 /* MS */ 111#define WM8955_LRSWAP 0x0020 /* LRSWAP */ 112#define WM8955_LRSWAP_MASK 0x0020 /* LRSWAP */ 113#define WM8955_LRSWAP_SHIFT 5 /* LRSWAP */ 114#define WM8955_LRSWAP_WIDTH 1 /* LRSWAP */ 115#define WM8955_LRP 0x0010 /* LRP */ 116#define WM8955_LRP_MASK 0x0010 /* LRP */ 117#define WM8955_LRP_SHIFT 4 /* LRP */ 118#define WM8955_LRP_WIDTH 1 /* LRP */ 119#define WM8955_WL_MASK 0x000C /* WL - [3:2] */ 120#define WM8955_WL_SHIFT 2 /* WL - [3:2] */ 121#define WM8955_WL_WIDTH 2 /* WL - [3:2] */ 122#define WM8955_FORMAT_MASK 0x0003 /* FORMAT - [1:0] */ 123#define WM8955_FORMAT_SHIFT 0 /* FORMAT - [1:0] */ 124#define WM8955_FORMAT_WIDTH 2 /* FORMAT - [1:0] */ 125 126/* 127 * R8 (0x08) - Sample Rate 128 */ 129#define WM8955_BCLKDIV2 0x0080 /* BCLKDIV2 */ 130#define WM8955_BCLKDIV2_MASK 0x0080 /* BCLKDIV2 */ 131#define WM8955_BCLKDIV2_SHIFT 7 /* BCLKDIV2 */ 132#define WM8955_BCLKDIV2_WIDTH 1 /* BCLKDIV2 */ 133#define WM8955_MCLKDIV2 0x0040 /* MCLKDIV2 */ 134#define WM8955_MCLKDIV2_MASK 0x0040 /* MCLKDIV2 */ 135#define WM8955_MCLKDIV2_SHIFT 6 /* MCLKDIV2 */ 136#define WM8955_MCLKDIV2_WIDTH 1 /* MCLKDIV2 */ 137#define WM8955_SR_MASK 0x003E /* SR - [5:1] */ 138#define WM8955_SR_SHIFT 1 /* SR - [5:1] */ 139#define WM8955_SR_WIDTH 5 /* SR - [5:1] */ 140#define WM8955_USB 0x0001 /* USB */ 141#define WM8955_USB_MASK 0x0001 /* USB */ 142#define WM8955_USB_SHIFT 0 /* USB */ 143#define WM8955_USB_WIDTH 1 /* USB */ 144 145/* 146 * R10 (0x0A) - Left DAC volume 147 */ 148#define WM8955_LDVU 0x0100 /* LDVU */ 149#define WM8955_LDVU_MASK 0x0100 /* LDVU */ 150#define WM8955_LDVU_SHIFT 8 /* LDVU */ 151#define WM8955_LDVU_WIDTH 1 /* LDVU */ 152#define WM8955_LDACVOL_MASK 0x00FF /* LDACVOL - [7:0] */ 153#define WM8955_LDACVOL_SHIFT 0 /* LDACVOL - [7:0] */ 154#define WM8955_LDACVOL_WIDTH 8 /* LDACVOL - [7:0] */ 155 156/* 157 * R11 (0x0B) - Right DAC volume 158 */ 159#define WM8955_RDVU 0x0100 /* RDVU */ 160#define WM8955_RDVU_MASK 0x0100 /* RDVU */ 161#define WM8955_RDVU_SHIFT 8 /* RDVU */ 162#define WM8955_RDVU_WIDTH 1 /* RDVU */ 163#define WM8955_RDACVOL_MASK 0x00FF /* RDACVOL - [7:0] */ 164#define WM8955_RDACVOL_SHIFT 0 /* RDACVOL - [7:0] */ 165#define WM8955_RDACVOL_WIDTH 8 /* RDACVOL - [7:0] */ 166 167/* 168 * R12 (0x0C) - Bass control 169 */ 170#define WM8955_BB 0x0080 /* BB */ 171#define WM8955_BB_MASK 0x0080 /* BB */ 172#define WM8955_BB_SHIFT 7 /* BB */ 173#define WM8955_BB_WIDTH 1 /* BB */ 174#define WM8955_BC 0x0040 /* BC */ 175#define WM8955_BC_MASK 0x0040 /* BC */ 176#define WM8955_BC_SHIFT 6 /* BC */ 177#define WM8955_BC_WIDTH 1 /* BC */ 178#define WM8955_BASS_MASK 0x000F /* BASS - [3:0] */ 179#define WM8955_BASS_SHIFT 0 /* BASS - [3:0] */ 180#define WM8955_BASS_WIDTH 4 /* BASS - [3:0] */ 181 182/* 183 * R13 (0x0D) - Treble control 184 */ 185#define WM8955_TC 0x0040 /* TC */ 186#define WM8955_TC_MASK 0x0040 /* TC */ 187#define WM8955_TC_SHIFT 6 /* TC */ 188#define WM8955_TC_WIDTH 1 /* TC */ 189#define WM8955_TRBL_MASK 0x000F /* TRBL - [3:0] */ 190#define WM8955_TRBL_SHIFT 0 /* TRBL - [3:0] */ 191#define WM8955_TRBL_WIDTH 4 /* TRBL - [3:0] */ 192 193/* 194 * R15 (0x0F) - Reset 195 */ 196#define WM8955_RESET_MASK 0x01FF /* RESET - [8:0] */ 197#define WM8955_RESET_SHIFT 0 /* RESET - [8:0] */ 198#define WM8955_RESET_WIDTH 9 /* RESET - [8:0] */ 199 200/* 201 * R23 (0x17) - Additional control (1) 202 */ 203#define WM8955_TSDEN 0x0100 /* TSDEN */ 204#define WM8955_TSDEN_MASK 0x0100 /* TSDEN */ 205#define WM8955_TSDEN_SHIFT 8 /* TSDEN */ 206#define WM8955_TSDEN_WIDTH 1 /* TSDEN */ 207#define WM8955_VSEL_MASK 0x00C0 /* VSEL - [7:6] */ 208#define WM8955_VSEL_SHIFT 6 /* VSEL - [7:6] */ 209#define WM8955_VSEL_WIDTH 2 /* VSEL - [7:6] */ 210#define WM8955_DMONOMIX_MASK 0x0030 /* DMONOMIX - [5:4] */ 211#define WM8955_DMONOMIX_SHIFT 4 /* DMONOMIX - [5:4] */ 212#define WM8955_DMONOMIX_WIDTH 2 /* DMONOMIX - [5:4] */ 213#define WM8955_DACINV 0x0002 /* DACINV */ 214#define WM8955_DACINV_MASK 0x0002 /* DACINV */ 215#define WM8955_DACINV_SHIFT 1 /* DACINV */ 216#define WM8955_DACINV_WIDTH 1 /* DACINV */ 217#define WM8955_TOEN 0x0001 /* TOEN */ 218#define WM8955_TOEN_MASK 0x0001 /* TOEN */ 219#define WM8955_TOEN_SHIFT 0 /* TOEN */ 220#define WM8955_TOEN_WIDTH 1 /* TOEN */ 221 222/* 223 * R24 (0x18) - Additional control (2) 224 */ 225#define WM8955_OUT3SW_MASK 0x0180 /* OUT3SW - [8:7] */ 226#define WM8955_OUT3SW_SHIFT 7 /* OUT3SW - [8:7] */ 227#define WM8955_OUT3SW_WIDTH 2 /* OUT3SW - [8:7] */ 228#define WM8955_ROUT2INV 0x0010 /* ROUT2INV */ 229#define WM8955_ROUT2INV_MASK 0x0010 /* ROUT2INV */ 230#define WM8955_ROUT2INV_SHIFT 4 /* ROUT2INV */ 231#define WM8955_ROUT2INV_WIDTH 1 /* ROUT2INV */ 232#define WM8955_DACOSR 0x0001 /* DACOSR */ 233#define WM8955_DACOSR_MASK 0x0001 /* DACOSR */ 234#define WM8955_DACOSR_SHIFT 0 /* DACOSR */ 235#define WM8955_DACOSR_WIDTH 1 /* DACOSR */ 236 237/* 238 * R25 (0x19) - Power Management (1) 239 */ 240#define WM8955_VMIDSEL_MASK 0x0180 /* VMIDSEL - [8:7] */ 241#define WM8955_VMIDSEL_SHIFT 7 /* VMIDSEL - [8:7] */ 242#define WM8955_VMIDSEL_WIDTH 2 /* VMIDSEL - [8:7] */ 243#define WM8955_VREF 0x0040 /* VREF */ 244#define WM8955_VREF_MASK 0x0040 /* VREF */ 245#define WM8955_VREF_SHIFT 6 /* VREF */ 246#define WM8955_VREF_WIDTH 1 /* VREF */ 247#define WM8955_DIGENB 0x0001 /* DIGENB */ 248#define WM8955_DIGENB_MASK 0x0001 /* DIGENB */ 249#define WM8955_DIGENB_SHIFT 0 /* DIGENB */ 250#define WM8955_DIGENB_WIDTH 1 /* DIGENB */ 251 252/* 253 * R26 (0x1A) - Power Management (2) 254 */ 255#define WM8955_DACL 0x0100 /* DACL */ 256#define WM8955_DACL_MASK 0x0100 /* DACL */ 257#define WM8955_DACL_SHIFT 8 /* DACL */ 258#define WM8955_DACL_WIDTH 1 /* DACL */ 259#define WM8955_DACR 0x0080 /* DACR */ 260#define WM8955_DACR_MASK 0x0080 /* DACR */ 261#define WM8955_DACR_SHIFT 7 /* DACR */ 262#define WM8955_DACR_WIDTH 1 /* DACR */ 263#define WM8955_LOUT1 0x0040 /* LOUT1 */ 264#define WM8955_LOUT1_MASK 0x0040 /* LOUT1 */ 265#define WM8955_LOUT1_SHIFT 6 /* LOUT1 */ 266#define WM8955_LOUT1_WIDTH 1 /* LOUT1 */ 267#define WM8955_ROUT1 0x0020 /* ROUT1 */ 268#define WM8955_ROUT1_MASK 0x0020 /* ROUT1 */ 269#define WM8955_ROUT1_SHIFT 5 /* ROUT1 */ 270#define WM8955_ROUT1_WIDTH 1 /* ROUT1 */ 271#define WM8955_LOUT2 0x0010 /* LOUT2 */ 272#define WM8955_LOUT2_MASK 0x0010 /* LOUT2 */ 273#define WM8955_LOUT2_SHIFT 4 /* LOUT2 */ 274#define WM8955_LOUT2_WIDTH 1 /* LOUT2 */ 275#define WM8955_ROUT2 0x0008 /* ROUT2 */ 276#define WM8955_ROUT2_MASK 0x0008 /* ROUT2 */ 277#define WM8955_ROUT2_SHIFT 3 /* ROUT2 */ 278#define WM8955_ROUT2_WIDTH 1 /* ROUT2 */ 279#define WM8955_MONO 0x0004 /* MONO */ 280#define WM8955_MONO_MASK 0x0004 /* MONO */ 281#define WM8955_MONO_SHIFT 2 /* MONO */ 282#define WM8955_MONO_WIDTH 1 /* MONO */ 283#define WM8955_OUT3 0x0002 /* OUT3 */ 284#define WM8955_OUT3_MASK 0x0002 /* OUT3 */ 285#define WM8955_OUT3_SHIFT 1 /* OUT3 */ 286#define WM8955_OUT3_WIDTH 1 /* OUT3 */ 287 288/* 289 * R27 (0x1B) - Additional Control (3) 290 */ 291#define WM8955_VROI 0x0040 /* VROI */ 292#define WM8955_VROI_MASK 0x0040 /* VROI */ 293#define WM8955_VROI_SHIFT 6 /* VROI */ 294#define WM8955_VROI_WIDTH 1 /* VROI */ 295 296/* 297 * R34 (0x22) - Left out Mix (1) 298 */ 299#define WM8955_LD2LO 0x0100 /* LD2LO */ 300#define WM8955_LD2LO_MASK 0x0100 /* LD2LO */ 301#define WM8955_LD2LO_SHIFT 8 /* LD2LO */ 302#define WM8955_LD2LO_WIDTH 1 /* LD2LO */ 303#define WM8955_LI2LO 0x0080 /* LI2LO */ 304#define WM8955_LI2LO_MASK 0x0080 /* LI2LO */ 305#define WM8955_LI2LO_SHIFT 7 /* LI2LO */ 306#define WM8955_LI2LO_WIDTH 1 /* LI2LO */ 307#define WM8955_LI2LOVOL_MASK 0x0070 /* LI2LOVOL - [6:4] */ 308#define WM8955_LI2LOVOL_SHIFT 4 /* LI2LOVOL - [6:4] */ 309#define WM8955_LI2LOVOL_WIDTH 3 /* LI2LOVOL - [6:4] */ 310 311/* 312 * R35 (0x23) - Left out Mix (2) 313 */ 314#define WM8955_RD2LO 0x0100 /* RD2LO */ 315#define WM8955_RD2LO_MASK 0x0100 /* RD2LO */ 316#define WM8955_RD2LO_SHIFT 8 /* RD2LO */ 317#define WM8955_RD2LO_WIDTH 1 /* RD2LO */ 318#define WM8955_RI2LO 0x0080 /* RI2LO */ 319#define WM8955_RI2LO_MASK 0x0080 /* RI2LO */ 320#define WM8955_RI2LO_SHIFT 7 /* RI2LO */ 321#define WM8955_RI2LO_WIDTH 1 /* RI2LO */ 322#define WM8955_RI2LOVOL_MASK 0x0070 /* RI2LOVOL - [6:4] */ 323#define WM8955_RI2LOVOL_SHIFT 4 /* RI2LOVOL - [6:4] */ 324#define WM8955_RI2LOVOL_WIDTH 3 /* RI2LOVOL - [6:4] */ 325 326/* 327 * R36 (0x24) - Right out Mix (1) 328 */ 329#define WM8955_LD2RO 0x0100 /* LD2RO */ 330#define WM8955_LD2RO_MASK 0x0100 /* LD2RO */ 331#define WM8955_LD2RO_SHIFT 8 /* LD2RO */ 332#define WM8955_LD2RO_WIDTH 1 /* LD2RO */ 333#define WM8955_LI2RO 0x0080 /* LI2RO */ 334#define WM8955_LI2RO_MASK 0x0080 /* LI2RO */ 335#define WM8955_LI2RO_SHIFT 7 /* LI2RO */ 336#define WM8955_LI2RO_WIDTH 1 /* LI2RO */ 337#define WM8955_LI2ROVOL_MASK 0x0070 /* LI2ROVOL - [6:4] */ 338#define WM8955_LI2ROVOL_SHIFT 4 /* LI2ROVOL - [6:4] */ 339#define WM8955_LI2ROVOL_WIDTH 3 /* LI2ROVOL - [6:4] */ 340 341/* 342 * R37 (0x25) - Right Out Mix (2) 343 */ 344#define WM8955_RD2RO 0x0100 /* RD2RO */ 345#define WM8955_RD2RO_MASK 0x0100 /* RD2RO */ 346#define WM8955_RD2RO_SHIFT 8 /* RD2RO */ 347#define WM8955_RD2RO_WIDTH 1 /* RD2RO */ 348#define WM8955_RI2RO 0x0080 /* RI2RO */ 349#define WM8955_RI2RO_MASK 0x0080 /* RI2RO */ 350#define WM8955_RI2RO_SHIFT 7 /* RI2RO */ 351#define WM8955_RI2RO_WIDTH 1 /* RI2RO */ 352#define WM8955_RI2ROVOL_MASK 0x0070 /* RI2ROVOL - [6:4] */ 353#define WM8955_RI2ROVOL_SHIFT 4 /* RI2ROVOL - [6:4] */ 354#define WM8955_RI2ROVOL_WIDTH 3 /* RI2ROVOL - [6:4] */ 355 356/* 357 * R38 (0x26) - Mono out Mix (1) 358 */ 359#define WM8955_LD2MO 0x0100 /* LD2MO */ 360#define WM8955_LD2MO_MASK 0x0100 /* LD2MO */ 361#define WM8955_LD2MO_SHIFT 8 /* LD2MO */ 362#define WM8955_LD2MO_WIDTH 1 /* LD2MO */ 363#define WM8955_LI2MO 0x0080 /* LI2MO */ 364#define WM8955_LI2MO_MASK 0x0080 /* LI2MO */ 365#define WM8955_LI2MO_SHIFT 7 /* LI2MO */ 366#define WM8955_LI2MO_WIDTH 1 /* LI2MO */ 367#define WM8955_LI2MOVOL_MASK 0x0070 /* LI2MOVOL - [6:4] */ 368#define WM8955_LI2MOVOL_SHIFT 4 /* LI2MOVOL - [6:4] */ 369#define WM8955_LI2MOVOL_WIDTH 3 /* LI2MOVOL - [6:4] */ 370#define WM8955_DMEN 0x0001 /* DMEN */ 371#define WM8955_DMEN_MASK 0x0001 /* DMEN */ 372#define WM8955_DMEN_SHIFT 0 /* DMEN */ 373#define WM8955_DMEN_WIDTH 1 /* DMEN */ 374 375/* 376 * R39 (0x27) - Mono out Mix (2) 377 */ 378#define WM8955_RD2MO 0x0100 /* RD2MO */ 379#define WM8955_RD2MO_MASK 0x0100 /* RD2MO */ 380#define WM8955_RD2MO_SHIFT 8 /* RD2MO */ 381#define WM8955_RD2MO_WIDTH 1 /* RD2MO */ 382#define WM8955_RI2MO 0x0080 /* RI2MO */ 383#define WM8955_RI2MO_MASK 0x0080 /* RI2MO */ 384#define WM8955_RI2MO_SHIFT 7 /* RI2MO */ 385#define WM8955_RI2MO_WIDTH 1 /* RI2MO */ 386#define WM8955_RI2MOVOL_MASK 0x0070 /* RI2MOVOL - [6:4] */ 387#define WM8955_RI2MOVOL_SHIFT 4 /* RI2MOVOL - [6:4] */ 388#define WM8955_RI2MOVOL_WIDTH 3 /* RI2MOVOL - [6:4] */ 389 390/* 391 * R40 (0x28) - LOUT2 volume 392 */ 393#define WM8955_LO2VU 0x0100 /* LO2VU */ 394#define WM8955_LO2VU_MASK 0x0100 /* LO2VU */ 395#define WM8955_LO2VU_SHIFT 8 /* LO2VU */ 396#define WM8955_LO2VU_WIDTH 1 /* LO2VU */ 397#define WM8955_LO2ZC 0x0080 /* LO2ZC */ 398#define WM8955_LO2ZC_MASK 0x0080 /* LO2ZC */ 399#define WM8955_LO2ZC_SHIFT 7 /* LO2ZC */ 400#define WM8955_LO2ZC_WIDTH 1 /* LO2ZC */ 401#define WM8955_LOUT2VOL_MASK 0x007F /* LOUT2VOL - [6:0] */ 402#define WM8955_LOUT2VOL_SHIFT 0 /* LOUT2VOL - [6:0] */ 403#define WM8955_LOUT2VOL_WIDTH 7 /* LOUT2VOL - [6:0] */ 404 405/* 406 * R41 (0x29) - ROUT2 volume 407 */ 408#define WM8955_RO2VU 0x0100 /* RO2VU */ 409#define WM8955_RO2VU_MASK 0x0100 /* RO2VU */ 410#define WM8955_RO2VU_SHIFT 8 /* RO2VU */ 411#define WM8955_RO2VU_WIDTH 1 /* RO2VU */ 412#define WM8955_RO2ZC 0x0080 /* RO2ZC */ 413#define WM8955_RO2ZC_MASK 0x0080 /* RO2ZC */ 414#define WM8955_RO2ZC_SHIFT 7 /* RO2ZC */ 415#define WM8955_RO2ZC_WIDTH 1 /* RO2ZC */ 416#define WM8955_ROUT2VOL_MASK 0x007F /* ROUT2VOL - [6:0] */ 417#define WM8955_ROUT2VOL_SHIFT 0 /* ROUT2VOL - [6:0] */ 418#define WM8955_ROUT2VOL_WIDTH 7 /* ROUT2VOL - [6:0] */ 419 420/* 421 * R42 (0x2A) - MONOOUT volume 422 */ 423#define WM8955_MOZC 0x0080 /* MOZC */ 424#define WM8955_MOZC_MASK 0x0080 /* MOZC */ 425#define WM8955_MOZC_SHIFT 7 /* MOZC */ 426#define WM8955_MOZC_WIDTH 1 /* MOZC */ 427#define WM8955_MOUTVOL_MASK 0x007F /* MOUTVOL - [6:0] */ 428#define WM8955_MOUTVOL_SHIFT 0 /* MOUTVOL - [6:0] */ 429#define WM8955_MOUTVOL_WIDTH 7 /* MOUTVOL - [6:0] */ 430 431/* 432 * R43 (0x2B) - Clocking / PLL 433 */ 434#define WM8955_MCLKSEL 0x0100 /* MCLKSEL */ 435#define WM8955_MCLKSEL_MASK 0x0100 /* MCLKSEL */ 436#define WM8955_MCLKSEL_SHIFT 8 /* MCLKSEL */ 437#define WM8955_MCLKSEL_WIDTH 1 /* MCLKSEL */ 438#define WM8955_PLLOUTDIV2 0x0020 /* PLLOUTDIV2 */ 439#define WM8955_PLLOUTDIV2_MASK 0x0020 /* PLLOUTDIV2 */ 440#define WM8955_PLLOUTDIV2_SHIFT 5 /* PLLOUTDIV2 */ 441#define WM8955_PLLOUTDIV2_WIDTH 1 /* PLLOUTDIV2 */ 442#define WM8955_PLL_RB 0x0010 /* PLL_RB */ 443#define WM8955_PLL_RB_MASK 0x0010 /* PLL_RB */ 444#define WM8955_PLL_RB_SHIFT 4 /* PLL_RB */ 445#define WM8955_PLL_RB_WIDTH 1 /* PLL_RB */ 446#define WM8955_PLLEN 0x0008 /* PLLEN */ 447#define WM8955_PLLEN_MASK 0x0008 /* PLLEN */ 448#define WM8955_PLLEN_SHIFT 3 /* PLLEN */ 449#define WM8955_PLLEN_WIDTH 1 /* PLLEN */ 450 451/* 452 * R44 (0x2C) - PLL Control 1 453 */ 454#define WM8955_N_MASK 0x01E0 /* N - [8:5] */ 455#define WM8955_N_SHIFT 5 /* N - [8:5] */ 456#define WM8955_N_WIDTH 4 /* N - [8:5] */ 457#define WM8955_K_21_18_MASK 0x000F /* K(21:18) - [3:0] */ 458#define WM8955_K_21_18_SHIFT 0 /* K(21:18) - [3:0] */ 459#define WM8955_K_21_18_WIDTH 4 /* K(21:18) - [3:0] */ 460 461/* 462 * R45 (0x2D) - PLL Control 2 463 */ 464#define WM8955_K_17_9_MASK 0x01FF /* K(17:9) - [8:0] */ 465#define WM8955_K_17_9_SHIFT 0 /* K(17:9) - [8:0] */ 466#define WM8955_K_17_9_WIDTH 9 /* K(17:9) - [8:0] */ 467 468/* 469 * R46 (0x2E) - PLL Control 3 470 */ 471#define WM8955_K_8_0_MASK 0x01FF /* K(8:0) - [8:0] */ 472#define WM8955_K_8_0_SHIFT 0 /* K(8:0) - [8:0] */ 473#define WM8955_K_8_0_WIDTH 9 /* K(8:0) - [8:0] */ 474 475/* 476 * R59 (0x3B) - PLL Control 4 477 */ 478#define WM8955_KEN 0x0080 /* KEN */ 479#define WM8955_KEN_MASK 0x0080 /* KEN */ 480#define WM8955_KEN_SHIFT 7 /* KEN */ 481#define WM8955_KEN_WIDTH 1 /* KEN */ 482 483#endif 484