1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * max98371.c -- ALSA SoC Stereo MAX98371 driver
4 *
5 * Copyright 2015-16 Maxim Integrated Products
6 */
7
8#include <linux/i2c.h>
9#include <linux/module.h>
10#include <linux/regmap.h>
11#include <linux/slab.h>
12#include <sound/pcm.h>
13#include <sound/pcm_params.h>
14#include <sound/soc.h>
15#include <sound/tlv.h>
16#include "max98371.h"
17
18static const char *const monomix_text[] = {
19	"Left", "Right", "LeftRightDiv2",
20};
21
22static const char *const hpf_cutoff_txt[] = {
23	"Disable", "DC Block", "50Hz",
24	"100Hz", "200Hz", "400Hz", "800Hz",
25};
26
27static SOC_ENUM_SINGLE_DECL(max98371_monomix, MAX98371_MONOMIX_CFG, 0,
28		monomix_text);
29
30static SOC_ENUM_SINGLE_DECL(max98371_hpf_cutoff, MAX98371_HPF, 0,
31		hpf_cutoff_txt);
32
33static const DECLARE_TLV_DB_RANGE(max98371_dht_min_gain,
34	0, 1, TLV_DB_SCALE_ITEM(537, 66, 0),
35	2, 3, TLV_DB_SCALE_ITEM(677, 82, 0),
36	4, 5, TLV_DB_SCALE_ITEM(852, 104, 0),
37	6, 7, TLV_DB_SCALE_ITEM(1072, 131, 0),
38	8, 9, TLV_DB_SCALE_ITEM(1350, 165, 0),
39	10, 11, TLV_DB_SCALE_ITEM(1699, 101, 0),
40);
41
42static const DECLARE_TLV_DB_RANGE(max98371_dht_max_gain,
43	0, 1, TLV_DB_SCALE_ITEM(537, 66, 0),
44	2, 3, TLV_DB_SCALE_ITEM(677, 82, 0),
45	4, 5, TLV_DB_SCALE_ITEM(852, 104, 0),
46	6, 7, TLV_DB_SCALE_ITEM(1072, 131, 0),
47	8, 9, TLV_DB_SCALE_ITEM(1350, 165, 0),
48	10, 11, TLV_DB_SCALE_ITEM(1699, 208, 0),
49);
50
51static const DECLARE_TLV_DB_RANGE(max98371_dht_rot_gain,
52	0, 1, TLV_DB_SCALE_ITEM(-50, -50, 0),
53	2, 6, TLV_DB_SCALE_ITEM(-100, -100, 0),
54	7, 8, TLV_DB_SCALE_ITEM(-800, -200, 0),
55	9, 11, TLV_DB_SCALE_ITEM(-1200, -300, 0),
56	12, 13, TLV_DB_SCALE_ITEM(-2000, -200, 0),
57	14, 15, TLV_DB_SCALE_ITEM(-2500, -500, 0),
58);
59
60static const struct reg_default max98371_reg[] = {
61	{ 0x01, 0x00 },
62	{ 0x02, 0x00 },
63	{ 0x03, 0x00 },
64	{ 0x04, 0x00 },
65	{ 0x05, 0x00 },
66	{ 0x06, 0x00 },
67	{ 0x07, 0x00 },
68	{ 0x08, 0x00 },
69	{ 0x09, 0x00 },
70	{ 0x0A, 0x00 },
71	{ 0x10, 0x06 },
72	{ 0x11, 0x08 },
73	{ 0x14, 0x80 },
74	{ 0x15, 0x00 },
75	{ 0x16, 0x00 },
76	{ 0x18, 0x00 },
77	{ 0x19, 0x00 },
78	{ 0x1C, 0x00 },
79	{ 0x1D, 0x00 },
80	{ 0x1E, 0x00 },
81	{ 0x1F, 0x00 },
82	{ 0x20, 0x00 },
83	{ 0x21, 0x00 },
84	{ 0x22, 0x00 },
85	{ 0x23, 0x00 },
86	{ 0x24, 0x00 },
87	{ 0x25, 0x00 },
88	{ 0x26, 0x00 },
89	{ 0x27, 0x00 },
90	{ 0x28, 0x00 },
91	{ 0x29, 0x00 },
92	{ 0x2A, 0x00 },
93	{ 0x2B, 0x00 },
94	{ 0x2C, 0x00 },
95	{ 0x2D, 0x00 },
96	{ 0x2E, 0x0B },
97	{ 0x31, 0x00 },
98	{ 0x32, 0x18 },
99	{ 0x33, 0x00 },
100	{ 0x34, 0x00 },
101	{ 0x36, 0x00 },
102	{ 0x37, 0x00 },
103	{ 0x38, 0x00 },
104	{ 0x39, 0x00 },
105	{ 0x3A, 0x00 },
106	{ 0x3B, 0x00 },
107	{ 0x3C, 0x00 },
108	{ 0x3D, 0x00 },
109	{ 0x3E, 0x00 },
110	{ 0x3F, 0x00 },
111	{ 0x40, 0x00 },
112	{ 0x41, 0x00 },
113	{ 0x42, 0x00 },
114	{ 0x43, 0x00 },
115	{ 0x4A, 0x00 },
116	{ 0x4B, 0x00 },
117	{ 0x4C, 0x00 },
118	{ 0x4D, 0x00 },
119	{ 0x4E, 0x00 },
120	{ 0x50, 0x00 },
121	{ 0x51, 0x00 },
122	{ 0x55, 0x00 },
123	{ 0x58, 0x00 },
124	{ 0x59, 0x00 },
125	{ 0x5C, 0x00 },
126	{ 0xFF, 0x43 },
127};
128
129static bool max98371_volatile_register(struct device *dev, unsigned int reg)
130{
131	switch (reg) {
132	case MAX98371_IRQ_CLEAR1:
133	case MAX98371_IRQ_CLEAR2:
134	case MAX98371_IRQ_CLEAR3:
135	case MAX98371_VERSION:
136		return true;
137	default:
138		return false;
139	}
140}
141
142static bool max98371_readable_register(struct device *dev, unsigned int reg)
143{
144	switch (reg) {
145	case MAX98371_SOFT_RESET:
146		return false;
147	default:
148		return true;
149	}
150};
151
152static const DECLARE_TLV_DB_RANGE(max98371_gain_tlv,
153	0, 7, TLV_DB_SCALE_ITEM(0, 50, 0),
154	8, 10, TLV_DB_SCALE_ITEM(400, 100, 0)
155);
156
157static const DECLARE_TLV_DB_SCALE(digital_tlv, -6300, 50, 1);
158
159static const struct snd_kcontrol_new max98371_snd_controls[] = {
160	SOC_SINGLE_TLV("Speaker Volume", MAX98371_GAIN,
161			MAX98371_GAIN_SHIFT, (1<<MAX98371_GAIN_WIDTH)-1, 0,
162			max98371_gain_tlv),
163	SOC_SINGLE_TLV("Digital Volume", MAX98371_DIGITAL_GAIN, 0,
164			(1<<MAX98371_DIGITAL_GAIN_WIDTH)-1, 1, digital_tlv),
165	SOC_SINGLE_TLV("Speaker DHT Max Volume", MAX98371_GAIN,
166			0, (1<<MAX98371_DHT_MAX_WIDTH)-1, 0,
167			max98371_dht_max_gain),
168	SOC_SINGLE_TLV("Speaker DHT Min Volume", MAX98371_DHT_GAIN,
169			0, (1<<MAX98371_DHT_GAIN_WIDTH)-1, 0,
170			max98371_dht_min_gain),
171	SOC_SINGLE_TLV("Speaker DHT Rotation Volume", MAX98371_DHT_GAIN,
172			0, (1<<MAX98371_DHT_ROT_WIDTH)-1, 0,
173			max98371_dht_rot_gain),
174	SOC_SINGLE("DHT Attack Step", MAX98371_DHT, MAX98371_DHT_STEP, 3, 0),
175	SOC_SINGLE("DHT Attack Rate", MAX98371_DHT, 0, 7, 0),
176	SOC_ENUM("Monomix Select", max98371_monomix),
177	SOC_ENUM("HPF Cutoff", max98371_hpf_cutoff),
178};
179
180static int max98371_dai_set_fmt(struct snd_soc_dai *codec_dai,
181		unsigned int fmt)
182{
183	struct snd_soc_component *component = codec_dai->component;
184	struct max98371_priv *max98371 = snd_soc_component_get_drvdata(component);
185	unsigned int val = 0;
186
187	switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
188	case SND_SOC_DAIFMT_CBC_CFC:
189		break;
190	default:
191		dev_err(component->dev, "DAI clock mode unsupported");
192		return -EINVAL;
193	}
194
195	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
196	case SND_SOC_DAIFMT_I2S:
197		val |= 0;
198		break;
199	case SND_SOC_DAIFMT_RIGHT_J:
200		val |= MAX98371_DAI_RIGHT;
201		break;
202	case SND_SOC_DAIFMT_LEFT_J:
203		val |= MAX98371_DAI_LEFT;
204		break;
205	default:
206		dev_err(component->dev, "DAI wrong mode unsupported");
207		return -EINVAL;
208	}
209	regmap_update_bits(max98371->regmap, MAX98371_FMT,
210			MAX98371_FMT_MODE_MASK, val);
211	return 0;
212}
213
214static int max98371_dai_hw_params(struct snd_pcm_substream *substream,
215		struct snd_pcm_hw_params *params,
216		struct snd_soc_dai *dai)
217{
218	struct snd_soc_component *component = dai->component;
219	struct max98371_priv *max98371 = snd_soc_component_get_drvdata(component);
220	int blr_clk_ratio, ch_size, channels = params_channels(params);
221	int rate = params_rate(params);
222
223	switch (params_format(params)) {
224	case SNDRV_PCM_FORMAT_S8:
225		regmap_update_bits(max98371->regmap, MAX98371_FMT,
226				MAX98371_FMT_MASK, MAX98371_DAI_CHANSZ_16);
227		ch_size = 8;
228		break;
229	case SNDRV_PCM_FORMAT_S16_LE:
230		regmap_update_bits(max98371->regmap, MAX98371_FMT,
231				MAX98371_FMT_MASK, MAX98371_DAI_CHANSZ_16);
232		ch_size = 16;
233		break;
234	case SNDRV_PCM_FORMAT_S24_LE:
235		regmap_update_bits(max98371->regmap, MAX98371_FMT,
236				MAX98371_FMT_MASK, MAX98371_DAI_CHANSZ_32);
237		ch_size = 24;
238		break;
239	case SNDRV_PCM_FORMAT_S32_LE:
240		regmap_update_bits(max98371->regmap, MAX98371_FMT,
241				MAX98371_FMT_MASK, MAX98371_DAI_CHANSZ_32);
242		ch_size = 32;
243		break;
244	default:
245		return -EINVAL;
246	}
247
248	/* BCLK/LRCLK ratio calculation */
249	blr_clk_ratio = channels * ch_size;
250	switch (blr_clk_ratio) {
251	case 32:
252		regmap_update_bits(max98371->regmap,
253			MAX98371_DAI_CLK,
254			MAX98371_DAI_BSEL_MASK, MAX98371_DAI_BSEL_32);
255		break;
256	case 48:
257		regmap_update_bits(max98371->regmap,
258			MAX98371_DAI_CLK,
259			MAX98371_DAI_BSEL_MASK, MAX98371_DAI_BSEL_48);
260		break;
261	case 64:
262		regmap_update_bits(max98371->regmap,
263			MAX98371_DAI_CLK,
264			MAX98371_DAI_BSEL_MASK, MAX98371_DAI_BSEL_64);
265		break;
266	default:
267		return -EINVAL;
268	}
269
270	switch (rate) {
271	case 32000:
272		regmap_update_bits(max98371->regmap,
273			MAX98371_SPK_SR,
274			MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_32);
275		break;
276	case 44100:
277		regmap_update_bits(max98371->regmap,
278			MAX98371_SPK_SR,
279			MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_44);
280		break;
281	case 48000:
282		regmap_update_bits(max98371->regmap,
283			MAX98371_SPK_SR,
284			MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_48);
285		break;
286	case 88200:
287		regmap_update_bits(max98371->regmap,
288			MAX98371_SPK_SR,
289			MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_88);
290		break;
291	case 96000:
292		regmap_update_bits(max98371->regmap,
293			MAX98371_SPK_SR,
294			MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_96);
295		break;
296	default:
297		return -EINVAL;
298	}
299
300	/* enabling both the RX channels*/
301	regmap_update_bits(max98371->regmap, MAX98371_MONOMIX_SRC,
302			MAX98371_MONOMIX_SRC_MASK, MONOMIX_RX_0_1);
303	regmap_update_bits(max98371->regmap, MAX98371_DAI_CHANNEL,
304			MAX98371_CHANNEL_MASK, MAX98371_CHANNEL_MASK);
305	return 0;
306}
307
308static const struct snd_soc_dapm_widget max98371_dapm_widgets[] = {
309	SND_SOC_DAPM_DAC("DAC", NULL, MAX98371_SPK_ENABLE, 0, 0),
310	SND_SOC_DAPM_SUPPLY("Global Enable", MAX98371_GLOBAL_ENABLE,
311		0, 0, NULL, 0),
312	SND_SOC_DAPM_OUTPUT("SPK_OUT"),
313};
314
315static const struct snd_soc_dapm_route max98371_audio_map[] = {
316	{"DAC", NULL, "HiFi Playback"},
317	{"SPK_OUT", NULL, "DAC"},
318	{"SPK_OUT", NULL, "Global Enable"},
319};
320
321#define MAX98371_RATES SNDRV_PCM_RATE_8000_48000
322#define MAX98371_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE | \
323		SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE)
324
325static const struct snd_soc_dai_ops max98371_dai_ops = {
326	.set_fmt = max98371_dai_set_fmt,
327	.hw_params = max98371_dai_hw_params,
328};
329
330static struct snd_soc_dai_driver max98371_dai[] = {
331	{
332		.name = "max98371-aif1",
333		.playback = {
334			.stream_name = "HiFi Playback",
335			.channels_min = 1,
336			.channels_max = 2,
337			.rates = SNDRV_PCM_RATE_8000_48000,
338			.formats = MAX98371_FORMATS,
339		},
340		.ops = &max98371_dai_ops,
341	}
342};
343
344static const struct snd_soc_component_driver max98371_component = {
345	.controls		= max98371_snd_controls,
346	.num_controls		= ARRAY_SIZE(max98371_snd_controls),
347	.dapm_routes		= max98371_audio_map,
348	.num_dapm_routes	= ARRAY_SIZE(max98371_audio_map),
349	.dapm_widgets		= max98371_dapm_widgets,
350	.num_dapm_widgets	= ARRAY_SIZE(max98371_dapm_widgets),
351	.idle_bias_on		= 1,
352	.use_pmdown_time	= 1,
353	.endianness		= 1,
354};
355
356static const struct regmap_config max98371_regmap = {
357	.reg_bits         = 8,
358	.val_bits         = 8,
359	.max_register     = MAX98371_VERSION,
360	.reg_defaults     = max98371_reg,
361	.num_reg_defaults = ARRAY_SIZE(max98371_reg),
362	.volatile_reg     = max98371_volatile_register,
363	.readable_reg     = max98371_readable_register,
364	.cache_type       = REGCACHE_RBTREE,
365};
366
367static int max98371_i2c_probe(struct i2c_client *i2c)
368{
369	struct max98371_priv *max98371;
370	int ret, reg;
371
372	max98371 = devm_kzalloc(&i2c->dev,
373			sizeof(*max98371), GFP_KERNEL);
374	if (!max98371)
375		return -ENOMEM;
376
377	i2c_set_clientdata(i2c, max98371);
378	max98371->regmap = devm_regmap_init_i2c(i2c, &max98371_regmap);
379	if (IS_ERR(max98371->regmap)) {
380		ret = PTR_ERR(max98371->regmap);
381		dev_err(&i2c->dev,
382				"Failed to allocate regmap: %d\n", ret);
383		return ret;
384	}
385
386	ret = regmap_read(max98371->regmap, MAX98371_VERSION, &reg);
387	if (ret < 0) {
388		dev_info(&i2c->dev, "device error %d\n", ret);
389		return ret;
390	}
391	dev_info(&i2c->dev, "device version %x\n", reg);
392
393	ret = devm_snd_soc_register_component(&i2c->dev, &max98371_component,
394			max98371_dai, ARRAY_SIZE(max98371_dai));
395	if (ret < 0) {
396		dev_err(&i2c->dev, "Failed to register component: %d\n", ret);
397		return ret;
398	}
399	return ret;
400}
401
402static const struct i2c_device_id max98371_i2c_id[] = {
403	{ "max98371", 0 },
404	{ }
405};
406
407MODULE_DEVICE_TABLE(i2c, max98371_i2c_id);
408
409#ifdef CONFIG_OF
410static const struct of_device_id max98371_of_match[] = {
411	{ .compatible = "maxim,max98371", },
412	{ }
413};
414MODULE_DEVICE_TABLE(of, max98371_of_match);
415#endif
416
417static struct i2c_driver max98371_i2c_driver = {
418	.driver = {
419		.name = "max98371",
420		.of_match_table = of_match_ptr(max98371_of_match),
421	},
422	.probe = max98371_i2c_probe,
423	.id_table = max98371_i2c_id,
424};
425
426module_i2c_driver(max98371_i2c_driver);
427
428MODULE_AUTHOR("anish kumar <yesanishhere@gmail.com>");
429MODULE_DESCRIPTION("ALSA SoC MAX98371 driver");
430MODULE_LICENSE("GPL");
431