1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 4 * James Courtier-Dutton <James@superbug.co.uk> 5 * Oswald Buddenhagen <oswald.buddenhagen@gmx.de> 6 * Creative Labs, Inc. 7 * 8 * Routines for control of EMU10K1 chips 9 */ 10 11#include <linux/sched.h> 12#include <linux/delay.h> 13#include <linux/init.h> 14#include <linux/module.h> 15#include <linux/interrupt.h> 16#include <linux/iommu.h> 17#include <linux/pci.h> 18#include <linux/slab.h> 19#include <linux/vmalloc.h> 20#include <linux/mutex.h> 21 22 23#include <sound/core.h> 24#include <sound/emu10k1.h> 25#include <linux/firmware.h> 26#include "p16v.h" 27#include "tina2.h" 28#include "p17v.h" 29 30 31#define HANA_FILENAME "emu/hana.fw" 32#define DOCK_FILENAME "emu/audio_dock.fw" 33#define EMU1010B_FILENAME "emu/emu1010b.fw" 34#define MICRO_DOCK_FILENAME "emu/micro_dock.fw" 35#define EMU0404_FILENAME "emu/emu0404.fw" 36#define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw" 37 38MODULE_FIRMWARE(HANA_FILENAME); 39MODULE_FIRMWARE(DOCK_FILENAME); 40MODULE_FIRMWARE(EMU1010B_FILENAME); 41MODULE_FIRMWARE(MICRO_DOCK_FILENAME); 42MODULE_FIRMWARE(EMU0404_FILENAME); 43MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME); 44 45 46/************************************************************************* 47 * EMU10K1 init / done 48 *************************************************************************/ 49 50void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch) 51{ 52 snd_emu10k1_ptr_write_multiple(emu, ch, 53 DCYSUSV, 0, 54 VTFT, VTFT_FILTERTARGET_MASK, 55 CVCF, CVCF_CURRENTFILTER_MASK, 56 PTRX, 0, 57 CPF, 0, 58 CCR, 0, 59 60 PSST, 0, 61 DSL, 0x10, 62 CCCA, 0, 63 Z1, 0, 64 Z2, 0, 65 FXRT, 0x32100000, 66 67 // The rest is meaningless as long as DCYSUSV_CHANNELENABLE_MASK is zero 68 DCYSUSM, 0, 69 ATKHLDV, 0, 70 ATKHLDM, 0, 71 IP, 0, 72 IFATN, IFATN_FILTERCUTOFF_MASK | IFATN_ATTENUATION_MASK, 73 PEFE, 0, 74 FMMOD, 0, 75 TREMFRQ, 24, /* 1 Hz */ 76 FM2FRQ2, 24, /* 1 Hz */ 77 LFOVAL2, 0, 78 LFOVAL1, 0, 79 ENVVOL, 0, 80 ENVVAL, 0, 81 82 REGLIST_END); 83 84 /* Audigy extra stuffs */ 85 if (emu->audigy) { 86 snd_emu10k1_ptr_write_multiple(emu, ch, 87 A_CSBA, 0, 88 A_CSDC, 0, 89 A_CSFE, 0, 90 A_CSHG, 0, 91 A_FXRT1, 0x03020100, 92 A_FXRT2, 0x07060504, 93 A_SENDAMOUNTS, 0, 94 REGLIST_END); 95 } 96} 97 98static const unsigned int spi_dac_init[] = { 99 0x00ff, 100 0x02ff, 101 0x0400, 102 0x0520, 103 0x0600, 104 0x08ff, 105 0x0aff, 106 0x0cff, 107 0x0eff, 108 0x10ff, 109 0x1200, 110 0x1400, 111 0x1480, 112 0x1800, 113 0x1aff, 114 0x1cff, 115 0x1e00, 116 0x0530, 117 0x0602, 118 0x0622, 119 0x1400, 120}; 121 122static const unsigned int i2c_adc_init[][2] = { 123 { 0x17, 0x00 }, /* Reset */ 124 { 0x07, 0x00 }, /* Timeout */ 125 { 0x0b, 0x22 }, /* Interface control */ 126 { 0x0c, 0x22 }, /* Master mode control */ 127 { 0x0d, 0x08 }, /* Powerdown control */ 128 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */ 129 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */ 130 { 0x10, 0x7b }, /* ALC Control 1 */ 131 { 0x11, 0x00 }, /* ALC Control 2 */ 132 { 0x12, 0x32 }, /* ALC Control 3 */ 133 { 0x13, 0x00 }, /* Noise gate control */ 134 { 0x14, 0xa6 }, /* Limiter control */ 135 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */ 136}; 137 138static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir) 139{ 140 unsigned int silent_page; 141 int ch; 142 u32 tmp; 143 144 /* disable audio and lock cache */ 145 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | 146 HCFG_MUTEBUTTONENABLE, emu->port + HCFG); 147 148 outl(0, emu->port + INTE); 149 150 snd_emu10k1_ptr_write_multiple(emu, 0, 151 /* reset recording buffers */ 152 MICBS, ADCBS_BUFSIZE_NONE, 153 MICBA, 0, 154 FXBS, ADCBS_BUFSIZE_NONE, 155 FXBA, 0, 156 ADCBS, ADCBS_BUFSIZE_NONE, 157 ADCBA, 0, 158 159 /* disable channel interrupt */ 160 CLIEL, 0, 161 CLIEH, 0, 162 163 /* disable stop on loop end */ 164 SOLEL, 0, 165 SOLEH, 0, 166 167 REGLIST_END); 168 169 if (emu->audigy) { 170 /* set SPDIF bypass mode */ 171 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT); 172 /* enable rear left + rear right AC97 slots */ 173 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT | 174 AC97SLOT_REAR_LEFT); 175 } 176 177 /* init envelope engine */ 178 for (ch = 0; ch < NUM_G; ch++) 179 snd_emu10k1_voice_init(emu, ch); 180 181 snd_emu10k1_ptr_write_multiple(emu, 0, 182 SPCS0, emu->spdif_bits[0], 183 SPCS1, emu->spdif_bits[1], 184 SPCS2, emu->spdif_bits[2], 185 REGLIST_END); 186 187 if (emu->card_capabilities->emu_model) { 188 } else if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 189 /* Hacks for Alice3 to work independent of haP16V driver */ 190 /* Setup SRCMulti_I2S SamplingRate */ 191 snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000); 192 193 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 194 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14); 195 /* Setup SRCMulti Input Audio Enable */ 196 /* Use 0xFFFFFFFF to enable P16V sounds. */ 197 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF); 198 199 /* Enabled Phased (8-channel) P16V playback */ 200 outl(0x0201, emu->port + HCFG2); 201 /* Set playback routing. */ 202 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4); 203 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */ 204 /* Hacks for Alice3 to work independent of haP16V driver */ 205 dev_info(emu->card->dev, "Audigy2 value: Special config.\n"); 206 /* Setup SRCMulti_I2S SamplingRate */ 207 snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000); 208 209 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 210 snd_emu10k1_ptr20_write(emu, P17V_SRCSel, 0, 0x14); 211 212 /* Setup SRCMulti Input Audio Enable */ 213 snd_emu10k1_ptr20_write(emu, P17V_MIXER_I2S_ENABLE, 0, 0xFF000000); 214 215 /* Setup SPDIF Out Audio Enable */ 216 /* The Audigy 2 Value has a separate SPDIF out, 217 * so no need for a mixer switch 218 */ 219 snd_emu10k1_ptr20_write(emu, P17V_MIXER_SPDIF_ENABLE, 0, 0xFF000000); 220 221 tmp = inw(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */ 222 outw(tmp, emu->port + A_IOCFG); 223 } 224 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */ 225 int size, n; 226 227 size = ARRAY_SIZE(spi_dac_init); 228 for (n = 0; n < size; n++) 229 snd_emu10k1_spi_write(emu, spi_dac_init[n]); 230 231 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10); 232 /* Enable GPIOs 233 * GPIO0: Unknown 234 * GPIO1: Speakers-enabled. 235 * GPIO2: Unknown 236 * GPIO3: Unknown 237 * GPIO4: IEC958 Output on. 238 * GPIO5: Unknown 239 * GPIO6: Unknown 240 * GPIO7: Unknown 241 */ 242 outw(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */ 243 } 244 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */ 245 int size, n; 246 247 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f); 248 tmp = inw(emu->port + A_IOCFG); 249 outw(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */ 250 tmp = inw(emu->port + A_IOCFG); 251 size = ARRAY_SIZE(i2c_adc_init); 252 for (n = 0; n < size; n++) 253 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]); 254 for (n = 0; n < 4; n++) { 255 emu->i2c_capture_volume[n][0] = 0xcf; 256 emu->i2c_capture_volume[n][1] = 0xcf; 257 } 258 } 259 260 261 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr); 262 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */ 263 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_256K); /* taken from original driver */ 264 265 silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0); 266 for (ch = 0; ch < NUM_G; ch++) { 267 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page); 268 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page); 269 } 270 271 if (emu->card_capabilities->emu_model) { 272 outl(HCFG_AUTOMUTE_ASYNC | 273 HCFG_EMU32_SLAVE | 274 HCFG_AUDIOENABLE, emu->port + HCFG); 275 /* 276 * Hokay, setup HCFG 277 * Mute Disable Audio = 0 278 * Lock Tank Memory = 1 279 * Lock Sound Memory = 0 280 * Auto Mute = 1 281 */ 282 } else if (emu->audigy) { 283 if (emu->revision == 4) /* audigy2 */ 284 outl(HCFG_AUDIOENABLE | 285 HCFG_AC3ENABLE_CDSPDIF | 286 HCFG_AC3ENABLE_GPSPDIF | 287 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 288 else 289 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 290 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter, 291 * e.g. card_capabilities->joystick */ 292 } else if (emu->model == 0x20 || 293 emu->model == 0xc400 || 294 (emu->model == 0x21 && emu->revision < 6)) 295 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG); 296 else 297 /* With on-chip joystick */ 298 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 299 300 if (enable_ir) { /* enable IR for SB Live */ 301 if (emu->card_capabilities->emu_model) { 302 ; /* Disable all access to A_IOCFG for the emu1010 */ 303 } else if (emu->card_capabilities->i2c_adc) { 304 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 305 } else if (emu->audigy) { 306 u16 reg = inw(emu->port + A_IOCFG); 307 outw(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 308 udelay(500); 309 outw(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 310 udelay(100); 311 outw(reg, emu->port + A_IOCFG); 312 } else { 313 unsigned int reg = inl(emu->port + HCFG); 314 outl(reg | HCFG_GPOUT2, emu->port + HCFG); 315 udelay(500); 316 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG); 317 udelay(100); 318 outl(reg, emu->port + HCFG); 319 } 320 } 321 322 if (emu->card_capabilities->emu_model) { 323 ; /* Disable all access to A_IOCFG for the emu1010 */ 324 } else if (emu->card_capabilities->i2c_adc) { 325 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 326 } else if (emu->audigy) { /* enable analog output */ 327 u16 reg = inw(emu->port + A_IOCFG); 328 outw(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG); 329 } 330 331 if (emu->address_mode == 0) { 332 /* use 16M in 4G */ 333 outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG); 334 } 335 336 return 0; 337} 338 339static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu) 340{ 341 /* 342 * Enable the audio bit 343 */ 344 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG); 345 346 /* Enable analog/digital outs on audigy */ 347 if (emu->card_capabilities->emu_model) { 348 ; /* Disable all access to A_IOCFG for the emu1010 */ 349 } else if (emu->card_capabilities->i2c_adc) { 350 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 351 } else if (emu->audigy) { 352 outw(inw(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG); 353 354 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 355 /* Unmute Analog now. Set GPO6 to 1 for Apollo. 356 * This has to be done after init ALice3 I2SOut beyond 48KHz. 357 * So, sequence is important. */ 358 outw(inw(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG); 359 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */ 360 /* Unmute Analog now. */ 361 outw(inw(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG); 362 } else { 363 /* Disable routing from AC97 line out to Front speakers */ 364 outw(inw(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG); 365 } 366 } 367 368#if 0 369 { 370 unsigned int tmp; 371 /* FIXME: the following routine disables LiveDrive-II !! */ 372 /* TOSLink detection */ 373 emu->tos_link = 0; 374 tmp = inl(emu->port + HCFG); 375 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { 376 outl(tmp|0x800, emu->port + HCFG); 377 udelay(50); 378 if (tmp != (inl(emu->port + HCFG) & ~0x800)) { 379 emu->tos_link = 1; 380 outl(tmp, emu->port + HCFG); 381 } 382 } 383 } 384#endif 385 386 if (emu->card_capabilities->emu_model) 387 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE | INTE_A_GPIOENABLE); 388 else 389 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE); 390} 391 392int snd_emu10k1_done(struct snd_emu10k1 *emu) 393{ 394 int ch; 395 396 outl(0, emu->port + INTE); 397 398 /* 399 * Shutdown the voices 400 */ 401 for (ch = 0; ch < NUM_G; ch++) { 402 snd_emu10k1_ptr_write_multiple(emu, ch, 403 DCYSUSV, 0, 404 VTFT, 0, 405 CVCF, 0, 406 PTRX, 0, 407 CPF, 0, 408 REGLIST_END); 409 } 410 411 // stop the DSP 412 if (emu->audigy) 413 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP); 414 else 415 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP); 416 417 snd_emu10k1_ptr_write_multiple(emu, 0, 418 /* reset recording buffers */ 419 MICBS, 0, 420 MICBA, 0, 421 FXBS, 0, 422 FXBA, 0, 423 FXWC, 0, 424 ADCBS, ADCBS_BUFSIZE_NONE, 425 ADCBA, 0, 426 TCBS, TCBS_BUFFSIZE_16K, 427 TCB, 0, 428 429 /* disable channel interrupt */ 430 CLIEL, 0, 431 CLIEH, 0, 432 SOLEL, 0, 433 SOLEH, 0, 434 435 PTB, 0, 436 437 REGLIST_END); 438 439 /* disable audio and lock cache */ 440 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG); 441 442 return 0; 443} 444 445/************************************************************************* 446 * ECARD functional implementation 447 *************************************************************************/ 448 449/* In A1 Silicon, these bits are in the HC register */ 450#define HOOKN_BIT (1L << 12) 451#define HANDN_BIT (1L << 11) 452#define PULSEN_BIT (1L << 10) 453 454#define EC_GDI1 (1 << 13) 455#define EC_GDI0 (1 << 14) 456 457#define EC_NUM_CONTROL_BITS 20 458 459#define EC_AC3_DATA_SELN 0x0001L 460#define EC_EE_DATA_SEL 0x0002L 461#define EC_EE_CNTRL_SELN 0x0004L 462#define EC_EECLK 0x0008L 463#define EC_EECS 0x0010L 464#define EC_EESDO 0x0020L 465#define EC_TRIM_CSN 0x0040L 466#define EC_TRIM_SCLK 0x0080L 467#define EC_TRIM_SDATA 0x0100L 468#define EC_TRIM_MUTEN 0x0200L 469#define EC_ADCCAL 0x0400L 470#define EC_ADCRSTN 0x0800L 471#define EC_DACCAL 0x1000L 472#define EC_DACMUTEN 0x2000L 473#define EC_LEDN 0x4000L 474 475#define EC_SPDIF0_SEL_SHIFT 15 476#define EC_SPDIF1_SEL_SHIFT 17 477#define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT) 478#define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT) 479#define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK) 480#define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK) 481#define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should 482 * be incremented any time the EEPROM's 483 * format is changed. */ 484 485#define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */ 486 487/* Addresses for special values stored in to EEPROM */ 488#define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */ 489#define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */ 490#define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */ 491 492#define EC_LAST_PROMFILE_ADDR 0x2f 493 494#define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The 495 * can be up to 30 characters in length 496 * and is stored as a NULL-terminated 497 * ASCII string. Any unused bytes must be 498 * filled with zeros */ 499#define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */ 500 501 502/* Most of this stuff is pretty self-evident. According to the hardware 503 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC 504 * offset problem. Weird. 505 */ 506#define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \ 507 EC_TRIM_CSN) 508 509 510#define EC_DEFAULT_ADC_GAIN 0xC4C4 511#define EC_DEFAULT_SPDIF0_SEL 0x0 512#define EC_DEFAULT_SPDIF1_SEL 0x4 513 514/************************************************************************** 515 * @func Clock bits into the Ecard's control latch. The Ecard uses a 516 * control latch will is loaded bit-serially by toggling the Modem control 517 * lines from function 2 on the E8010. This function hides these details 518 * and presents the illusion that we are actually writing to a distinct 519 * register. 520 */ 521 522static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value) 523{ 524 unsigned short count; 525 unsigned int data; 526 unsigned long hc_port; 527 unsigned int hc_value; 528 529 hc_port = emu->port + HCFG; 530 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT); 531 outl(hc_value, hc_port); 532 533 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) { 534 535 /* Set up the value */ 536 data = ((value & 0x1) ? PULSEN_BIT : 0); 537 value >>= 1; 538 539 outl(hc_value | data, hc_port); 540 541 /* Clock the shift register */ 542 outl(hc_value | data | HANDN_BIT, hc_port); 543 outl(hc_value | data, hc_port); 544 } 545 546 /* Latch the bits */ 547 outl(hc_value | HOOKN_BIT, hc_port); 548 outl(hc_value, hc_port); 549} 550 551/************************************************************************** 552 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The 553 * trim value consists of a 16bit value which is composed of two 554 * 8 bit gain/trim values, one for the left channel and one for the 555 * right channel. The following table maps from the Gain/Attenuation 556 * value in decibels into the corresponding bit pattern for a single 557 * channel. 558 */ 559 560static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu, 561 unsigned short gain) 562{ 563 unsigned int bit; 564 565 /* Enable writing to the TRIM registers */ 566 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 567 568 /* Do it again to insure that we meet hold time requirements */ 569 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 570 571 for (bit = (1 << 15); bit; bit >>= 1) { 572 unsigned int value; 573 574 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA); 575 576 if (gain & bit) 577 value |= EC_TRIM_SDATA; 578 579 /* Clock the bit */ 580 snd_emu10k1_ecard_write(emu, value); 581 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK); 582 snd_emu10k1_ecard_write(emu, value); 583 } 584 585 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 586} 587 588static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu) 589{ 590 unsigned int hc_value; 591 592 /* Set up the initial settings */ 593 emu->ecard_ctrl = EC_RAW_RUN_MODE | 594 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) | 595 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL); 596 597 /* Step 0: Set the codec type in the hardware control register 598 * and enable audio output */ 599 hc_value = inl(emu->port + HCFG); 600 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG); 601 inl(emu->port + HCFG); 602 603 /* Step 1: Turn off the led and deassert TRIM_CS */ 604 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 605 606 /* Step 2: Calibrate the ADC and DAC */ 607 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN); 608 609 /* Step 3: Wait for awhile; XXX We can't get away with this 610 * under a real operating system; we'll need to block and wait that 611 * way. */ 612 snd_emu10k1_wait(emu, 48000); 613 614 /* Step 4: Switch off the DAC and ADC calibration. Note 615 * That ADC_CAL is actually an inverted signal, so we assert 616 * it here to stop calibration. */ 617 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 618 619 /* Step 4: Switch into run mode */ 620 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 621 622 /* Step 5: Set the analog input gain */ 623 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN); 624 625 return 0; 626} 627 628static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu) 629{ 630 unsigned long special_port; 631 __always_unused unsigned int value; 632 633 /* Special initialisation routine 634 * before the rest of the IO-Ports become active. 635 */ 636 special_port = emu->port + 0x38; 637 value = inl(special_port); 638 outl(0x00d00000, special_port); 639 value = inl(special_port); 640 outl(0x00d00001, special_port); 641 value = inl(special_port); 642 outl(0x00d0005f, special_port); 643 value = inl(special_port); 644 outl(0x00d0007f, special_port); 645 value = inl(special_port); 646 outl(0x0090007f, special_port); 647 value = inl(special_port); 648 649 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */ 650 /* Delay to give time for ADC chip to switch on. It needs 113ms */ 651 msleep(200); 652 return 0; 653} 654 655static int snd_emu1010_load_firmware_entry(struct snd_emu10k1 *emu, 656 const struct firmware *fw_entry) 657{ 658 int n, i; 659 u16 reg; 660 u8 value; 661 __always_unused u16 write_post; 662 663 if (!fw_entry) 664 return -EIO; 665 666 /* The FPGA is a Xilinx Spartan IIE XC2S50E */ 667 /* On E-MU 0404b it is a Xilinx Spartan III XC3S50 */ 668 /* GPIO7 -> FPGA PGMN 669 * GPIO6 -> FPGA CCLK 670 * GPIO5 -> FPGA DIN 671 * FPGA CONFIG OFF -> FPGA PGMN 672 */ 673 spin_lock_irq(&emu->emu_lock); 674 outw(0x00, emu->port + A_GPIO); /* Set PGMN low for 100uS. */ 675 write_post = inw(emu->port + A_GPIO); 676 udelay(100); 677 outw(0x80, emu->port + A_GPIO); /* Leave bit 7 set during netlist setup. */ 678 write_post = inw(emu->port + A_GPIO); 679 udelay(100); /* Allow FPGA memory to clean */ 680 for (n = 0; n < fw_entry->size; n++) { 681 value = fw_entry->data[n]; 682 for (i = 0; i < 8; i++) { 683 reg = 0x80; 684 if (value & 0x1) 685 reg = reg | 0x20; 686 value = value >> 1; 687 outw(reg, emu->port + A_GPIO); 688 write_post = inw(emu->port + A_GPIO); 689 outw(reg | 0x40, emu->port + A_GPIO); 690 write_post = inw(emu->port + A_GPIO); 691 } 692 } 693 /* After programming, set GPIO bit 4 high again. */ 694 outw(0x10, emu->port + A_GPIO); 695 write_post = inw(emu->port + A_GPIO); 696 spin_unlock_irq(&emu->emu_lock); 697 698 return 0; 699} 700 701/* firmware file names, per model, init-fw and dock-fw (optional) */ 702static const char * const firmware_names[5][2] = { 703 [EMU_MODEL_EMU1010] = { 704 HANA_FILENAME, DOCK_FILENAME 705 }, 706 [EMU_MODEL_EMU1010B] = { 707 EMU1010B_FILENAME, MICRO_DOCK_FILENAME 708 }, 709 [EMU_MODEL_EMU1616] = { 710 EMU1010_NOTEBOOK_FILENAME, MICRO_DOCK_FILENAME 711 }, 712 [EMU_MODEL_EMU0404] = { 713 EMU0404_FILENAME, NULL 714 }, 715}; 716 717static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, int dock, 718 const struct firmware **fw) 719{ 720 const char *filename; 721 int err; 722 723 if (!*fw) { 724 filename = firmware_names[emu->card_capabilities->emu_model][dock]; 725 if (!filename) 726 return 0; 727 err = request_firmware(fw, filename, &emu->pci->dev); 728 if (err) 729 return err; 730 } 731 732 return snd_emu1010_load_firmware_entry(emu, *fw); 733} 734 735static void snd_emu1010_load_dock_firmware(struct snd_emu10k1 *emu) 736{ 737 u32 tmp, tmp2; 738 int err; 739 740 // The docking events clearly arrive prematurely - while the 741 // Dock's FPGA seems to be successfully programmed, the Dock 742 // fails to initialize subsequently if we don't give it some 743 // time to "warm up" here. 744 msleep(200); 745 746 dev_info(emu->card->dev, "emu1010: Loading Audio Dock Firmware\n"); 747 /* Return to Audio Dock programming mode */ 748 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 749 EMU_HANA_FPGA_CONFIG_AUDIODOCK); 750 err = snd_emu1010_load_firmware(emu, 1, &emu->dock_fw); 751 if (err < 0) 752 return; 753 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0); 754 755 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &tmp); 756 dev_dbg(emu->card->dev, "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", tmp); 757 if ((tmp & 0x1f) != 0x15) { 758 /* FPGA failed to be programmed */ 759 dev_err(emu->card->dev, 760 "emu1010: Loading Audio Dock Firmware failed, reg = 0x%x\n", 761 tmp); 762 return; 763 } 764 dev_info(emu->card->dev, "emu1010: Audio Dock Firmware loaded\n"); 765 766 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp); 767 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2); 768 dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n", tmp, tmp2); 769 770 /* Allow DLL to settle, to sync clocking between 1010 and Dock */ 771 msleep(10); 772} 773 774static void emu1010_dock_event(struct snd_emu10k1 *emu) 775{ 776 u32 reg; 777 778 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); /* OPTIONS: Which cards are attached to the EMU */ 779 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) { 780 /* Audio Dock attached */ 781 snd_emu1010_load_dock_firmware(emu); 782 /* Unmute all. Default is muted after a firmware load */ 783 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 784 } else if (!(reg & EMU_HANA_OPTION_DOCK_ONLINE)) { 785 /* Audio Dock removed */ 786 dev_info(emu->card->dev, "emu1010: Audio Dock detached\n"); 787 /* The hardware auto-mutes all, so we unmute again */ 788 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 789 } 790} 791 792static void emu1010_clock_event(struct snd_emu10k1 *emu) 793{ 794 struct snd_ctl_elem_id id; 795 796 spin_lock_irq(&emu->reg_lock); 797 // This is the only thing that can actually happen. 798 emu->emu1010.clock_source = emu->emu1010.clock_fallback; 799 emu->emu1010.wclock = 1 - emu->emu1010.clock_source; 800 snd_emu1010_update_clock(emu); 801 spin_unlock_irq(&emu->reg_lock); 802 snd_ctl_build_ioff(&id, emu->ctl_clock_source, 0); 803 snd_ctl_notify(emu->card, SNDRV_CTL_EVENT_MASK_VALUE, &id); 804} 805 806static void emu1010_work(struct work_struct *work) 807{ 808 struct snd_emu10k1 *emu; 809 u32 sts; 810 811 emu = container_of(work, struct snd_emu10k1, emu1010.work); 812 if (emu->card->shutdown) 813 return; 814#ifdef CONFIG_PM_SLEEP 815 if (emu->suspend) 816 return; 817#endif 818 819 snd_emu1010_fpga_lock(emu); 820 821 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &sts); 822 823 // The distinction of the IRQ status bits is unreliable, 824 // so we dispatch later based on option card status. 825 if (sts & (EMU_HANA_IRQ_DOCK | EMU_HANA_IRQ_DOCK_LOST)) 826 emu1010_dock_event(emu); 827 828 if (sts & EMU_HANA_IRQ_WCLK_CHANGED) 829 emu1010_clock_event(emu); 830 831 snd_emu1010_fpga_unlock(emu); 832} 833 834static void emu1010_interrupt(struct snd_emu10k1 *emu) 835{ 836 // We get an interrupt on each GPIO input pin change, but we 837 // care only about the ones triggered by the dedicated pin. 838 u16 sts = inw(emu->port + A_GPIO); 839 u16 bit = emu->card_capabilities->ca0108_chip ? 0x2000 : 0x8000; 840 if (!(sts & bit)) 841 return; 842 843 schedule_work(&emu->emu1010.work); 844} 845 846/* 847 * Current status of the driver: 848 * ---------------------------- 849 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz) 850 * * PCM device nb. 2: 851 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops 852 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops 853 */ 854static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu) 855{ 856 u32 tmp, tmp2, reg; 857 int err; 858 859 dev_info(emu->card->dev, "emu1010: Special config.\n"); 860 861 /* Mute, and disable audio and lock cache, just in case. 862 * Proper init follows in snd_emu10k1_init(). */ 863 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG); 864 865 snd_emu1010_fpga_lock(emu); 866 867 /* Disable 48Volt power to Audio Dock */ 868 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0); 869 870 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */ 871 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 872 dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg); 873 if ((reg & 0x3f) == 0x15) { 874 /* FPGA netlist already present so clear it */ 875 /* Return to programming mode */ 876 877 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_HANA); 878 } 879 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 880 dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg); 881 if ((reg & 0x3f) == 0x15) { 882 /* FPGA failed to return to programming mode */ 883 dev_info(emu->card->dev, 884 "emu1010: FPGA failed to return to programming mode\n"); 885 return -ENODEV; 886 } 887 dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg); 888 889 err = snd_emu1010_load_firmware(emu, 0, &emu->firmware); 890 if (err < 0) { 891 dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n"); 892 goto fail; 893 } 894 895 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ 896 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 897 if ((reg & 0x3f) != 0x15) { 898 /* FPGA failed to be programmed */ 899 dev_info(emu->card->dev, 900 "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", 901 reg); 902 err = -ENODEV; 903 goto fail; 904 } 905 906 dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n"); 907 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp); 908 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2); 909 dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2); 910 /* Enable 48Volt power to Audio Dock */ 911 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON); 912 913 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); 914 dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg); 915 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) 916 snd_emu1010_load_dock_firmware(emu); 917 if (emu->card_capabilities->no_adat) { 918 emu->emu1010.optical_in = 0; /* IN_SPDIF */ 919 emu->emu1010.optical_out = 0; /* OUT_SPDIF */ 920 } else { 921 /* Optical -> ADAT I/O */ 922 emu->emu1010.optical_in = 1; /* IN_ADAT */ 923 emu->emu1010.optical_out = 1; /* OUT_ADAT */ 924 } 925 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) | 926 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF); 927 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp); 928 /* Set no attenuation on Audio Dock pads. */ 929 emu->emu1010.adc_pads = 0x00; 930 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, emu->emu1010.adc_pads); 931 /* Unmute Audio dock DACs, Headphone source DAC-4. */ 932 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, EMU_HANA_DOCK_PHONES_192_DAC4); 933 /* DAC PADs. */ 934 emu->emu1010.dac_pads = EMU_HANA_DOCK_DAC_PAD1 | EMU_HANA_DOCK_DAC_PAD2 | 935 EMU_HANA_DOCK_DAC_PAD3 | EMU_HANA_DOCK_DAC_PAD4; 936 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, emu->emu1010.dac_pads); 937 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */ 938 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, EMU_HANA_SPDIF_MODE_RX_INVALID); 939 /* MIDI routing */ 940 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, EMU_HANA_MIDI_INA_FROM_HAMOA | EMU_HANA_MIDI_INB_FROM_DOCK2); 941 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, EMU_HANA_MIDI_OUT_DOCK2 | EMU_HANA_MIDI_OUT_SYNC2); 942 943 emu->gpio_interrupt = emu1010_interrupt; 944 // Note: The Audigy INTE is set later 945 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 946 EMU_HANA_IRQ_DOCK | EMU_HANA_IRQ_DOCK_LOST | EMU_HANA_IRQ_WCLK_CHANGED); 947 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, ®); // Clear pending IRQs 948 949 emu->emu1010.clock_source = 1; /* 48000 */ 950 emu->emu1010.clock_fallback = 1; /* 48000 */ 951 /* Default WCLK set to 48kHz. */ 952 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_48K); 953 /* Word Clock source, Internal 48kHz x1 */ 954 emu->emu1010.wclock = EMU_HANA_WCLOCK_INT_48K; 955 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K); 956 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */ 957 snd_emu1010_update_clock(emu); 958 959 // The routes are all set to EMU_SRC_SILENCE due to the reset, 960 // so it is safe to simply enable the outputs. 961 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 962 963fail: 964 snd_emu1010_fpga_unlock(emu); 965 return err; 966} 967/* 968 * Create the EMU10K1 instance 969 */ 970 971#ifdef CONFIG_PM_SLEEP 972static int alloc_pm_buffer(struct snd_emu10k1 *emu); 973static void free_pm_buffer(struct snd_emu10k1 *emu); 974#endif 975 976static void snd_emu10k1_free(struct snd_card *card) 977{ 978 struct snd_emu10k1 *emu = card->private_data; 979 980 if (emu->port) { /* avoid access to already used hardware */ 981 snd_emu10k1_fx8010_tram_setup(emu, 0); 982 snd_emu10k1_done(emu); 983 snd_emu10k1_free_efx(emu); 984 } 985 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) { 986 /* Disable 48Volt power to Audio Dock */ 987 snd_emu1010_fpga_write_lock(emu, EMU_HANA_DOCK_PWR, 0); 988 } 989 cancel_work_sync(&emu->emu1010.work); 990 mutex_destroy(&emu->emu1010.lock); 991 release_firmware(emu->firmware); 992 release_firmware(emu->dock_fw); 993 snd_util_memhdr_free(emu->memhdr); 994 if (emu->silent_page.area) 995 snd_dma_free_pages(&emu->silent_page); 996 if (emu->ptb_pages.area) 997 snd_dma_free_pages(&emu->ptb_pages); 998 vfree(emu->page_ptr_table); 999 vfree(emu->page_addr_table); 1000#ifdef CONFIG_PM_SLEEP 1001 free_pm_buffer(emu); 1002#endif 1003} 1004 1005static const struct snd_emu_chip_details emu_chip_details[] = { 1006 /* Audigy 5/Rx SB1550 */ 1007 /* Tested by michael@gernoth.net 28 Mar 2015 */ 1008 /* DSP: CA10300-IAT LF 1009 * DAC: Cirrus Logic CS4382-KQZ 1010 * ADC: Philips 1361T 1011 * AC97: Sigmatel STAC9750 1012 * CA0151: None 1013 */ 1014 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102, 1015 .driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]", 1016 .id = "Audigy2", 1017 .emu10k2_chip = 1, 1018 .ca0108_chip = 1, 1019 .spk71 = 1, 1020 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1021 .ac97_chip = 1}, 1022 /* Audigy4 (Not PRO) SB0610 */ 1023 /* Tested by James@superbug.co.uk 4th April 2006 */ 1024 /* A_IOCFG bits 1025 * Output 1026 * 0: ? 1027 * 1: ? 1028 * 2: ? 1029 * 3: 0 - Digital Out, 1 - Line in 1030 * 4: ? 1031 * 5: ? 1032 * 6: ? 1033 * 7: ? 1034 * Input 1035 * 8: ? 1036 * 9: ? 1037 * A: Green jack sense (Front) 1038 * B: ? 1039 * C: Black jack sense (Rear/Side Right) 1040 * D: Yellow jack sense (Center/LFE/Side Left) 1041 * E: ? 1042 * F: ? 1043 * 1044 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08) 1045 * 0 - Digital Out 1046 * 1 - Line in 1047 */ 1048 /* Mic input not tested. 1049 * Analog CD input not tested 1050 * Digital Out not tested. 1051 * Line in working. 1052 * Audio output 5.1 working. Side outputs not working. 1053 */ 1054 /* DSP: CA10300-IAT LF 1055 * DAC: Cirrus Logic CS4382-KQZ 1056 * ADC: Philips 1361T 1057 * AC97: Sigmatel STAC9750 1058 * CA0151: None 1059 */ 1060 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102, 1061 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]", 1062 .id = "Audigy2", 1063 .emu10k2_chip = 1, 1064 .ca0108_chip = 1, 1065 .spk71 = 1, 1066 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1067 .ac97_chip = 1} , 1068 /* Audigy 2 Value AC3 out does not work yet. 1069 * Need to find out how to turn off interpolators. 1070 */ 1071 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1072 /* DSP: CA0108-IAT 1073 * DAC: CS4382-KQ 1074 * ADC: Philips 1361T 1075 * AC97: STAC9750 1076 * CA0151: None 1077 */ 1078 /* 1079 * A_IOCFG Input (GPIO) 1080 * 0x400 = Front analog jack plugged in. (Green socket) 1081 * 0x1000 = Rear analog jack plugged in. (Black socket) 1082 * 0x2000 = Center/LFE analog jack plugged in. (Orange socket) 1083 * A_IOCFG Output (GPIO) 1084 * 0x60 = Sound out of front Left. 1085 * Win sets it to 0xXX61 1086 */ 1087 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102, 1088 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]", 1089 .id = "Audigy2", 1090 .emu10k2_chip = 1, 1091 .ca0108_chip = 1, 1092 .spk71 = 1, 1093 .ac97_chip = 1} , 1094 /* Audigy 2 ZS Notebook Cardbus card.*/ 1095 /* Tested by James@superbug.co.uk 6th November 2006 */ 1096 /* Audio output 7.1/Headphones working. 1097 * Digital output working. (AC3 not checked, only PCM) 1098 * Audio Mic/Line inputs working. 1099 * Digital input not tested. 1100 */ 1101 /* DSP: Tina2 1102 * DAC: Wolfson WM8768/WM8568 1103 * ADC: Wolfson WM8775 1104 * AC97: None 1105 * CA0151: None 1106 */ 1107 /* Tested by James@superbug.co.uk 4th April 2006 */ 1108 /* A_IOCFG bits 1109 * Output 1110 * 0: Not Used 1111 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute. 1112 * 2: Analog input 0 = line in, 1 = mic in 1113 * 3: Not Used 1114 * 4: Digital output 0 = off, 1 = on. 1115 * 5: Not Used 1116 * 6: Not Used 1117 * 7: Not Used 1118 * Input 1119 * All bits 1 (0x3fxx) means nothing plugged in. 1120 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing. 1121 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing. 1122 * C-D: 2 = Front/Rear/etc, 3 = nothing. 1123 * E-F: Always 0 1124 * 1125 */ 1126 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102, 1127 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]", 1128 .id = "Audigy2", 1129 .emu10k2_chip = 1, 1130 .ca0108_chip = 1, 1131 .ca_cardbus_chip = 1, 1132 .spi_dac = 1, 1133 .i2c_adc = 1, 1134 .spk71 = 1} , 1135 /* This is MAEM8950 "Mana" */ 1136 /* Attach MicroDock[M] to make it an E-MU 1616[m]. */ 1137 /* Does NOT support sync daughter card (obviously). */ 1138 /* Tested by James@superbug.co.uk 4th Nov 2007. */ 1139 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102, 1140 .driver = "Audigy2", .name = "E-MU 02 CardBus [MAEM8950]", 1141 .id = "EMU1010", 1142 .emu10k2_chip = 1, 1143 .ca0108_chip = 1, 1144 .ca_cardbus_chip = 1, 1145 .spk71 = 1 , 1146 .emu_model = EMU_MODEL_EMU1616}, 1147 /* Tested by James@superbug.co.uk 4th Nov 2007. */ 1148 /* This is MAEM8960 "Hana3", 0202 is MAEM8980 */ 1149 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a 1150 * MicroDock[M] to make it an E-MU 1616[m]. */ 1151 /* Does NOT support sync daughter card. */ 1152 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102, 1153 .driver = "Audigy2", .name = "E-MU 1010b PCI [MAEM8960]", 1154 .id = "EMU1010", 1155 .emu10k2_chip = 1, 1156 .ca0108_chip = 1, 1157 .spk71 = 1, 1158 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */ 1159 /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */ 1160 /* This is MAEM8986, 0202 is MAEM8980 */ 1161 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a 1162 * MicroDockM to make it an E-MU 1616m. The non-m 1163 * version was never sold with this card, but should 1164 * still work. */ 1165 /* Does NOT support sync daughter card. */ 1166 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102, 1167 .driver = "Audigy2", .name = "E-MU 1010 PCIe [MAEM8986]", 1168 .id = "EMU1010", 1169 .emu10k2_chip = 1, 1170 .ca0108_chip = 1, 1171 .spk71 = 1, 1172 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */ 1173 /* Tested by James@superbug.co.uk 8th July 2005. */ 1174 /* This is MAEM8810 "Hana", 0202 is MAEM8820 "Hamoa" */ 1175 /* Attach 0202 daughter card to make it an E-MU 1212m, OR an 1176 * AudioDock[M] to make it an E-MU 1820[m]. */ 1177 /* Supports sync daughter card. */ 1178 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102, 1179 .driver = "Audigy2", .name = "E-MU 1010 [MAEM8810]", 1180 .id = "EMU1010", 1181 .emu10k2_chip = 1, 1182 .ca0102_chip = 1, 1183 .spk71 = 1, 1184 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */ 1185 /* This is MAEM8852 "HanaLiteLite" */ 1186 /* Supports sync daughter card. */ 1187 /* Tested by oswald.buddenhagen@gmx.de Mar 2023. */ 1188 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102, 1189 .driver = "Audigy2", .name = "E-MU 0404b PCI [MAEM8852]", 1190 .id = "EMU0404", 1191 .emu10k2_chip = 1, 1192 .ca0108_chip = 1, 1193 .spk20 = 1, 1194 .no_adat = 1, 1195 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */ 1196 /* This is MAEM8850 "HanaLite" */ 1197 /* Supports sync daughter card. */ 1198 /* Tested by James@superbug.co.uk 20-3-2007. */ 1199 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102, 1200 .driver = "Audigy2", .name = "E-MU 0404 [MAEM8850]", 1201 .id = "EMU0404", 1202 .emu10k2_chip = 1, 1203 .ca0102_chip = 1, 1204 .spk20 = 1, 1205 .no_adat = 1, 1206 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */ 1207 /* EMU0404 PCIe */ 1208 /* Does NOT support sync daughter card. */ 1209 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102, 1210 .driver = "Audigy2", .name = "E-MU 0404 PCIe [MAEM8984]", 1211 .id = "EMU0404", 1212 .emu10k2_chip = 1, 1213 .ca0108_chip = 1, 1214 .spk20 = 1, 1215 .no_adat = 1, 1216 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */ 1217 {.vendor = 0x1102, .device = 0x0008, 1218 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]", 1219 .id = "Audigy2", 1220 .emu10k2_chip = 1, 1221 .ca0108_chip = 1, 1222 .ac97_chip = 1} , 1223 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1224 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102, 1225 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]", 1226 .id = "Audigy2", 1227 .emu10k2_chip = 1, 1228 .ca0102_chip = 1, 1229 .ca0151_chip = 1, 1230 .spk71 = 1, 1231 .spdif_bug = 1, 1232 .ac97_chip = 1} , 1233 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */ 1234 /* The 0x20061102 does have SB0350 written on it 1235 * Just like 0x20021102 1236 */ 1237 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102, 1238 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]", 1239 .id = "Audigy2", 1240 .emu10k2_chip = 1, 1241 .ca0102_chip = 1, 1242 .ca0151_chip = 1, 1243 .spk71 = 1, 1244 .spdif_bug = 1, 1245 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1246 .ac97_chip = 1} , 1247 /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by 1248 Creative's Windows driver */ 1249 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102, 1250 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]", 1251 .id = "Audigy2", 1252 .emu10k2_chip = 1, 1253 .ca0102_chip = 1, 1254 .ca0151_chip = 1, 1255 .spk71 = 1, 1256 .spdif_bug = 1, 1257 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1258 .ac97_chip = 1} , 1259 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102, 1260 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]", 1261 .id = "Audigy2", 1262 .emu10k2_chip = 1, 1263 .ca0102_chip = 1, 1264 .ca0151_chip = 1, 1265 .spk71 = 1, 1266 .spdif_bug = 1, 1267 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1268 .ac97_chip = 1} , 1269 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102, 1270 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]", 1271 .id = "Audigy2", 1272 .emu10k2_chip = 1, 1273 .ca0102_chip = 1, 1274 .ca0151_chip = 1, 1275 .spk71 = 1, 1276 .spdif_bug = 1, 1277 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1278 .ac97_chip = 1} , 1279 /* Audigy 2 */ 1280 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1281 /* DSP: CA0102-IAT 1282 * DAC: CS4382-KQ 1283 * ADC: Philips 1361T 1284 * AC97: STAC9721 1285 * CA0151: Yes 1286 */ 1287 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102, 1288 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]", 1289 .id = "Audigy2", 1290 .emu10k2_chip = 1, 1291 .ca0102_chip = 1, 1292 .ca0151_chip = 1, 1293 .spk71 = 1, 1294 .spdif_bug = 1, 1295 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1296 .ac97_chip = 1} , 1297 /* Audigy 2 Platinum EX */ 1298 /* Win driver sets A_IOCFG output to 0x1c00 */ 1299 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102, 1300 .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]", 1301 .id = "Audigy2", 1302 .emu10k2_chip = 1, 1303 .ca0102_chip = 1, 1304 .ca0151_chip = 1, 1305 .spk71 = 1, 1306 .spdif_bug = 1} , 1307 /* Dell OEM/Creative Labs Audigy 2 ZS */ 1308 /* See ALSA bug#1365 */ 1309 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102, 1310 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]", 1311 .id = "Audigy2", 1312 .emu10k2_chip = 1, 1313 .ca0102_chip = 1, 1314 .ca0151_chip = 1, 1315 .spk71 = 1, 1316 .spdif_bug = 1, 1317 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1318 .ac97_chip = 1} , 1319 /* Audigy 2 Platinum */ 1320 /* Win driver sets A_IOCFG output to 0xa00 */ 1321 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102, 1322 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]", 1323 .id = "Audigy2", 1324 .emu10k2_chip = 1, 1325 .ca0102_chip = 1, 1326 .ca0151_chip = 1, 1327 .spk71 = 1, 1328 .spdif_bug = 1, 1329 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1330 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */ 1331 .ac97_chip = 1} , 1332 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04, 1333 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]", 1334 .id = "Audigy2", 1335 .emu10k2_chip = 1, 1336 .ca0102_chip = 1, 1337 .ca0151_chip = 1, 1338 .spdif_bug = 1, 1339 .ac97_chip = 1} , 1340 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102, 1341 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]", 1342 .id = "Audigy", 1343 .emu10k2_chip = 1, 1344 .ca0102_chip = 1, 1345 .ac97_chip = 1} , 1346 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102, 1347 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]", 1348 .id = "Audigy", 1349 .emu10k2_chip = 1, 1350 .ca0102_chip = 1, 1351 .spdif_bug = 1, 1352 .ac97_chip = 1} , 1353 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102, 1354 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]", 1355 .id = "Audigy", 1356 .emu10k2_chip = 1, 1357 .ca0102_chip = 1, 1358 .ac97_chip = 1} , 1359 {.vendor = 0x1102, .device = 0x0004, 1360 .driver = "Audigy", .name = "Audigy 1 [Unknown]", 1361 .id = "Audigy", 1362 .emu10k2_chip = 1, 1363 .ca0102_chip = 1, 1364 .ac97_chip = 1} , 1365 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102, 1366 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", 1367 .id = "Live", 1368 .emu10k1_chip = 1, 1369 .ac97_chip = 1, 1370 .sblive51 = 1} , 1371 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102, 1372 .driver = "EMU10K1", .name = "SB Live! [SB0105]", 1373 .id = "Live", 1374 .emu10k1_chip = 1, 1375 .ac97_chip = 1, 1376 .sblive51 = 1} , 1377 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102, 1378 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]", 1379 .id = "Live", 1380 .emu10k1_chip = 1, 1381 .ac97_chip = 1, 1382 .sblive51 = 1} , 1383 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102, 1384 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]", 1385 .id = "Live", 1386 .emu10k1_chip = 1, 1387 .ac97_chip = 1, 1388 .sblive51 = 1} , 1389 /* Tested by ALSA bug#1680 26th December 2005 */ 1390 /* note: It really has SB0220 written on the card, */ 1391 /* but it's SB0228 according to kx.inf */ 1392 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102, 1393 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]", 1394 .id = "Live", 1395 .emu10k1_chip = 1, 1396 .ac97_chip = 1, 1397 .sblive51 = 1} , 1398 /* Tested by Thomas Zehetbauer 27th Aug 2005 */ 1399 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102, 1400 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", 1401 .id = "Live", 1402 .emu10k1_chip = 1, 1403 .ac97_chip = 1, 1404 .sblive51 = 1} , 1405 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102, 1406 .driver = "EMU10K1", .name = "SB Live! 5.1", 1407 .id = "Live", 1408 .emu10k1_chip = 1, 1409 .ac97_chip = 1, 1410 .sblive51 = 1} , 1411 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */ 1412 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102, 1413 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]", 1414 .id = "Live", 1415 .emu10k1_chip = 1, 1416 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum 1417 * share the same IDs! 1418 */ 1419 .sblive51 = 1} , 1420 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102, 1421 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]", 1422 .id = "Live", 1423 .emu10k1_chip = 1, 1424 .ac97_chip = 1, 1425 .sblive51 = 1} , 1426 /* SB Live! Platinum */ 1427 /* Win driver sets A_IOCFG output to 0 */ 1428 /* Tested by Jonathan Dowland <jon@dow.land> Apr 2023. */ 1429 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102, 1430 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]", 1431 .id = "Live", 1432 .emu10k1_chip = 1, 1433 .ac97_chip = 1} , 1434 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102, 1435 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]", 1436 .id = "Live", 1437 .emu10k1_chip = 1, 1438 .ac97_chip = 1, 1439 .sblive51 = 1} , 1440 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102, 1441 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]", 1442 .id = "Live", 1443 .emu10k1_chip = 1, 1444 .ac97_chip = 1, 1445 .sblive51 = 1} , 1446 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102, 1447 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]", 1448 .id = "Live", 1449 .emu10k1_chip = 1, 1450 .ac97_chip = 1, 1451 .sblive51 = 1} , 1452 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1453 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102, 1454 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]", 1455 .id = "Live", 1456 .emu10k1_chip = 1, 1457 .ac97_chip = 1, 1458 .sblive51 = 1} , 1459 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102, 1460 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]", 1461 .id = "Live", 1462 .emu10k1_chip = 1, 1463 .ac97_chip = 1, 1464 .sblive51 = 1} , 1465 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102, 1466 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]", 1467 .id = "Live", 1468 .emu10k1_chip = 1, 1469 .ac97_chip = 1, 1470 .sblive51 = 1} , 1471 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102, 1472 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]", 1473 .id = "Live", 1474 .emu10k1_chip = 1, 1475 .ac97_chip = 1, 1476 .sblive51 = 1} , 1477 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102, 1478 .driver = "EMU10K1", .name = "E-MU APS [PC545]", 1479 .id = "APS", 1480 .emu10k1_chip = 1, 1481 .ecard = 1} , 1482 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102, 1483 .driver = "EMU10K1", .name = "SB Live! [CT4620]", 1484 .id = "Live", 1485 .emu10k1_chip = 1, 1486 .ac97_chip = 1, 1487 .sblive51 = 1} , 1488 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102, 1489 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]", 1490 .id = "Live", 1491 .emu10k1_chip = 1, 1492 .ac97_chip = 1, 1493 .sblive51 = 1} , 1494 {.vendor = 0x1102, .device = 0x0002, 1495 .driver = "EMU10K1", .name = "SB Live! [Unknown]", 1496 .id = "Live", 1497 .emu10k1_chip = 1, 1498 .ac97_chip = 1, 1499 .sblive51 = 1} , 1500 { } /* terminator */ 1501}; 1502 1503/* 1504 * The chip (at least the Audigy 2 CA0102 chip, but most likely others, too) 1505 * has a problem that from time to time it likes to do few DMA reads a bit 1506 * beyond its normal allocation and gets very confused if these reads get 1507 * blocked by a IOMMU. 1508 * 1509 * This behaviour has been observed for the first (reserved) page 1510 * (for which it happens multiple times at every playback), often for various 1511 * synth pages and sometimes for PCM playback buffers and the page table 1512 * memory itself. 1513 * 1514 * As a workaround let's widen these DMA allocations by an extra page if we 1515 * detect that the device is behind a non-passthrough IOMMU. 1516 */ 1517static void snd_emu10k1_detect_iommu(struct snd_emu10k1 *emu) 1518{ 1519 struct iommu_domain *domain; 1520 1521 emu->iommu_workaround = false; 1522 1523 domain = iommu_get_domain_for_dev(emu->card->dev); 1524 if (!domain || domain->type == IOMMU_DOMAIN_IDENTITY) 1525 return; 1526 1527 dev_notice(emu->card->dev, 1528 "non-passthrough IOMMU detected, widening DMA allocations"); 1529 emu->iommu_workaround = true; 1530} 1531 1532int snd_emu10k1_create(struct snd_card *card, 1533 struct pci_dev *pci, 1534 unsigned short extin_mask, 1535 unsigned short extout_mask, 1536 long max_cache_bytes, 1537 int enable_ir, 1538 uint subsystem) 1539{ 1540 struct snd_emu10k1 *emu = card->private_data; 1541 int idx, err; 1542 int is_audigy; 1543 size_t page_table_size; 1544 __le32 *pgtbl; 1545 unsigned int silent_page; 1546 const struct snd_emu_chip_details *c; 1547 1548 /* enable PCI device */ 1549 err = pcim_enable_device(pci); 1550 if (err < 0) 1551 return err; 1552 1553 card->private_free = snd_emu10k1_free; 1554 emu->card = card; 1555 spin_lock_init(&emu->reg_lock); 1556 spin_lock_init(&emu->emu_lock); 1557 spin_lock_init(&emu->spi_lock); 1558 spin_lock_init(&emu->i2c_lock); 1559 spin_lock_init(&emu->voice_lock); 1560 spin_lock_init(&emu->synth_lock); 1561 spin_lock_init(&emu->memblk_lock); 1562 mutex_init(&emu->fx8010.lock); 1563 INIT_LIST_HEAD(&emu->mapped_link_head); 1564 INIT_LIST_HEAD(&emu->mapped_order_link_head); 1565 emu->pci = pci; 1566 emu->irq = -1; 1567 emu->synth = NULL; 1568 emu->get_synth_voice = NULL; 1569 INIT_WORK(&emu->emu1010.work, emu1010_work); 1570 mutex_init(&emu->emu1010.lock); 1571 /* read revision & serial */ 1572 emu->revision = pci->revision; 1573 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial); 1574 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model); 1575 dev_dbg(card->dev, 1576 "vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", 1577 pci->vendor, pci->device, emu->serial, emu->model); 1578 1579 for (c = emu_chip_details; c->vendor; c++) { 1580 if (c->vendor == pci->vendor && c->device == pci->device) { 1581 if (subsystem) { 1582 if (c->subsystem && (c->subsystem == subsystem)) 1583 break; 1584 else 1585 continue; 1586 } else { 1587 if (c->subsystem && (c->subsystem != emu->serial)) 1588 continue; 1589 if (c->revision && c->revision != emu->revision) 1590 continue; 1591 } 1592 break; 1593 } 1594 } 1595 if (c->vendor == 0) { 1596 dev_err(card->dev, "emu10k1: Card not recognised\n"); 1597 return -ENOENT; 1598 } 1599 emu->card_capabilities = c; 1600 if (c->subsystem && !subsystem) 1601 dev_dbg(card->dev, "Sound card name = %s\n", c->name); 1602 else if (subsystem) 1603 dev_dbg(card->dev, "Sound card name = %s, " 1604 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. " 1605 "Forced to subsystem = 0x%x\n", c->name, 1606 pci->vendor, pci->device, emu->serial, c->subsystem); 1607 else 1608 dev_dbg(card->dev, "Sound card name = %s, " 1609 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n", 1610 c->name, pci->vendor, pci->device, 1611 emu->serial); 1612 1613 if (!*card->id && c->id) 1614 strscpy(card->id, c->id, sizeof(card->id)); 1615 1616 is_audigy = emu->audigy = c->emu10k2_chip; 1617 1618 snd_emu10k1_detect_iommu(emu); 1619 1620 /* set addressing mode */ 1621 emu->address_mode = is_audigy ? 0 : 1; 1622 /* set the DMA transfer mask */ 1623 emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK; 1624 if (dma_set_mask_and_coherent(&pci->dev, emu->dma_mask) < 0) { 1625 dev_err(card->dev, 1626 "architecture does not support PCI busmaster DMA with mask 0x%lx\n", 1627 emu->dma_mask); 1628 return -ENXIO; 1629 } 1630 if (is_audigy) 1631 emu->gpr_base = A_FXGPREGBASE; 1632 else 1633 emu->gpr_base = FXGPREGBASE; 1634 1635 err = pci_request_regions(pci, "EMU10K1"); 1636 if (err < 0) 1637 return err; 1638 emu->port = pci_resource_start(pci, 0); 1639 1640 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT; 1641 1642 page_table_size = sizeof(u32) * (emu->address_mode ? MAXPAGES1 : 1643 MAXPAGES0); 1644 if (snd_emu10k1_alloc_pages_maybe_wider(emu, page_table_size, 1645 &emu->ptb_pages) < 0) 1646 return -ENOMEM; 1647 dev_dbg(card->dev, "page table address range is %.8lx:%.8lx\n", 1648 (unsigned long)emu->ptb_pages.addr, 1649 (unsigned long)(emu->ptb_pages.addr + emu->ptb_pages.bytes)); 1650 1651 emu->page_ptr_table = vmalloc(array_size(sizeof(void *), 1652 emu->max_cache_pages)); 1653 emu->page_addr_table = vmalloc(array_size(sizeof(unsigned long), 1654 emu->max_cache_pages)); 1655 if (!emu->page_ptr_table || !emu->page_addr_table) 1656 return -ENOMEM; 1657 1658 if (snd_emu10k1_alloc_pages_maybe_wider(emu, EMUPAGESIZE, 1659 &emu->silent_page) < 0) 1660 return -ENOMEM; 1661 dev_dbg(card->dev, "silent page range is %.8lx:%.8lx\n", 1662 (unsigned long)emu->silent_page.addr, 1663 (unsigned long)(emu->silent_page.addr + 1664 emu->silent_page.bytes)); 1665 1666 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE); 1667 if (!emu->memhdr) 1668 return -ENOMEM; 1669 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) - 1670 sizeof(struct snd_util_memblk); 1671 1672 pci_set_master(pci); 1673 1674 // The masks are not used for Audigy. 1675 // FIXME: these should come from the card_capabilites table. 1676 if (extin_mask == 0) 1677 extin_mask = 0x3fcf; // EXTIN_* 1678 if (extout_mask == 0) 1679 extout_mask = 0x7fff; // EXTOUT_* 1680 emu->fx8010.extin_mask = extin_mask; 1681 emu->fx8010.extout_mask = extout_mask; 1682 emu->enable_ir = enable_ir; 1683 1684 if (emu->card_capabilities->ca_cardbus_chip) { 1685 err = snd_emu10k1_cardbus_init(emu); 1686 if (err < 0) 1687 return err; 1688 } 1689 if (emu->card_capabilities->ecard) { 1690 err = snd_emu10k1_ecard_init(emu); 1691 if (err < 0) 1692 return err; 1693 } else if (emu->card_capabilities->emu_model) { 1694 err = snd_emu10k1_emu1010_init(emu); 1695 if (err < 0) 1696 return err; 1697 } else { 1698 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version 1699 does not support this, it shouldn't do any harm */ 1700 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, 1701 AC97SLOT_CNTR|AC97SLOT_LFE); 1702 } 1703 1704 /* initialize TRAM setup */ 1705 emu->fx8010.itram_size = (16 * 1024)/2; 1706 emu->fx8010.etram_pages.area = NULL; 1707 emu->fx8010.etram_pages.bytes = 0; 1708 1709 /* irq handler must be registered after I/O ports are activated */ 1710 if (devm_request_irq(&pci->dev, pci->irq, snd_emu10k1_interrupt, 1711 IRQF_SHARED, KBUILD_MODNAME, emu)) 1712 return -EBUSY; 1713 emu->irq = pci->irq; 1714 card->sync_irq = emu->irq; 1715 1716 /* 1717 * Init to 0x02109204 : 1718 * Clock accuracy = 0 (1000ppm) 1719 * Sample Rate = 2 (48kHz) 1720 * Audio Channel = 1 (Left of 2) 1721 * Source Number = 0 (Unspecified) 1722 * Generation Status = 1 (Original for Cat Code 12) 1723 * Cat Code = 12 (Digital Signal Mixer) 1724 * Mode = 0 (Mode 0) 1725 * Emphasis = 0 (None) 1726 * CP = 1 (Copyright unasserted) 1727 * AN = 0 (Audio data) 1728 * P = 0 (Consumer) 1729 */ 1730 emu->spdif_bits[0] = emu->spdif_bits[1] = 1731 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 1732 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 1733 SPCS_GENERATIONSTATUS | 0x00001200 | 1734 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; 1735 1736 /* Clear silent pages and set up pointers */ 1737 memset(emu->silent_page.area, 0, emu->silent_page.bytes); 1738 silent_page = emu->silent_page.addr << emu->address_mode; 1739 pgtbl = (__le32 *)emu->ptb_pages.area; 1740 for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++) 1741 pgtbl[idx] = cpu_to_le32(silent_page | idx); 1742 1743 /* set up voice indices */ 1744 for (idx = 0; idx < NUM_G; idx++) 1745 emu->voices[idx].number = idx; 1746 1747 err = snd_emu10k1_init(emu, enable_ir); 1748 if (err < 0) 1749 return err; 1750#ifdef CONFIG_PM_SLEEP 1751 err = alloc_pm_buffer(emu); 1752 if (err < 0) 1753 return err; 1754#endif 1755 1756 /* Initialize the effect engine */ 1757 err = snd_emu10k1_init_efx(emu); 1758 if (err < 0) 1759 return err; 1760 snd_emu10k1_audio_enable(emu); 1761 1762#ifdef CONFIG_SND_PROC_FS 1763 snd_emu10k1_proc_init(emu); 1764#endif 1765 return 0; 1766} 1767 1768#ifdef CONFIG_PM_SLEEP 1769static const unsigned char saved_regs[] = { 1770 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP, 1771 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL, 1772 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2, 1773 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA, 1774 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2, 1775 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX, 1776 0xff /* end */ 1777}; 1778static const unsigned char saved_regs_audigy[] = { 1779 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_EHC, 1780 A_FXRT2, A_SENDAMOUNTS, A_FXRT1, 1781 0xff /* end */ 1782}; 1783 1784static int alloc_pm_buffer(struct snd_emu10k1 *emu) 1785{ 1786 int size; 1787 1788 size = ARRAY_SIZE(saved_regs); 1789 if (emu->audigy) 1790 size += ARRAY_SIZE(saved_regs_audigy); 1791 emu->saved_ptr = vmalloc(array3_size(4, NUM_G, size)); 1792 if (!emu->saved_ptr) 1793 return -ENOMEM; 1794 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0) 1795 return -ENOMEM; 1796 if (emu->card_capabilities->ca0151_chip && 1797 snd_p16v_alloc_pm_buffer(emu) < 0) 1798 return -ENOMEM; 1799 return 0; 1800} 1801 1802static void free_pm_buffer(struct snd_emu10k1 *emu) 1803{ 1804 vfree(emu->saved_ptr); 1805 snd_emu10k1_efx_free_pm_buffer(emu); 1806 if (emu->card_capabilities->ca0151_chip) 1807 snd_p16v_free_pm_buffer(emu); 1808} 1809 1810void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu) 1811{ 1812 int i; 1813 const unsigned char *reg; 1814 unsigned int *val; 1815 1816 val = emu->saved_ptr; 1817 for (reg = saved_regs; *reg != 0xff; reg++) 1818 for (i = 0; i < NUM_G; i++, val++) 1819 *val = snd_emu10k1_ptr_read(emu, *reg, i); 1820 if (emu->audigy) { 1821 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 1822 for (i = 0; i < NUM_G; i++, val++) 1823 *val = snd_emu10k1_ptr_read(emu, *reg, i); 1824 } 1825 if (emu->audigy) 1826 emu->saved_a_iocfg = inw(emu->port + A_IOCFG); 1827 emu->saved_hcfg = inl(emu->port + HCFG); 1828} 1829 1830void snd_emu10k1_resume_init(struct snd_emu10k1 *emu) 1831{ 1832 if (emu->card_capabilities->ca_cardbus_chip) 1833 snd_emu10k1_cardbus_init(emu); 1834 if (emu->card_capabilities->ecard) 1835 snd_emu10k1_ecard_init(emu); 1836 else if (emu->card_capabilities->emu_model) 1837 snd_emu10k1_emu1010_init(emu); 1838 else 1839 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE); 1840 snd_emu10k1_init(emu, emu->enable_ir); 1841} 1842 1843void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu) 1844{ 1845 int i; 1846 const unsigned char *reg; 1847 unsigned int *val; 1848 1849 snd_emu10k1_audio_enable(emu); 1850 1851 /* resore for spdif */ 1852 if (emu->audigy) 1853 outw(emu->saved_a_iocfg, emu->port + A_IOCFG); 1854 outl(emu->saved_hcfg, emu->port + HCFG); 1855 1856 val = emu->saved_ptr; 1857 for (reg = saved_regs; *reg != 0xff; reg++) 1858 for (i = 0; i < NUM_G; i++, val++) 1859 snd_emu10k1_ptr_write(emu, *reg, i, *val); 1860 if (emu->audigy) { 1861 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 1862 for (i = 0; i < NUM_G; i++, val++) 1863 snd_emu10k1_ptr_write(emu, *reg, i, *val); 1864 } 1865} 1866#endif 1867