1226702Sobrien/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
2/*
3 * Copyright (c) 2021 MediaTek Inc.
4 * Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
5 */
6
7#ifndef _DT_BINDINGS_POWER_MT8195_POWER_H
8#define _DT_BINDINGS_POWER_MT8195_POWER_H
9
10#define MT8195_POWER_DOMAIN_PCIE_MAC_P0		0
11#define MT8195_POWER_DOMAIN_PCIE_MAC_P1		1
12#define MT8195_POWER_DOMAIN_PCIE_PHY		2
13#define MT8195_POWER_DOMAIN_SSUSB_PCIE_PHY	3
14#define MT8195_POWER_DOMAIN_CSI_RX_TOP		4
15#define MT8195_POWER_DOMAIN_ETHER		5
16#define MT8195_POWER_DOMAIN_ADSP		6
17#define MT8195_POWER_DOMAIN_AUDIO		7
18#define MT8195_POWER_DOMAIN_MFG0		8
19#define MT8195_POWER_DOMAIN_MFG1		9
20#define MT8195_POWER_DOMAIN_MFG2		10
21#define MT8195_POWER_DOMAIN_MFG3		11
22#define MT8195_POWER_DOMAIN_MFG4		12
23#define MT8195_POWER_DOMAIN_MFG5		13
24#define MT8195_POWER_DOMAIN_MFG6		14
25#define MT8195_POWER_DOMAIN_VPPSYS0		15
26#define MT8195_POWER_DOMAIN_VDOSYS0		16
27#define MT8195_POWER_DOMAIN_VPPSYS1		17
28#define MT8195_POWER_DOMAIN_VDOSYS1		18
29#define MT8195_POWER_DOMAIN_DP_TX		19
30#define MT8195_POWER_DOMAIN_EPD_TX		20
31#define MT8195_POWER_DOMAIN_HDMI_TX		21
32#define MT8195_POWER_DOMAIN_WPESYS		22
33#define MT8195_POWER_DOMAIN_VDEC0		23
34#define MT8195_POWER_DOMAIN_VDEC1		24
35#define MT8195_POWER_DOMAIN_VDEC2		25
36#define MT8195_POWER_DOMAIN_VENC		26
37#define MT8195_POWER_DOMAIN_VENC_CORE1		27
38#define MT8195_POWER_DOMAIN_IMG			28
39#define MT8195_POWER_DOMAIN_DIP			29
40#define MT8195_POWER_DOMAIN_IPE			30
41#define MT8195_POWER_DOMAIN_CAM			31
42#define MT8195_POWER_DOMAIN_CAM_RAWA		32
43#define MT8195_POWER_DOMAIN_CAM_RAWB		33
44#define MT8195_POWER_DOMAIN_CAM_MRAW		34
45
46#endif /* _DT_BINDINGS_POWER_MT8195_POWER_H */
47