1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2// Copyright (C) 2023 Martin Botka <martin@somainline.org>
3
4/ {
5	cpu_opp_table: opp-table-cpu {
6		compatible = "allwinner,sun50i-h616-operating-points";
7		nvmem-cells = <&cpu_speed_grade>;
8		opp-shared;
9
10		opp-480000000 {
11			opp-hz = /bits/ 64 <480000000>;
12			opp-microvolt = <900000>;
13			clock-latency-ns = <244144>; /* 8 32k periods */
14			opp-supported-hw = <0x1f>;
15		};
16
17		opp-600000000 {
18			opp-hz = /bits/ 64 <600000000>;
19			opp-microvolt = <900000>;
20			clock-latency-ns = <244144>; /* 8 32k periods */
21			opp-supported-hw = <0x12>;
22		};
23
24		opp-720000000 {
25			opp-hz = /bits/ 64 <720000000>;
26			opp-microvolt = <900000>;
27			clock-latency-ns = <244144>; /* 8 32k periods */
28			opp-supported-hw = <0x0d>;
29		};
30
31		opp-792000000 {
32			opp-hz = /bits/ 64 <792000000>;
33			opp-microvolt-speed1 = <900000>;
34			opp-microvolt-speed4 = <940000>;
35			clock-latency-ns = <244144>; /* 8 32k periods */
36			opp-supported-hw = <0x12>;
37		};
38
39		opp-936000000 {
40			opp-hz = /bits/ 64 <936000000>;
41			opp-microvolt = <900000>;
42			clock-latency-ns = <244144>; /* 8 32k periods */
43			opp-supported-hw = <0x0d>;
44		};
45
46		opp-1008000000 {
47			opp-hz = /bits/ 64 <1008000000>;
48			opp-microvolt-speed0 = <950000>;
49			opp-microvolt-speed1 = <940000>;
50			opp-microvolt-speed2 = <950000>;
51			opp-microvolt-speed3 = <950000>;
52			opp-microvolt-speed4 = <1020000>;
53			clock-latency-ns = <244144>; /* 8 32k periods */
54			opp-supported-hw = <0x1f>;
55		};
56
57		opp-1104000000 {
58			opp-hz = /bits/ 64 <1104000000>;
59			opp-microvolt-speed0 = <1000000>;
60			opp-microvolt-speed2 = <1000000>;
61			opp-microvolt-speed3 = <1000000>;
62			clock-latency-ns = <244144>; /* 8 32k periods */
63			opp-supported-hw = <0x0d>;
64		};
65
66		opp-1200000000 {
67			opp-hz = /bits/ 64 <1200000000>;
68			opp-microvolt-speed0 = <1050000>;
69			opp-microvolt-speed1 = <1020000>;
70			opp-microvolt-speed2 = <1050000>;
71			opp-microvolt-speed3 = <1050000>;
72			opp-microvolt-speed4 = <1100000>;
73			clock-latency-ns = <244144>; /* 8 32k periods */
74			opp-supported-hw = <0x1f>;
75		};
76
77		opp-1320000000 {
78			opp-hz = /bits/ 64 <1320000000>;
79			opp-microvolt = <1100000>;
80			clock-latency-ns = <244144>; /* 8 32k periods */
81			opp-supported-hw = <0x1d>;
82		};
83
84		opp-1416000000 {
85			opp-hz = /bits/ 64 <1416000000>;
86			opp-microvolt = <1100000>;
87			clock-latency-ns = <244144>; /* 8 32k periods */
88			opp-supported-hw = <0x0d>;
89		};
90
91		opp-1512000000 {
92			opp-hz = /bits/ 64 <1512000000>;
93			opp-microvolt-speed1 = <1100000>;
94			opp-microvolt-speed3 = <1100000>;
95			clock-latency-ns = <244144>; /* 8 32k periods */
96			opp-supported-hw = <0x0a>;
97		};
98	};
99};
100
101&cpu0 {
102	operating-points-v2 = <&cpu_opp_table>;
103};
104
105&cpu1 {
106	operating-points-v2 = <&cpu_opp_table>;
107};
108
109&cpu2 {
110	operating-points-v2 = <&cpu_opp_table>;
111};
112
113&cpu3 {
114	operating-points-v2 = <&cpu_opp_table>;
115};
116