1/* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR MIT */ 2/* 3 * Copyright 2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24#ifndef KFD_SYSFS_H_INCLUDED 25#define KFD_SYSFS_H_INCLUDED 26 27/* Capability bits in node properties */ 28#define HSA_CAP_HOT_PLUGGABLE 0x00000001 29#define HSA_CAP_ATS_PRESENT 0x00000002 30#define HSA_CAP_SHARED_WITH_GRAPHICS 0x00000004 31#define HSA_CAP_QUEUE_SIZE_POW2 0x00000008 32#define HSA_CAP_QUEUE_SIZE_32BIT 0x00000010 33#define HSA_CAP_QUEUE_IDLE_EVENT 0x00000020 34#define HSA_CAP_VA_LIMIT 0x00000040 35#define HSA_CAP_WATCH_POINTS_SUPPORTED 0x00000080 36#define HSA_CAP_WATCH_POINTS_TOTALBITS_MASK 0x00000f00 37#define HSA_CAP_WATCH_POINTS_TOTALBITS_SHIFT 8 38#define HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK 0x00003000 39#define HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT 12 40 41#define HSA_CAP_DOORBELL_TYPE_PRE_1_0 0x0 42#define HSA_CAP_DOORBELL_TYPE_1_0 0x1 43#define HSA_CAP_DOORBELL_TYPE_2_0 0x2 44#define HSA_CAP_AQL_QUEUE_DOUBLE_MAP 0x00004000 45 46#define HSA_CAP_TRAP_DEBUG_SUPPORT 0x00008000 47#define HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_TRAP_OVERRIDE_SUPPORTED 0x00010000 48#define HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_MODE_SUPPORTED 0x00020000 49#define HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED 0x00040000 50 51/* Old buggy user mode depends on this being 0 */ 52#define HSA_CAP_RESERVED_WAS_SRAM_EDCSUPPORTED 0x00080000 53 54#define HSA_CAP_MEM_EDCSUPPORTED 0x00100000 55#define HSA_CAP_RASEVENTNOTIFY 0x00200000 56#define HSA_CAP_ASIC_REVISION_MASK 0x03c00000 57#define HSA_CAP_ASIC_REVISION_SHIFT 22 58#define HSA_CAP_SRAM_EDCSUPPORTED 0x04000000 59#define HSA_CAP_SVMAPI_SUPPORTED 0x08000000 60#define HSA_CAP_FLAGS_COHERENTHOSTACCESS 0x10000000 61#define HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED 0x20000000 62#define HSA_CAP_RESERVED 0xe00f8000 63 64/* debug_prop bits in node properties */ 65#define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_MASK 0x0000000f 66#define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_SHIFT 0 67#define HSA_DBG_WATCH_ADDR_MASK_HI_BIT_MASK 0x000003f0 68#define HSA_DBG_WATCH_ADDR_MASK_HI_BIT_SHIFT 4 69#define HSA_DBG_DISPATCH_INFO_ALWAYS_VALID 0x00000400 70#define HSA_DBG_WATCHPOINTS_EXCLUSIVE 0x00000800 71#define HSA_DBG_RESERVED 0xfffffffffffff000ull 72 73/* Heap types in memory properties */ 74#define HSA_MEM_HEAP_TYPE_SYSTEM 0 75#define HSA_MEM_HEAP_TYPE_FB_PUBLIC 1 76#define HSA_MEM_HEAP_TYPE_FB_PRIVATE 2 77#define HSA_MEM_HEAP_TYPE_GPU_GDS 3 78#define HSA_MEM_HEAP_TYPE_GPU_LDS 4 79#define HSA_MEM_HEAP_TYPE_GPU_SCRATCH 5 80 81/* Flag bits in memory properties */ 82#define HSA_MEM_FLAGS_HOT_PLUGGABLE 0x00000001 83#define HSA_MEM_FLAGS_NON_VOLATILE 0x00000002 84#define HSA_MEM_FLAGS_RESERVED 0xfffffffc 85 86/* Cache types in cache properties */ 87#define HSA_CACHE_TYPE_DATA 0x00000001 88#define HSA_CACHE_TYPE_INSTRUCTION 0x00000002 89#define HSA_CACHE_TYPE_CPU 0x00000004 90#define HSA_CACHE_TYPE_HSACU 0x00000008 91#define HSA_CACHE_TYPE_RESERVED 0xfffffff0 92 93/* Link types in IO link properties (matches CRAT link types) */ 94#define HSA_IOLINK_TYPE_UNDEFINED 0 95#define HSA_IOLINK_TYPE_HYPERTRANSPORT 1 96#define HSA_IOLINK_TYPE_PCIEXPRESS 2 97#define HSA_IOLINK_TYPE_AMBA 3 98#define HSA_IOLINK_TYPE_MIPI 4 99#define HSA_IOLINK_TYPE_QPI_1_1 5 100#define HSA_IOLINK_TYPE_RESERVED1 6 101#define HSA_IOLINK_TYPE_RESERVED2 7 102#define HSA_IOLINK_TYPE_RAPID_IO 8 103#define HSA_IOLINK_TYPE_INFINIBAND 9 104#define HSA_IOLINK_TYPE_RESERVED3 10 105#define HSA_IOLINK_TYPE_XGMI 11 106#define HSA_IOLINK_TYPE_XGOP 12 107#define HSA_IOLINK_TYPE_GZ 13 108#define HSA_IOLINK_TYPE_ETHERNET_RDMA 14 109#define HSA_IOLINK_TYPE_RDMA_OTHER 15 110#define HSA_IOLINK_TYPE_OTHER 16 111 112/* Flag bits in IO link properties (matches CRAT flags, excluding the 113 * bi-directional flag, which is not offially part of the CRAT spec, and 114 * only used internally in KFD) 115 */ 116#define HSA_IOLINK_FLAGS_ENABLED (1 << 0) 117#define HSA_IOLINK_FLAGS_NON_COHERENT (1 << 1) 118#define HSA_IOLINK_FLAGS_NO_ATOMICS_32_BIT (1 << 2) 119#define HSA_IOLINK_FLAGS_NO_ATOMICS_64_BIT (1 << 3) 120#define HSA_IOLINK_FLAGS_NO_PEER_TO_PEER_DMA (1 << 4) 121#define HSA_IOLINK_FLAGS_RESERVED 0xffffffe0 122 123#endif 124