1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ACI_H_
3#define _ACI_H_
4
5#define ACI_REG_COMMAND		0	/* write register offset */
6#define ACI_REG_STATUS		1	/* read register offset */
7#define ACI_REG_BUSY		2	/* busy register offset */
8#define ACI_REG_RDS		2	/* PCM20: RDS register offset */
9#define ACI_MINTIME		500	/* ACI time out limit */
10
11#define ACI_SET_MUTE		0x0d
12#define ACI_SET_POWERAMP	0x0f
13#define ACI_SET_TUNERMUTE	0xa3
14#define ACI_SET_TUNERMONO	0xa4
15#define ACI_SET_IDE		0xd0
16#define ACI_SET_WSS		0xd1
17#define ACI_SET_SOLOMODE	0xd2
18#define ACI_SET_PREAMP		0x03
19#define ACI_GET_PREAMP		0x21
20#define ACI_WRITE_TUNE		0xa7
21#define ACI_READ_TUNERSTEREO	0xa8
22#define ACI_READ_TUNERSTATION	0xa9
23#define ACI_READ_VERSION	0xf1
24#define ACI_READ_IDCODE		0xf2
25#define ACI_INIT		0xff
26#define ACI_STATUS		0xf0
27#define ACI_S_GENERAL		0x00
28#define ACI_ERROR_OP		0xdf
29
30/* ACI Mixer */
31
32/* These are the values for the right channel GET registers.
33   Add an offset of 0x01 for the left channel register.
34   (left=right+0x01) */
35
36#define ACI_GET_MASTER		0x03
37#define ACI_GET_MIC		0x05
38#define ACI_GET_LINE		0x07
39#define ACI_GET_CD		0x09
40#define ACI_GET_SYNTH		0x0b
41#define ACI_GET_PCM		0x0d
42#define ACI_GET_LINE1		0x10	/* Radio on PCM20 */
43#define ACI_GET_LINE2		0x12
44
45#define ACI_GET_EQ1		0x22	/* from Bass ... */
46#define ACI_GET_EQ2		0x24
47#define ACI_GET_EQ3		0x26
48#define ACI_GET_EQ4		0x28
49#define ACI_GET_EQ5		0x2a
50#define ACI_GET_EQ6		0x2c
51#define ACI_GET_EQ7		0x2e	/* ... to Treble */
52
53/* And these are the values for the right channel SET registers.
54   For left channel access you have to add an offset of 0x08.
55   MASTER is an exception, which needs an offset of 0x01 */
56
57#define ACI_SET_MASTER		0x00
58#define ACI_SET_MIC		0x30
59#define ACI_SET_LINE		0x31
60#define ACI_SET_CD		0x34
61#define ACI_SET_SYNTH		0x33
62#define ACI_SET_PCM		0x32
63#define ACI_SET_LINE1		0x35	/* Radio on PCM20 */
64#define ACI_SET_LINE2		0x36
65
66#define ACI_SET_EQ1		0x40	/* from Bass ... */
67#define ACI_SET_EQ2		0x41
68#define ACI_SET_EQ3		0x42
69#define ACI_SET_EQ4		0x43
70#define ACI_SET_EQ5		0x44
71#define ACI_SET_EQ6		0x45
72#define ACI_SET_EQ7		0x46	/* ... to Treble */
73
74struct snd_miro_aci {
75	unsigned long aci_port;
76	int aci_vendor;
77	int aci_product;
78	int aci_version;
79	int aci_amp;
80	int aci_preamp;
81	int aci_solomode;
82
83	struct mutex aci_mutex;
84};
85
86int snd_aci_cmd(struct snd_miro_aci *aci, int write1, int write2, int write3);
87
88struct snd_miro_aci *snd_aci_get_aci(void);
89
90#endif  /* _ACI_H_ */
91
92