145410Smsmith/* SPDX-License-Identifier: GPL-2.0-only */ 245410Smsmith/* 345410Smsmith * adv7604 - Analog Devices ADV7604 video decoder driver 445410Smsmith * 545410Smsmith * Copyright 2012 Cisco Systems, Inc. and/or its affiliates. All rights reserved. 645410Smsmith */ 745410Smsmith 845410Smsmith#ifndef _ADV7604_ 945410Smsmith#define _ADV7604_ 1045410Smsmith 1145410Smsmith#include <linux/types.h> 1245410Smsmith 1345410Smsmith/* Analog input muxing modes (AFE register 0x02, [2:0]) */ 1445410Smsmithenum adv7604_ain_sel { 1545410Smsmith ADV7604_AIN1_2_3_NC_SYNC_1_2 = 0, 1645410Smsmith ADV7604_AIN4_5_6_NC_SYNC_2_1 = 1, 1745410Smsmith ADV7604_AIN7_8_9_NC_SYNC_3_1 = 2, 1845410Smsmith ADV7604_AIN10_11_12_NC_SYNC_4_1 = 3, 1945410Smsmith ADV7604_AIN9_4_5_6_SYNC_2_1 = 4, 2045410Smsmith}; 2145410Smsmith 2245410Smsmith/* 2345410Smsmith * Bus rotation and reordering. This is used to specify component reordering on 2445410Smsmith * the board and describes the components order on the bus when the ADV7604 2545410Smsmith * outputs RGB. 2645410Smsmith */ 2745410Smsmithenum adv7604_bus_order { 2845410Smsmith ADV7604_BUS_ORDER_RGB, /* No operation */ 2945410Smsmith ADV7604_BUS_ORDER_GRB, /* Swap 1-2 */ 3045410Smsmith ADV7604_BUS_ORDER_RBG, /* Swap 2-3 */ 3145410Smsmith ADV7604_BUS_ORDER_BGR, /* Swap 1-3 */ 3245410Smsmith ADV7604_BUS_ORDER_BRG, /* Rotate right */ 3345410Smsmith ADV7604_BUS_ORDER_GBR, /* Rotate left */ 3445410Smsmith}; 3545410Smsmith 3645410Smsmith/* Input Color Space (IO register 0x02, [7:4]) */ 3745410Smsmithenum adv76xx_inp_color_space { 3845410Smsmith ADV76XX_INP_COLOR_SPACE_LIM_RGB = 0, 3945410Smsmith ADV76XX_INP_COLOR_SPACE_FULL_RGB = 1, 4045410Smsmith ADV76XX_INP_COLOR_SPACE_LIM_YCbCr_601 = 2, 4145410Smsmith ADV76XX_INP_COLOR_SPACE_LIM_YCbCr_709 = 3, 4245410Smsmith ADV76XX_INP_COLOR_SPACE_XVYCC_601 = 4, 4345410Smsmith ADV76XX_INP_COLOR_SPACE_XVYCC_709 = 5, 4445410Smsmith ADV76XX_INP_COLOR_SPACE_FULL_YCbCr_601 = 6, 4545410Smsmith ADV76XX_INP_COLOR_SPACE_FULL_YCbCr_709 = 7, 4645410Smsmith ADV76XX_INP_COLOR_SPACE_AUTO = 0xf, 4745410Smsmith}; 4845410Smsmith 4945410Smsmith/* Select output format (IO register 0x03, [4:2]) */ 5045410Smsmithenum adv7604_op_format_mode_sel { 5145410Smsmith ADV7604_OP_FORMAT_MODE0 = 0x00, 5245410Smsmith ADV7604_OP_FORMAT_MODE1 = 0x04, 5345410Smsmith ADV7604_OP_FORMAT_MODE2 = 0x08, 5445410Smsmith}; 5545410Smsmith 5645410Smsmithenum adv76xx_drive_strength { 5745410Smsmith ADV76XX_DR_STR_MEDIUM_LOW = 1, 5845410Smsmith ADV76XX_DR_STR_MEDIUM_HIGH = 2, 5945410Smsmith ADV76XX_DR_STR_HIGH = 3, 6045410Smsmith}; 6145410Smsmith 6245410Smsmith/* INT1 Configuration (IO register 0x40, [1:0]) */ 6345410Smsmithenum adv76xx_int1_config { 6445410Smsmith ADV76XX_INT1_CONFIG_OPEN_DRAIN, 6545410Smsmith ADV76XX_INT1_CONFIG_ACTIVE_LOW, 6645410Smsmith ADV76XX_INT1_CONFIG_ACTIVE_HIGH, 6745410Smsmith ADV76XX_INT1_CONFIG_DISABLED, 6845410Smsmith}; 6945410Smsmith 7045410Smsmithenum adv76xx_page { 7145410Smsmith ADV76XX_PAGE_IO, 7245410Smsmith ADV7604_PAGE_AVLINK, 7345410Smsmith ADV76XX_PAGE_CEC, 7445410Smsmith ADV76XX_PAGE_INFOFRAME, 7545410Smsmith ADV7604_PAGE_ESDP, 7645410Smsmith ADV7604_PAGE_DPP, 7745410Smsmith ADV76XX_PAGE_AFE, 7845410Smsmith ADV76XX_PAGE_REP, 7945410Smsmith ADV76XX_PAGE_EDID, 8045410Smsmith ADV76XX_PAGE_HDMI, 8145410Smsmith ADV76XX_PAGE_TEST, 8245410Smsmith ADV76XX_PAGE_CP, 8345410Smsmith ADV7604_PAGE_VDP, 8445410Smsmith ADV76XX_PAGE_MAX, 8545410Smsmith}; 8645410Smsmith 8745410Smsmith/* Platform dependent definition */ 8845410Smsmithstruct adv76xx_platform_data { 8945410Smsmith /* DIS_PWRDNB: 1 if the PWRDNB pin is unused and unconnected */ 9045410Smsmith unsigned disable_pwrdnb:1; 9145410Smsmith 9245410Smsmith /* DIS_CABLE_DET_RST: 1 if the 5V pins are unused and unconnected */ 9345410Smsmith unsigned disable_cable_det_rst:1; 9445410Smsmith 9545410Smsmith int default_input; 9645410Smsmith 9745410Smsmith /* Analog input muxing mode */ 9845410Smsmith enum adv7604_ain_sel ain_sel; 9945410Smsmith 10045410Smsmith /* Bus rotation and reordering */ 10145410Smsmith enum adv7604_bus_order bus_order; 10245410Smsmith 10345410Smsmith /* Select output format mode */ 10445410Smsmith enum adv7604_op_format_mode_sel op_format_mode_sel; 10545410Smsmith 10645410Smsmith /* Configuration of the INT1 pin */ 10745410Smsmith enum adv76xx_int1_config int1_config; 10845410Smsmith 10945410Smsmith /* IO register 0x02 */ 11045410Smsmith unsigned alt_gamma:1; 11145410Smsmith 11245410Smsmith /* IO register 0x05 */ 11345410Smsmith unsigned blank_data:1; 11445410Smsmith unsigned insert_av_codes:1; 11545410Smsmith unsigned replicate_av_codes:1; 11645410Smsmith 11745410Smsmith /* IO register 0x06 */ 11845410Smsmith unsigned inv_vs_pol:1; 11945410Smsmith unsigned inv_hs_pol:1; 12045410Smsmith unsigned inv_llc_pol:1; 12145410Smsmith 12245410Smsmith /* IO register 0x14 */ 12345410Smsmith enum adv76xx_drive_strength dr_str_data; 12445410Smsmith enum adv76xx_drive_strength dr_str_clk; 12545410Smsmith enum adv76xx_drive_strength dr_str_sync; 12645410Smsmith 12745410Smsmith /* IO register 0x30 */ 12845410Smsmith unsigned output_bus_lsb_to_msb:1; 12945410Smsmith 13045410Smsmith /* Free run */ 13145410Smsmith unsigned hdmi_free_run_mode; 13245410Smsmith 13345410Smsmith /* i2c addresses: 0 == use default */ 13445410Smsmith u8 i2c_addresses[ADV76XX_PAGE_MAX]; 13545410Smsmith}; 13645410Smsmith 13745410Smsmithenum adv76xx_pad { 13845410Smsmith ADV76XX_PAD_HDMI_PORT_A = 0, 13945410Smsmith ADV7604_PAD_HDMI_PORT_B = 1, 14045410Smsmith ADV7604_PAD_HDMI_PORT_C = 2, 14145410Smsmith ADV7604_PAD_HDMI_PORT_D = 3, 14245410Smsmith ADV7604_PAD_VGA_RGB = 4, 14345410Smsmith ADV7604_PAD_VGA_COMP = 5, 14445410Smsmith /* The source pad is either 1 (ADV7611) or 6 (ADV7604) */ 14545410Smsmith ADV7604_PAD_SOURCE = 6, 14645410Smsmith ADV7611_PAD_SOURCE = 1, 14745410Smsmith ADV76XX_PAD_MAX = 7, 14845410Smsmith}; 14945410Smsmith 15045410Smsmith#define V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE (V4L2_CID_DV_CLASS_BASE + 0x1000) 15145410Smsmith#define V4L2_CID_ADV_RX_FREE_RUN_COLOR_MANUAL (V4L2_CID_DV_CLASS_BASE + 0x1001) 15245410Smsmith#define V4L2_CID_ADV_RX_FREE_RUN_COLOR (V4L2_CID_DV_CLASS_BASE + 0x1002) 15345410Smsmith 15445410Smsmith/* notify events */ 15545410Smsmith#define ADV76XX_HOTPLUG 1 15645410Smsmith 15745410Smsmith#endif 15845410Smsmith