1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Texas Instruments System Control Interface Protocol 4 * 5 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/ 6 * Nishanth Menon 7 */ 8 9#ifndef __TISCI_PROTOCOL_H 10#define __TISCI_PROTOCOL_H 11 12/** 13 * struct ti_sci_version_info - version information structure 14 * @abi_major: Major ABI version. Change here implies risk of backward 15 * compatibility break. 16 * @abi_minor: Minor ABI version. Change here implies new feature addition, 17 * or compatible change in ABI. 18 * @firmware_revision: Firmware revision (not usually used). 19 * @firmware_description: Firmware description (not usually used). 20 */ 21struct ti_sci_version_info { 22 u8 abi_major; 23 u8 abi_minor; 24 u16 firmware_revision; 25 char firmware_description[32]; 26}; 27 28struct ti_sci_handle; 29 30/** 31 * struct ti_sci_core_ops - SoC Core Operations 32 * @reboot_device: Reboot the SoC 33 * Returns 0 for successful request(ideally should never return), 34 * else returns corresponding error value. 35 */ 36struct ti_sci_core_ops { 37 int (*reboot_device)(const struct ti_sci_handle *handle); 38}; 39 40/** 41 * struct ti_sci_dev_ops - Device control operations 42 * @get_device: Command to request for device managed by TISCI 43 * Returns 0 for successful exclusive request, else returns 44 * corresponding error message. 45 * @idle_device: Command to idle a device managed by TISCI 46 * Returns 0 for successful exclusive request, else returns 47 * corresponding error message. 48 * @put_device: Command to release a device managed by TISCI 49 * Returns 0 for successful release, else returns corresponding 50 * error message. 51 * @is_valid: Check if the device ID is a valid ID. 52 * Returns 0 if the ID is valid, else returns corresponding error. 53 * @get_context_loss_count: Command to retrieve context loss counter - this 54 * increments every time the device looses context. Overflow 55 * is possible. 56 * - count: pointer to u32 which will retrieve counter 57 * Returns 0 for successful information request and count has 58 * proper data, else returns corresponding error message. 59 * @is_idle: Reports back about device idle state 60 * - req_state: Returns requested idle state 61 * Returns 0 for successful information request and req_state and 62 * current_state has proper data, else returns corresponding error 63 * message. 64 * @is_stop: Reports back about device stop state 65 * - req_state: Returns requested stop state 66 * - current_state: Returns current stop state 67 * Returns 0 for successful information request and req_state and 68 * current_state has proper data, else returns corresponding error 69 * message. 70 * @is_on: Reports back about device ON(or active) state 71 * - req_state: Returns requested ON state 72 * - current_state: Returns current ON state 73 * Returns 0 for successful information request and req_state and 74 * current_state has proper data, else returns corresponding error 75 * message. 76 * @is_transitioning: Reports back if the device is in the middle of transition 77 * of state. 78 * -current_state: Returns 'true' if currently transitioning. 79 * @set_device_resets: Command to configure resets for device managed by TISCI. 80 * -reset_state: Device specific reset bit field 81 * Returns 0 for successful request, else returns 82 * corresponding error message. 83 * @get_device_resets: Command to read state of resets for device managed 84 * by TISCI. 85 * -reset_state: pointer to u32 which will retrieve resets 86 * Returns 0 for successful request, else returns 87 * corresponding error message. 88 * 89 * NOTE: for all these functions, the following parameters are generic in 90 * nature: 91 * -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle 92 * -id: Device Identifier 93 * 94 * Request for the device - NOTE: the client MUST maintain integrity of 95 * usage count by balancing get_device with put_device. No refcounting is 96 * managed by driver for that purpose. 97 */ 98struct ti_sci_dev_ops { 99 int (*get_device)(const struct ti_sci_handle *handle, u32 id); 100 int (*get_device_exclusive)(const struct ti_sci_handle *handle, u32 id); 101 int (*idle_device)(const struct ti_sci_handle *handle, u32 id); 102 int (*idle_device_exclusive)(const struct ti_sci_handle *handle, 103 u32 id); 104 int (*put_device)(const struct ti_sci_handle *handle, u32 id); 105 int (*is_valid)(const struct ti_sci_handle *handle, u32 id); 106 int (*get_context_loss_count)(const struct ti_sci_handle *handle, 107 u32 id, u32 *count); 108 int (*is_idle)(const struct ti_sci_handle *handle, u32 id, 109 bool *requested_state); 110 int (*is_stop)(const struct ti_sci_handle *handle, u32 id, 111 bool *req_state, bool *current_state); 112 int (*is_on)(const struct ti_sci_handle *handle, u32 id, 113 bool *req_state, bool *current_state); 114 int (*is_transitioning)(const struct ti_sci_handle *handle, u32 id, 115 bool *current_state); 116 int (*set_device_resets)(const struct ti_sci_handle *handle, u32 id, 117 u32 reset_state); 118 int (*get_device_resets)(const struct ti_sci_handle *handle, u32 id, 119 u32 *reset_state); 120}; 121 122/** 123 * struct ti_sci_clk_ops - Clock control operations 124 * @get_clock: Request for activation of clock and manage by processor 125 * - needs_ssc: 'true' if Spread Spectrum clock is desired. 126 * - can_change_freq: 'true' if frequency change is desired. 127 * - enable_input_term: 'true' if input termination is desired. 128 * @idle_clock: Request for Idling a clock managed by processor 129 * @put_clock: Release the clock to be auto managed by TISCI 130 * @is_auto: Is the clock being auto managed 131 * - req_state: state indicating if the clock is auto managed 132 * @is_on: Is the clock ON 133 * - req_state: if the clock is requested to be forced ON 134 * - current_state: if the clock is currently ON 135 * @is_off: Is the clock OFF 136 * - req_state: if the clock is requested to be forced OFF 137 * - current_state: if the clock is currently Gated 138 * @set_parent: Set the clock source of a specific device clock 139 * - parent_id: Parent clock identifier to set. 140 * @get_parent: Get the current clock source of a specific device clock 141 * - parent_id: Parent clock identifier which is the parent. 142 * @get_num_parents: Get the number of parents of the current clock source 143 * - num_parents: returns the number of parent clocks. 144 * @get_best_match_freq: Find a best matching frequency for a frequency 145 * range. 146 * - match_freq: Best matching frequency in Hz. 147 * @set_freq: Set the Clock frequency 148 * @get_freq: Get the Clock frequency 149 * - current_freq: Frequency in Hz that the clock is at. 150 * 151 * NOTE: for all these functions, the following parameters are generic in 152 * nature: 153 * -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle 154 * -did: Device identifier this request is for 155 * -cid: Clock identifier for the device for this request. 156 * Each device has it's own set of clock inputs. This indexes 157 * which clock input to modify. 158 * -min_freq: The minimum allowable frequency in Hz. This is the minimum 159 * allowable programmed frequency and does not account for clock 160 * tolerances and jitter. 161 * -target_freq: The target clock frequency in Hz. A frequency will be 162 * processed as close to this target frequency as possible. 163 * -max_freq: The maximum allowable frequency in Hz. This is the maximum 164 * allowable programmed frequency and does not account for clock 165 * tolerances and jitter. 166 * 167 * Request for the clock - NOTE: the client MUST maintain integrity of 168 * usage count by balancing get_clock with put_clock. No refcounting is 169 * managed by driver for that purpose. 170 */ 171struct ti_sci_clk_ops { 172 int (*get_clock)(const struct ti_sci_handle *handle, u32 did, u32 cid, 173 bool needs_ssc, bool can_change_freq, 174 bool enable_input_term); 175 int (*idle_clock)(const struct ti_sci_handle *handle, u32 did, u32 cid); 176 int (*put_clock)(const struct ti_sci_handle *handle, u32 did, u32 cid); 177 int (*is_auto)(const struct ti_sci_handle *handle, u32 did, u32 cid, 178 bool *req_state); 179 int (*is_on)(const struct ti_sci_handle *handle, u32 did, u32 cid, 180 bool *req_state, bool *current_state); 181 int (*is_off)(const struct ti_sci_handle *handle, u32 did, u32 cid, 182 bool *req_state, bool *current_state); 183 int (*set_parent)(const struct ti_sci_handle *handle, u32 did, u32 cid, 184 u32 parent_id); 185 int (*get_parent)(const struct ti_sci_handle *handle, u32 did, u32 cid, 186 u32 *parent_id); 187 int (*get_num_parents)(const struct ti_sci_handle *handle, u32 did, 188 u32 cid, u32 *num_parents); 189 int (*get_best_match_freq)(const struct ti_sci_handle *handle, u32 did, 190 u32 cid, u64 min_freq, u64 target_freq, 191 u64 max_freq, u64 *match_freq); 192 int (*set_freq)(const struct ti_sci_handle *handle, u32 did, u32 cid, 193 u64 min_freq, u64 target_freq, u64 max_freq); 194 int (*get_freq)(const struct ti_sci_handle *handle, u32 did, u32 cid, 195 u64 *current_freq); 196}; 197 198/** 199 * struct ti_sci_resource_desc - Description of TI SCI resource instance range. 200 * @start: Start index of the first resource range. 201 * @num: Number of resources in the first range. 202 * @start_sec: Start index of the second resource range. 203 * @num_sec: Number of resources in the second range. 204 * @res_map: Bitmap to manage the allocation of these resources. 205 */ 206struct ti_sci_resource_desc { 207 u16 start; 208 u16 num; 209 u16 start_sec; 210 u16 num_sec; 211 unsigned long *res_map; 212}; 213 214/** 215 * struct ti_sci_rm_core_ops - Resource management core operations 216 * @get_range: Get a range of resources belonging to ti sci host. 217 * @get_rage_from_shost: Get a range of resources belonging to 218 * specified host id. 219 * - s_host: Host processing entity to which the 220 * resources are allocated 221 * 222 * NOTE: for these functions, all the parameters are consolidated and defined 223 * as below: 224 * - handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle 225 * - dev_id: TISCI device ID. 226 * - subtype: Resource assignment subtype that is being requested 227 * from the given device. 228 * - desc: Pointer to ti_sci_resource_desc to be updated with the resource 229 * range start index and number of resources 230 */ 231struct ti_sci_rm_core_ops { 232 int (*get_range)(const struct ti_sci_handle *handle, u32 dev_id, 233 u8 subtype, struct ti_sci_resource_desc *desc); 234 int (*get_range_from_shost)(const struct ti_sci_handle *handle, 235 u32 dev_id, u8 subtype, u8 s_host, 236 struct ti_sci_resource_desc *desc); 237}; 238 239#define TI_SCI_RESASG_SUBTYPE_IR_OUTPUT 0 240#define TI_SCI_RESASG_SUBTYPE_IA_VINT 0xa 241#define TI_SCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT 0xd 242/** 243 * struct ti_sci_rm_irq_ops: IRQ management operations 244 * @set_irq: Set an IRQ route between the requested source 245 * and destination 246 * @set_event_map: Set an Event based peripheral irq to Interrupt 247 * Aggregator. 248 * @free_irq: Free an IRQ route between the requested source 249 * and destination. 250 * @free_event_map: Free an event based peripheral irq to Interrupt 251 * Aggregator. 252 */ 253struct ti_sci_rm_irq_ops { 254 int (*set_irq)(const struct ti_sci_handle *handle, u16 src_id, 255 u16 src_index, u16 dst_id, u16 dst_host_irq); 256 int (*set_event_map)(const struct ti_sci_handle *handle, u16 src_id, 257 u16 src_index, u16 ia_id, u16 vint, 258 u16 global_event, u8 vint_status_bit); 259 int (*free_irq)(const struct ti_sci_handle *handle, u16 src_id, 260 u16 src_index, u16 dst_id, u16 dst_host_irq); 261 int (*free_event_map)(const struct ti_sci_handle *handle, u16 src_id, 262 u16 src_index, u16 ia_id, u16 vint, 263 u16 global_event, u8 vint_status_bit); 264}; 265 266/* RA config.addr_lo parameter is valid for RM ring configure TI_SCI message */ 267#define TI_SCI_MSG_VALUE_RM_RING_ADDR_LO_VALID BIT(0) 268/* RA config.addr_hi parameter is valid for RM ring configure TI_SCI message */ 269#define TI_SCI_MSG_VALUE_RM_RING_ADDR_HI_VALID BIT(1) 270 /* RA config.count parameter is valid for RM ring configure TI_SCI message */ 271#define TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID BIT(2) 272/* RA config.mode parameter is valid for RM ring configure TI_SCI message */ 273#define TI_SCI_MSG_VALUE_RM_RING_MODE_VALID BIT(3) 274/* RA config.size parameter is valid for RM ring configure TI_SCI message */ 275#define TI_SCI_MSG_VALUE_RM_RING_SIZE_VALID BIT(4) 276/* RA config.order_id parameter is valid for RM ring configure TISCI message */ 277#define TI_SCI_MSG_VALUE_RM_RING_ORDER_ID_VALID BIT(5) 278/* RA config.virtid parameter is valid for RM ring configure TISCI message */ 279#define TI_SCI_MSG_VALUE_RM_RING_VIRTID_VALID BIT(6) 280/* RA config.asel parameter is valid for RM ring configure TISCI message */ 281#define TI_SCI_MSG_VALUE_RM_RING_ASEL_VALID BIT(7) 282 283#define TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER \ 284 (TI_SCI_MSG_VALUE_RM_RING_ADDR_LO_VALID | \ 285 TI_SCI_MSG_VALUE_RM_RING_ADDR_HI_VALID | \ 286 TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID | \ 287 TI_SCI_MSG_VALUE_RM_RING_MODE_VALID | \ 288 TI_SCI_MSG_VALUE_RM_RING_SIZE_VALID | \ 289 TI_SCI_MSG_VALUE_RM_RING_ASEL_VALID) 290 291/** 292 * struct ti_sci_msg_rm_ring_cfg - Ring configuration 293 * 294 * Parameters for Navigator Subsystem ring configuration 295 * See @ti_sci_msg_rm_ring_cfg_req 296 */ 297struct ti_sci_msg_rm_ring_cfg { 298 u32 valid_params; 299 u16 nav_id; 300 u16 index; 301 u32 addr_lo; 302 u32 addr_hi; 303 u32 count; 304 u8 mode; 305 u8 size; 306 u8 order_id; 307 u16 virtid; 308 u8 asel; 309}; 310 311/** 312 * struct ti_sci_rm_ringacc_ops - Ring Accelerator Management operations 313 * @set_cfg: configure the SoC Navigator Subsystem Ring Accelerator ring 314 */ 315struct ti_sci_rm_ringacc_ops { 316 int (*set_cfg)(const struct ti_sci_handle *handle, 317 const struct ti_sci_msg_rm_ring_cfg *params); 318}; 319 320/** 321 * struct ti_sci_rm_psil_ops - PSI-L thread operations 322 * @pair: pair PSI-L source thread to a destination thread. 323 * If the src_thread is mapped to UDMA tchan, the corresponding channel's 324 * TCHAN_THRD_ID register is updated. 325 * If the dst_thread is mapped to UDMA rchan, the corresponding channel's 326 * RCHAN_THRD_ID register is updated. 327 * @unpair: unpair PSI-L source thread from a destination thread. 328 * If the src_thread is mapped to UDMA tchan, the corresponding channel's 329 * TCHAN_THRD_ID register is cleared. 330 * If the dst_thread is mapped to UDMA rchan, the corresponding channel's 331 * RCHAN_THRD_ID register is cleared. 332 */ 333struct ti_sci_rm_psil_ops { 334 int (*pair)(const struct ti_sci_handle *handle, u32 nav_id, 335 u32 src_thread, u32 dst_thread); 336 int (*unpair)(const struct ti_sci_handle *handle, u32 nav_id, 337 u32 src_thread, u32 dst_thread); 338}; 339 340/* UDMAP channel types */ 341#define TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR 2 342#define TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR_SB 3 /* RX only */ 343#define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_PBRR 10 344#define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_PBVR 11 345#define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBRR 12 346#define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBVR 13 347 348#define TI_SCI_RM_UDMAP_RX_FLOW_DESC_HOST 0 349#define TI_SCI_RM_UDMAP_RX_FLOW_DESC_MONO 2 350 351#define TI_SCI_RM_UDMAP_CHAN_BURST_SIZE_64_BYTES 1 352#define TI_SCI_RM_UDMAP_CHAN_BURST_SIZE_128_BYTES 2 353#define TI_SCI_RM_UDMAP_CHAN_BURST_SIZE_256_BYTES 3 354 355#define TI_SCI_RM_BCDMA_EXTENDED_CH_TYPE_TCHAN 0 356#define TI_SCI_RM_BCDMA_EXTENDED_CH_TYPE_BCHAN 1 357 358/* UDMAP TX/RX channel valid_params common declarations */ 359#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_PAUSE_ON_ERR_VALID BIT(0) 360#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_VALID BIT(1) 361#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_CHAN_TYPE_VALID BIT(2) 362#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_FETCH_SIZE_VALID BIT(3) 363#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_CQ_QNUM_VALID BIT(4) 364#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_PRIORITY_VALID BIT(5) 365#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_QOS_VALID BIT(6) 366#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_ORDER_ID_VALID BIT(7) 367#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIORITY_VALID BIT(8) 368#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_BURST_SIZE_VALID BIT(14) 369 370/** 371 * Configures a Navigator Subsystem UDMAP transmit channel 372 * 373 * Configures a Navigator Subsystem UDMAP transmit channel registers. 374 * See @ti_sci_msg_rm_udmap_tx_ch_cfg_req 375 */ 376struct ti_sci_msg_rm_udmap_tx_ch_cfg { 377 u32 valid_params; 378#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_EINFO_VALID BIT(9) 379#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_PSWORDS_VALID BIT(10) 380#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_SUPR_TDPKT_VALID BIT(11) 381#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_CREDIT_COUNT_VALID BIT(12) 382#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FDEPTH_VALID BIT(13) 383#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_TDTYPE_VALID BIT(15) 384#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_EXTENDED_CH_TYPE_VALID BIT(16) 385 u16 nav_id; 386 u16 index; 387 u8 tx_pause_on_err; 388 u8 tx_filt_einfo; 389 u8 tx_filt_pswords; 390 u8 tx_atype; 391 u8 tx_chan_type; 392 u8 tx_supr_tdpkt; 393 u16 tx_fetch_size; 394 u8 tx_credit_count; 395 u16 txcq_qnum; 396 u8 tx_priority; 397 u8 tx_qos; 398 u8 tx_orderid; 399 u16 fdepth; 400 u8 tx_sched_priority; 401 u8 tx_burst_size; 402 u8 tx_tdtype; 403 u8 extended_ch_type; 404}; 405 406/** 407 * Configures a Navigator Subsystem UDMAP receive channel 408 * 409 * Configures a Navigator Subsystem UDMAP receive channel registers. 410 * See @ti_sci_msg_rm_udmap_rx_ch_cfg_req 411 */ 412struct ti_sci_msg_rm_udmap_rx_ch_cfg { 413 u32 valid_params; 414#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_START_VALID BIT(9) 415#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_CNT_VALID BIT(10) 416#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_SHORT_VALID BIT(11) 417#define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_LONG_VALID BIT(12) 418 u16 nav_id; 419 u16 index; 420 u16 rx_fetch_size; 421 u16 rxcq_qnum; 422 u8 rx_priority; 423 u8 rx_qos; 424 u8 rx_orderid; 425 u8 rx_sched_priority; 426 u16 flowid_start; 427 u16 flowid_cnt; 428 u8 rx_pause_on_err; 429 u8 rx_atype; 430 u8 rx_chan_type; 431 u8 rx_ignore_short; 432 u8 rx_ignore_long; 433 u8 rx_burst_size; 434}; 435 436/** 437 * Configures a Navigator Subsystem UDMAP receive flow 438 * 439 * Configures a Navigator Subsystem UDMAP receive flow's registers. 440 * See @tis_ci_msg_rm_udmap_flow_cfg_req 441 */ 442struct ti_sci_msg_rm_udmap_flow_cfg { 443 u32 valid_params; 444#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_EINFO_PRESENT_VALID BIT(0) 445#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_PSINFO_PRESENT_VALID BIT(1) 446#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_ERROR_HANDLING_VALID BIT(2) 447#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DESC_TYPE_VALID BIT(3) 448#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SOP_OFFSET_VALID BIT(4) 449#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_QNUM_VALID BIT(5) 450#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_HI_VALID BIT(6) 451#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_LO_VALID BIT(7) 452#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_HI_VALID BIT(8) 453#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_LO_VALID BIT(9) 454#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_HI_SEL_VALID BIT(10) 455#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_LO_SEL_VALID BIT(11) 456#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_HI_SEL_VALID BIT(12) 457#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_LO_SEL_VALID BIT(13) 458#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ0_SZ0_QNUM_VALID BIT(14) 459#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ1_QNUM_VALID BIT(15) 460#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ2_QNUM_VALID BIT(16) 461#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ3_QNUM_VALID BIT(17) 462#define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_PS_LOCATION_VALID BIT(18) 463 u16 nav_id; 464 u16 flow_index; 465 u8 rx_einfo_present; 466 u8 rx_psinfo_present; 467 u8 rx_error_handling; 468 u8 rx_desc_type; 469 u16 rx_sop_offset; 470 u16 rx_dest_qnum; 471 u8 rx_src_tag_hi; 472 u8 rx_src_tag_lo; 473 u8 rx_dest_tag_hi; 474 u8 rx_dest_tag_lo; 475 u8 rx_src_tag_hi_sel; 476 u8 rx_src_tag_lo_sel; 477 u8 rx_dest_tag_hi_sel; 478 u8 rx_dest_tag_lo_sel; 479 u16 rx_fdq0_sz0_qnum; 480 u16 rx_fdq1_qnum; 481 u16 rx_fdq2_qnum; 482 u16 rx_fdq3_qnum; 483 u8 rx_ps_location; 484}; 485 486/** 487 * struct ti_sci_rm_udmap_ops - UDMA Management operations 488 * @tx_ch_cfg: configure SoC Navigator Subsystem UDMA transmit channel. 489 * @rx_ch_cfg: configure SoC Navigator Subsystem UDMA receive channel. 490 * @rx_flow_cfg1: configure SoC Navigator Subsystem UDMA receive flow. 491 */ 492struct ti_sci_rm_udmap_ops { 493 int (*tx_ch_cfg)(const struct ti_sci_handle *handle, 494 const struct ti_sci_msg_rm_udmap_tx_ch_cfg *params); 495 int (*rx_ch_cfg)(const struct ti_sci_handle *handle, 496 const struct ti_sci_msg_rm_udmap_rx_ch_cfg *params); 497 int (*rx_flow_cfg)(const struct ti_sci_handle *handle, 498 const struct ti_sci_msg_rm_udmap_flow_cfg *params); 499}; 500 501/** 502 * struct ti_sci_proc_ops - Processor Control operations 503 * @request: Request to control a physical processor. The requesting host 504 * should be in the processor access list 505 * @release: Relinquish a physical processor control 506 * @handover: Handover a physical processor control to another host 507 * in the permitted list 508 * @set_config: Set base configuration of a processor 509 * @set_control: Setup limited control flags in specific cases 510 * @get_status: Get the state of physical processor 511 * 512 * NOTE: The following paramteres are generic in nature for all these ops, 513 * -handle: Pointer to TI SCI handle as retrieved by *ti_sci_get_handle 514 * -pid: Processor ID 515 * -hid: Host ID 516 */ 517struct ti_sci_proc_ops { 518 int (*request)(const struct ti_sci_handle *handle, u8 pid); 519 int (*release)(const struct ti_sci_handle *handle, u8 pid); 520 int (*handover)(const struct ti_sci_handle *handle, u8 pid, u8 hid); 521 int (*set_config)(const struct ti_sci_handle *handle, u8 pid, 522 u64 boot_vector, u32 cfg_set, u32 cfg_clr); 523 int (*set_control)(const struct ti_sci_handle *handle, u8 pid, 524 u32 ctrl_set, u32 ctrl_clr); 525 int (*get_status)(const struct ti_sci_handle *handle, u8 pid, 526 u64 *boot_vector, u32 *cfg_flags, u32 *ctrl_flags, 527 u32 *status_flags); 528}; 529 530/** 531 * struct ti_sci_ops - Function support for TI SCI 532 * @dev_ops: Device specific operations 533 * @clk_ops: Clock specific operations 534 * @rm_core_ops: Resource management core operations. 535 * @rm_irq_ops: IRQ management specific operations 536 * @proc_ops: Processor Control specific operations 537 */ 538struct ti_sci_ops { 539 struct ti_sci_core_ops core_ops; 540 struct ti_sci_dev_ops dev_ops; 541 struct ti_sci_clk_ops clk_ops; 542 struct ti_sci_rm_core_ops rm_core_ops; 543 struct ti_sci_rm_irq_ops rm_irq_ops; 544 struct ti_sci_rm_ringacc_ops rm_ring_ops; 545 struct ti_sci_rm_psil_ops rm_psil_ops; 546 struct ti_sci_rm_udmap_ops rm_udmap_ops; 547 struct ti_sci_proc_ops proc_ops; 548}; 549 550/** 551 * struct ti_sci_handle - Handle returned to TI SCI clients for usage. 552 * @version: structure containing version information 553 * @ops: operations that are made available to TI SCI clients 554 */ 555struct ti_sci_handle { 556 struct ti_sci_version_info version; 557 struct ti_sci_ops ops; 558}; 559 560#define TI_SCI_RESOURCE_NULL 0xffff 561 562/** 563 * struct ti_sci_resource - Structure representing a resource assigned 564 * to a device. 565 * @sets: Number of sets available from this resource type 566 * @lock: Lock to guard the res map in each set. 567 * @desc: Array of resource descriptors. 568 */ 569struct ti_sci_resource { 570 u16 sets; 571 raw_spinlock_t lock; 572 struct ti_sci_resource_desc *desc; 573}; 574 575#if IS_ENABLED(CONFIG_TI_SCI_PROTOCOL) 576const struct ti_sci_handle *ti_sci_get_handle(struct device *dev); 577int ti_sci_put_handle(const struct ti_sci_handle *handle); 578const struct ti_sci_handle *devm_ti_sci_get_handle(struct device *dev); 579const struct ti_sci_handle *ti_sci_get_by_phandle(struct device_node *np, 580 const char *property); 581const struct ti_sci_handle *devm_ti_sci_get_by_phandle(struct device *dev, 582 const char *property); 583u16 ti_sci_get_free_resource(struct ti_sci_resource *res); 584void ti_sci_release_resource(struct ti_sci_resource *res, u16 id); 585u32 ti_sci_get_num_resources(struct ti_sci_resource *res); 586struct ti_sci_resource * 587devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle, 588 struct device *dev, u32 dev_id, char *of_prop); 589struct ti_sci_resource * 590devm_ti_sci_get_resource(const struct ti_sci_handle *handle, struct device *dev, 591 u32 dev_id, u32 sub_type); 592 593#else /* CONFIG_TI_SCI_PROTOCOL */ 594 595static inline const struct ti_sci_handle *ti_sci_get_handle(struct device *dev) 596{ 597 return ERR_PTR(-EINVAL); 598} 599 600static inline int ti_sci_put_handle(const struct ti_sci_handle *handle) 601{ 602 return -EINVAL; 603} 604 605static inline 606const struct ti_sci_handle *devm_ti_sci_get_handle(struct device *dev) 607{ 608 return ERR_PTR(-EINVAL); 609} 610 611static inline 612const struct ti_sci_handle *ti_sci_get_by_phandle(struct device_node *np, 613 const char *property) 614{ 615 return ERR_PTR(-EINVAL); 616} 617 618static inline 619const struct ti_sci_handle *devm_ti_sci_get_by_phandle(struct device *dev, 620 const char *property) 621{ 622 return ERR_PTR(-EINVAL); 623} 624 625static inline u16 ti_sci_get_free_resource(struct ti_sci_resource *res) 626{ 627 return TI_SCI_RESOURCE_NULL; 628} 629 630static inline void ti_sci_release_resource(struct ti_sci_resource *res, u16 id) 631{ 632} 633 634static inline u32 ti_sci_get_num_resources(struct ti_sci_resource *res) 635{ 636 return 0; 637} 638 639static inline struct ti_sci_resource * 640devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle, 641 struct device *dev, u32 dev_id, char *of_prop) 642{ 643 return ERR_PTR(-EINVAL); 644} 645 646static inline struct ti_sci_resource * 647devm_ti_sci_get_resource(const struct ti_sci_handle *handle, struct device *dev, 648 u32 dev_id, u32 sub_type) 649{ 650 return ERR_PTR(-EINVAL); 651} 652#endif /* CONFIG_TI_SCI_PROTOCOL */ 653 654#endif /* __TISCI_PROTOCOL_H */ 655