1/*
2 * Copyright (c) 2007 Cisco Systems, Inc.  All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses.  You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 *     Redistribution and use in source and binary forms, with or
11 *     without modification, are permitted provided that the following
12 *     conditions are met:
13 *
14 *	- Redistributions of source code must retain the above
15 *	  copyright notice, this list of conditions and the following
16 *	  disclaimer.
17 *
18 *	- Redistributions in binary form must reproduce the above
19 *	  copyright notice, this list of conditions and the following
20 *	  disclaimer in the documentation and/or other materials
21 *	  provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#ifndef MLX4_CQ_H
34#define MLX4_CQ_H
35
36#include <linux/types.h>
37#include <uapi/linux/if_ether.h>
38
39#include <linux/mlx4/device.h>
40#include <linux/mlx4/doorbell.h>
41
42struct mlx4_cqe {
43	__be32			vlan_my_qpn;
44	__be32			immed_rss_invalid;
45	__be32			g_mlpath_rqpn;
46	__be16			sl_vid;
47	union {
48		struct {
49			__be16	rlid;
50			__be16  status;
51			u8      ipv6_ext_mask;
52			u8      badfcs_enc;
53		};
54		u8  smac[ETH_ALEN];
55	};
56	__be32			byte_cnt;
57	__be16			wqe_index;
58	__be16			checksum;
59	u8			reserved[3];
60	u8			owner_sr_opcode;
61};
62
63struct mlx4_err_cqe {
64	__be32			my_qpn;
65	u32			reserved1[5];
66	__be16			wqe_index;
67	u8			vendor_err_syndrome;
68	u8			syndrome;
69	u8			reserved2[3];
70	u8			owner_sr_opcode;
71};
72
73struct mlx4_ts_cqe {
74	__be32			vlan_my_qpn;
75	__be32			immed_rss_invalid;
76	__be32			g_mlpath_rqpn;
77	__be32			timestamp_hi;
78	__be16			status;
79	u8			ipv6_ext_mask;
80	u8			badfcs_enc;
81	__be32			byte_cnt;
82	__be16			wqe_index;
83	__be16			checksum;
84	u8			reserved;
85	__be16			timestamp_lo;
86	u8			owner_sr_opcode;
87} __packed;
88
89enum {
90	MLX4_CQE_L2_TUNNEL_IPOK		= 1 << 31,
91	MLX4_CQE_CVLAN_PRESENT_MASK	= 1 << 29,
92	MLX4_CQE_SVLAN_PRESENT_MASK	= 1 << 30,
93	MLX4_CQE_L2_TUNNEL		= 1 << 27,
94	MLX4_CQE_L2_TUNNEL_CSUM		= 1 << 26,
95	MLX4_CQE_L2_TUNNEL_IPV4		= 1 << 25,
96
97	MLX4_CQE_QPN_MASK		= 0xffffff,
98	MLX4_CQE_VID_MASK		= 0xfff,
99};
100
101enum {
102	MLX4_CQE_OWNER_MASK	= 0x80,
103	MLX4_CQE_IS_SEND_MASK	= 0x40,
104	MLX4_CQE_OPCODE_MASK	= 0x1f
105};
106
107enum {
108	MLX4_CQE_SYNDROME_LOCAL_LENGTH_ERR		= 0x01,
109	MLX4_CQE_SYNDROME_LOCAL_QP_OP_ERR		= 0x02,
110	MLX4_CQE_SYNDROME_LOCAL_PROT_ERR		= 0x04,
111	MLX4_CQE_SYNDROME_WR_FLUSH_ERR			= 0x05,
112	MLX4_CQE_SYNDROME_MW_BIND_ERR			= 0x06,
113	MLX4_CQE_SYNDROME_BAD_RESP_ERR			= 0x10,
114	MLX4_CQE_SYNDROME_LOCAL_ACCESS_ERR		= 0x11,
115	MLX4_CQE_SYNDROME_REMOTE_INVAL_REQ_ERR		= 0x12,
116	MLX4_CQE_SYNDROME_REMOTE_ACCESS_ERR		= 0x13,
117	MLX4_CQE_SYNDROME_REMOTE_OP_ERR			= 0x14,
118	MLX4_CQE_SYNDROME_TRANSPORT_RETRY_EXC_ERR	= 0x15,
119	MLX4_CQE_SYNDROME_RNR_RETRY_EXC_ERR		= 0x16,
120	MLX4_CQE_SYNDROME_REMOTE_ABORTED_ERR		= 0x22,
121};
122
123enum {
124	MLX4_CQE_STATUS_IPV4		= 1 << 6,
125	MLX4_CQE_STATUS_IPV4F		= 1 << 7,
126	MLX4_CQE_STATUS_IPV6		= 1 << 8,
127	MLX4_CQE_STATUS_IPV4OPT		= 1 << 9,
128	MLX4_CQE_STATUS_TCP		= 1 << 10,
129	MLX4_CQE_STATUS_UDP		= 1 << 11,
130	MLX4_CQE_STATUS_IPOK		= 1 << 12,
131};
132
133/* L4_CSUM is logically part of status, but has to checked against badfcs_enc */
134enum {
135	MLX4_CQE_STATUS_L4_CSUM		= 1 << 2,
136};
137
138enum {
139	MLX4_CQE_LLC                     = 1,
140	MLX4_CQE_SNAP                    = 1 << 1,
141	MLX4_CQE_BAD_FCS                 = 1 << 4,
142};
143
144#define MLX4_MAX_CQ_PERIOD (BIT(16) - 1)
145#define MLX4_MAX_CQ_COUNT (BIT(16) - 1)
146
147static inline void mlx4_cq_arm(struct mlx4_cq *cq, u32 cmd,
148			       void __iomem *uar_page,
149			       spinlock_t *doorbell_lock)
150{
151	__be32 doorbell[2];
152	u32 sn;
153	u32 ci;
154
155	sn = cq->arm_sn & 3;
156	ci = cq->cons_index & 0xffffff;
157
158	*cq->arm_db = cpu_to_be32(sn << 28 | cmd | ci);
159
160	/*
161	 * Make sure that the doorbell record in host memory is
162	 * written before ringing the doorbell via PCI MMIO.
163	 */
164	wmb();
165
166	doorbell[0] = cpu_to_be32(sn << 28 | cmd | cq->cqn);
167	doorbell[1] = cpu_to_be32(ci);
168
169	mlx4_write64(doorbell, uar_page + MLX4_CQ_DOORBELL, doorbell_lock);
170}
171
172static inline void mlx4_cq_set_ci(struct mlx4_cq *cq)
173{
174	*cq->set_ci_db = cpu_to_be32(cq->cons_index & 0xffffff);
175}
176
177enum {
178	MLX4_CQ_DB_REQ_NOT_SOL		= 1 << 24,
179	MLX4_CQ_DB_REQ_NOT		= 2 << 24
180};
181
182int mlx4_cq_modify(struct mlx4_dev *dev, struct mlx4_cq *cq,
183		   u16 count, u16 period);
184int mlx4_cq_resize(struct mlx4_dev *dev, struct mlx4_cq *cq,
185		   int entries, struct mlx4_mtt *mtt);
186
187#endif /* MLX4_CQ_H */
188