1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Copyright (C) 2015 Microchip Technology
4 */
5
6#ifndef _MICROCHIPPHY_H
7#define _MICROCHIPPHY_H
8
9#define LAN88XX_INT_MASK			(0x19)
10#define LAN88XX_INT_MASK_MDINTPIN_EN_		(0x8000)
11#define LAN88XX_INT_MASK_SPEED_CHANGE_		(0x4000)
12#define LAN88XX_INT_MASK_LINK_CHANGE_		(0x2000)
13#define LAN88XX_INT_MASK_FDX_CHANGE_		(0x1000)
14#define LAN88XX_INT_MASK_AUTONEG_ERR_		(0x0800)
15#define LAN88XX_INT_MASK_AUTONEG_DONE_		(0x0400)
16#define LAN88XX_INT_MASK_POE_DETECT_		(0x0200)
17#define LAN88XX_INT_MASK_SYMBOL_ERR_		(0x0100)
18#define LAN88XX_INT_MASK_FAST_LINK_FAIL_	(0x0080)
19#define LAN88XX_INT_MASK_WOL_EVENT_		(0x0040)
20#define LAN88XX_INT_MASK_EXTENDED_INT_		(0x0020)
21#define LAN88XX_INT_MASK_RESERVED_		(0x0010)
22#define LAN88XX_INT_MASK_FALSE_CARRIER_		(0x0008)
23#define LAN88XX_INT_MASK_LINK_SPEED_DS_		(0x0004)
24#define LAN88XX_INT_MASK_MASTER_SLAVE_DONE_	(0x0002)
25#define LAN88XX_INT_MASK_RX__ER_		(0x0001)
26
27#define LAN88XX_INT_STS				(0x1A)
28#define LAN88XX_INT_STS_INT_ACTIVE_		(0x8000)
29#define LAN88XX_INT_STS_SPEED_CHANGE_		(0x4000)
30#define LAN88XX_INT_STS_LINK_CHANGE_		(0x2000)
31#define LAN88XX_INT_STS_FDX_CHANGE_		(0x1000)
32#define LAN88XX_INT_STS_AUTONEG_ERR_		(0x0800)
33#define LAN88XX_INT_STS_AUTONEG_DONE_		(0x0400)
34#define LAN88XX_INT_STS_POE_DETECT_		(0x0200)
35#define LAN88XX_INT_STS_SYMBOL_ERR_		(0x0100)
36#define LAN88XX_INT_STS_FAST_LINK_FAIL_		(0x0080)
37#define LAN88XX_INT_STS_WOL_EVENT_		(0x0040)
38#define LAN88XX_INT_STS_EXTENDED_INT_		(0x0020)
39#define LAN88XX_INT_STS_RESERVED_		(0x0010)
40#define LAN88XX_INT_STS_FALSE_CARRIER_		(0x0008)
41#define LAN88XX_INT_STS_LINK_SPEED_DS_		(0x0004)
42#define LAN88XX_INT_STS_MASTER_SLAVE_DONE_	(0x0002)
43#define LAN88XX_INT_STS_RX_ER_			(0x0001)
44
45#define LAN88XX_EXT_PAGE_ACCESS			(0x1F)
46#define LAN88XX_EXT_PAGE_SPACE_0		(0x0000)
47#define LAN88XX_EXT_PAGE_SPACE_1		(0x0001)
48#define LAN88XX_EXT_PAGE_SPACE_2		(0x0002)
49
50/* Extended Register Page 1 space */
51#define LAN88XX_EXT_MODE_CTRL			(0x13)
52#define LAN88XX_EXT_MODE_CTRL_MDIX_MASK_	(0x000C)
53#define LAN88XX_EXT_MODE_CTRL_AUTO_MDIX_	(0x0000)
54#define LAN88XX_EXT_MODE_CTRL_MDI_		(0x0008)
55#define LAN88XX_EXT_MODE_CTRL_MDI_X_		(0x000C)
56
57/* MMD 3 Registers */
58#define	LAN88XX_MMD3_CHIP_ID			(32877)
59#define	LAN88XX_MMD3_CHIP_REV			(32878)
60
61/* Registers specific to the LAN7800/LAN7850 embedded phy */
62#define LAN78XX_PHY_LED_MODE_SELECT		(0x1D)
63
64/* DSP registers */
65#define PHY_ARDENNES_MMD_DEV_3_PHY_CFG		(0x806A)
66#define PHY_ARDENNES_MMD_DEV_3_PHY_CFG_ZD_DLY_EN_	(0x2000)
67#define LAN88XX_EXT_PAGE_ACCESS_TR		(0x52B5)
68#define LAN88XX_EXT_PAGE_TR_CR			16
69#define LAN88XX_EXT_PAGE_TR_LOW_DATA		17
70#define LAN88XX_EXT_PAGE_TR_HIGH_DATA		18
71
72#endif /* _MICROCHIPPHY_H */
73