1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2013, The Linux Foundation. All rights reserved.
4 * Copyright (c) BayLibre, SAS.
5 * Author : Neil Armstrong <narmstrong@baylibre.com>
6 */
7
8#ifndef _DT_BINDINGS_RESET_GCC_MDM9615_H
9#define _DT_BINDINGS_RESET_GCC_MDM9615_H
10
11#define SFAB_MSS_Q6_SW_RESET				0
12#define SFAB_MSS_Q6_FW_RESET				1
13#define QDSS_STM_RESET					2
14#define AFAB_SMPSS_S_RESET				3
15#define AFAB_SMPSS_M1_RESET				4
16#define AFAB_SMPSS_M0_RESET				5
17#define AFAB_EBI1_CH0_RESET				6
18#define AFAB_EBI1_CH1_RESET				7
19#define SFAB_ADM0_M0_RESET				8
20#define SFAB_ADM0_M1_RESET				9
21#define SFAB_ADM0_M2_RESET				10
22#define ADM0_C2_RESET					11
23#define ADM0_C1_RESET					12
24#define ADM0_C0_RESET					13
25#define ADM0_PBUS_RESET					14
26#define ADM0_RESET					15
27#define QDSS_CLKS_SW_RESET				16
28#define QDSS_POR_RESET					17
29#define QDSS_TSCTR_RESET				18
30#define QDSS_HRESET_RESET				19
31#define QDSS_AXI_RESET					20
32#define QDSS_DBG_RESET					21
33#define PCIE_A_RESET					22
34#define PCIE_AUX_RESET					23
35#define PCIE_H_RESET					24
36#define SFAB_PCIE_M_RESET				25
37#define SFAB_PCIE_S_RESET				26
38#define SFAB_MSS_M_RESET				27
39#define SFAB_USB3_M_RESET				28
40#define SFAB_RIVA_M_RESET				29
41#define SFAB_LPASS_RESET				30
42#define SFAB_AFAB_M_RESET				31
43#define AFAB_SFAB_M0_RESET				32
44#define AFAB_SFAB_M1_RESET				33
45#define SFAB_SATA_S_RESET				34
46#define SFAB_DFAB_M_RESET				35
47#define DFAB_SFAB_M_RESET				36
48#define DFAB_SWAY0_RESET				37
49#define DFAB_SWAY1_RESET				38
50#define DFAB_ARB0_RESET					39
51#define DFAB_ARB1_RESET					40
52#define PPSS_PROC_RESET					41
53#define PPSS_RESET					42
54#define DMA_BAM_RESET					43
55#define SPS_TIC_H_RESET					44
56#define SLIMBUS_H_RESET					45
57#define SFAB_CFPB_M_RESET				46
58#define SFAB_CFPB_S_RESET				47
59#define TSIF_H_RESET					48
60#define CE1_H_RESET					49
61#define CE1_CORE_RESET					50
62#define CE1_SLEEP_RESET					51
63#define CE2_H_RESET					52
64#define CE2_CORE_RESET					53
65#define SFAB_SFPB_M_RESET				54
66#define SFAB_SFPB_S_RESET				55
67#define RPM_PROC_RESET					56
68#define PMIC_SSBI2_RESET				57
69#define SDC1_RESET					58
70#define SDC2_RESET					59
71#define SDC3_RESET					60
72#define SDC4_RESET					61
73#define SDC5_RESET					62
74#define DFAB_A2_RESET					63
75#define USB_HS1_RESET					64
76#define USB_HSIC_RESET					65
77#define USB_FS1_XCVR_RESET				66
78#define USB_FS1_RESET					67
79#define USB_FS2_XCVR_RESET				68
80#define USB_FS2_RESET					69
81#define GSBI1_RESET					70
82#define GSBI2_RESET					71
83#define GSBI3_RESET					72
84#define GSBI4_RESET					73
85#define GSBI5_RESET					74
86#define GSBI6_RESET					75
87#define GSBI7_RESET					76
88#define GSBI8_RESET					77
89#define GSBI9_RESET					78
90#define GSBI10_RESET					79
91#define GSBI11_RESET					80
92#define GSBI12_RESET					81
93#define SPDM_RESET					82
94#define TLMM_H_RESET					83
95#define SFAB_MSS_S_RESET				84
96#define MSS_SLP_RESET					85
97#define MSS_Q6SW_JTAG_RESET				86
98#define MSS_Q6FW_JTAG_RESET				87
99#define MSS_RESET					88
100#define SATA_H_RESET					89
101#define SATA_RXOOB_RESE					90
102#define SATA_PMALIVE_RESET				91
103#define SATA_SFAB_M_RESET				92
104#define TSSC_RESET					93
105#define PDM_RESET					94
106#define MPM_H_RESET					95
107#define MPM_RESET					96
108#define SFAB_SMPSS_S_RESET				97
109#define PRNG_RESET					98
110#define RIVA_RESET					99
111#define USB_HS3_RESET					100
112#define USB_HS4_RESET					101
113#define CE3_RESET					102
114#define PCIE_EXT_PCI_RESET				103
115#define PCIE_PHY_RESET					104
116#define PCIE_PCI_RESET					105
117#define PCIE_POR_RESET					106
118#define PCIE_HCLK_RESET					107
119#define PCIE_ACLK_RESET					108
120#define CE3_H_RESET					109
121#define SFAB_CE3_M_RESET				110
122#define SFAB_CE3_S_RESET				111
123#define SATA_RESET					112
124#define CE3_SLEEP_RESET					113
125#define GSS_SLP_RESET					114
126#define GSS_RESET					115
127
128#endif
129