11590Srgrimes/* SPDX-License-Identifier: GPL-2.0+ 21590Srgrimes * 31590Srgrimes * Copyright (C) 2014 Renesas Electronics Corporation 41590Srgrimes * Copyright 2013 Ideas On Board SPRL 51590Srgrimes */ 61590Srgrimes 71590Srgrimes#ifndef __DT_BINDINGS_CLOCK_R8A7794_H__ 81590Srgrimes#define __DT_BINDINGS_CLOCK_R8A7794_H__ 91590Srgrimes 101590Srgrimes/* CPG */ 111590Srgrimes#define R8A7794_CLK_MAIN 0 121590Srgrimes#define R8A7794_CLK_PLL0 1 131590Srgrimes#define R8A7794_CLK_PLL1 2 141590Srgrimes#define R8A7794_CLK_PLL3 3 151590Srgrimes#define R8A7794_CLK_LB 4 161590Srgrimes#define R8A7794_CLK_QSPI 5 171590Srgrimes#define R8A7794_CLK_SDH 6 181590Srgrimes#define R8A7794_CLK_SD0 7 191590Srgrimes#define R8A7794_CLK_RCAN 8 201590Srgrimes 211590Srgrimes/* MSTP0 */ 221590Srgrimes#define R8A7794_CLK_MSIOF0 0 231590Srgrimes 241590Srgrimes/* MSTP1 */ 251590Srgrimes#define R8A7794_CLK_VCP0 1 261590Srgrimes#define R8A7794_CLK_VPC0 3 271590Srgrimes#define R8A7794_CLK_TMU1 11 281590Srgrimes#define R8A7794_CLK_3DG 12 2929759Swollman#define R8A7794_CLK_2DDMAC 15 3050477Speter#define R8A7794_CLK_FDP1_0 19 311590Srgrimes#define R8A7794_CLK_TMU3 21 321590Srgrimes#define R8A7794_CLK_TMU2 22 331590Srgrimes#define R8A7794_CLK_CMT0 24 341590Srgrimes#define R8A7794_CLK_TMU0 25 351590Srgrimes#define R8A7794_CLK_VSP1_DU0 28 36226396Sed#define R8A7794_CLK_VSP1_S 31 37226396Sed 38226396Sed/* MSTP2 */ 39226396Sed#define R8A7794_CLK_SCIFA2 2 4029759Swollman#define R8A7794_CLK_SCIFA1 3 4129759Swollman#define R8A7794_CLK_SCIFA0 4 4229759Swollman#define R8A7794_CLK_MSIOF2 5 4387715Smarkm#define R8A7794_CLK_SCIFB0 6 4429759Swollman#define R8A7794_CLK_SCIFB1 7 451590Srgrimes#define R8A7794_CLK_MSIOF1 8 461590Srgrimes#define R8A7794_CLK_SCIFB2 16 471590Srgrimes#define R8A7794_CLK_SYS_DMAC1 18 48158161Sbde#define R8A7794_CLK_SYS_DMAC0 19 4974671Stmm 5074671Stmm/* MSTP3 */ 5174671Stmm#define R8A7794_CLK_SDHI2 11 5274671Stmm#define R8A7794_CLK_SDHI1 12 53158161Sbde#define R8A7794_CLK_SDHI0 14 5474671Stmm#define R8A7794_CLK_MMCIF0 15 551590Srgrimes#define R8A7794_CLK_IIC0 18 561590Srgrimes#define R8A7794_CLK_IIC1 23 571590Srgrimes#define R8A7794_CLK_CMT1 29 581590Srgrimes#define R8A7794_CLK_USBDMAC0 30 591590Srgrimes#define R8A7794_CLK_USBDMAC1 31 601590Srgrimes 61158160Sbde/* MSTP4 */ 62158160Sbde#define R8A7794_CLK_IRQC 7 6374671Stmm#define R8A7794_CLK_INTC_SYS 8 641590Srgrimes 651590Srgrimes/* MSTP5 */ 661590Srgrimes#define R8A7794_CLK_AUDIO_DMAC0 2 671590Srgrimes#define R8A7794_CLK_PWM 23 68 69/* MSTP7 */ 70#define R8A7794_CLK_EHCI 3 71#define R8A7794_CLK_HSUSB 4 72#define R8A7794_CLK_HSCIF2 13 73#define R8A7794_CLK_SCIF5 14 74#define R8A7794_CLK_SCIF4 15 75#define R8A7794_CLK_HSCIF1 16 76#define R8A7794_CLK_HSCIF0 17 77#define R8A7794_CLK_SCIF3 18 78#define R8A7794_CLK_SCIF2 19 79#define R8A7794_CLK_SCIF1 20 80#define R8A7794_CLK_SCIF0 21 81#define R8A7794_CLK_DU1 23 82#define R8A7794_CLK_DU0 24 83 84/* MSTP8 */ 85#define R8A7794_CLK_VIN1 10 86#define R8A7794_CLK_VIN0 11 87#define R8A7794_CLK_ETHERAVB 12 88#define R8A7794_CLK_ETHER 13 89 90/* MSTP9 */ 91#define R8A7794_CLK_GPIO6 5 92#define R8A7794_CLK_GPIO5 7 93#define R8A7794_CLK_GPIO4 8 94#define R8A7794_CLK_GPIO3 9 95#define R8A7794_CLK_GPIO2 10 96#define R8A7794_CLK_GPIO1 11 97#define R8A7794_CLK_GPIO0 12 98#define R8A7794_CLK_RCAN1 15 99#define R8A7794_CLK_RCAN0 16 100#define R8A7794_CLK_QSPI_MOD 17 101#define R8A7794_CLK_I2C5 25 102#define R8A7794_CLK_I2C4 27 103#define R8A7794_CLK_I2C3 28 104#define R8A7794_CLK_I2C2 29 105#define R8A7794_CLK_I2C1 30 106#define R8A7794_CLK_I2C0 31 107 108/* MSTP10 */ 109#define R8A7794_CLK_SSI_ALL 5 110#define R8A7794_CLK_SSI9 6 111#define R8A7794_CLK_SSI8 7 112#define R8A7794_CLK_SSI7 8 113#define R8A7794_CLK_SSI6 9 114#define R8A7794_CLK_SSI5 10 115#define R8A7794_CLK_SSI4 11 116#define R8A7794_CLK_SSI3 12 117#define R8A7794_CLK_SSI2 13 118#define R8A7794_CLK_SSI1 14 119#define R8A7794_CLK_SSI0 15 120#define R8A7794_CLK_SCU_ALL 17 121#define R8A7794_CLK_SCU_DVC1 18 122#define R8A7794_CLK_SCU_DVC0 19 123#define R8A7794_CLK_SCU_CTU1_MIX1 20 124#define R8A7794_CLK_SCU_CTU0_MIX0 21 125#define R8A7794_CLK_SCU_SRC6 25 126#define R8A7794_CLK_SCU_SRC5 26 127#define R8A7794_CLK_SCU_SRC4 27 128#define R8A7794_CLK_SCU_SRC3 28 129#define R8A7794_CLK_SCU_SRC2 29 130#define R8A7794_CLK_SCU_SRC1 30 131 132/* MSTP11 */ 133#define R8A7794_CLK_SCIFA3 6 134#define R8A7794_CLK_SCIFA4 7 135#define R8A7794_CLK_SCIFA5 8 136 137#endif /* __DT_BINDINGS_CLOCK_R8A7794_H__ */ 138