1168404Spjd/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2168404Spjd/* 3168404Spjd * Copyright (c) 2021, Konrad Dybcio <konrad.dybcio@somainline.org> 4168404Spjd */ 5185029Spjd 6185029Spjd#ifndef _DT_BINDINGS_CLK_QCOM_GCC_SM6125_H 7168404Spjd#define _DT_BINDINGS_CLK_QCOM_GCC_SM6125_H 8168404Spjd 9168404Spjd#define GPLL0_OUT_AUX2 0 10168404Spjd#define GPLL0_OUT_MAIN 1 11168404Spjd#define GPLL6_OUT_MAIN 2 12168404Spjd#define GPLL7_OUT_MAIN 3 13168404Spjd#define GPLL8_OUT_MAIN 4 14168404Spjd#define GPLL9_OUT_MAIN 5 15168404Spjd#define GPLL0_OUT_EARLY 6 16168404Spjd#define GPLL3_OUT_EARLY 7 17168404Spjd#define GPLL4_OUT_MAIN 8 18168404Spjd#define GPLL5_OUT_MAIN 9 19168404Spjd#define GPLL6_OUT_EARLY 10 20168404Spjd#define GPLL7_OUT_EARLY 11 21168404Spjd#define GPLL8_OUT_EARLY 12 22219089Spjd#define GPLL9_OUT_EARLY 13 23168404Spjd#define GCC_AHB2PHY_CSI_CLK 14 24168404Spjd#define GCC_AHB2PHY_USB_CLK 15 25168404Spjd#define GCC_APC_VS_CLK 16 26269845Sdelphij#define GCC_BOOT_ROM_AHB_CLK 17 27269845Sdelphij#define GCC_CAMERA_AHB_CLK 18 28269845Sdelphij#define GCC_CAMERA_XO_CLK 19 29269845Sdelphij#define GCC_CAMSS_AHB_CLK_SRC 20 30168404Spjd#define GCC_CAMSS_CCI_AHB_CLK 21 31168404Spjd#define GCC_CAMSS_CCI_CLK 22 32168404Spjd#define GCC_CAMSS_CCI_CLK_SRC 23 33168404Spjd#define GCC_CAMSS_CPHY_CSID0_CLK 24 34168404Spjd#define GCC_CAMSS_CPHY_CSID1_CLK 25 35168404Spjd#define GCC_CAMSS_CPHY_CSID2_CLK 26 36168404Spjd#define GCC_CAMSS_CPHY_CSID3_CLK 27 37168404Spjd#define GCC_CAMSS_CPP_AHB_CLK 28 38168404Spjd#define GCC_CAMSS_CPP_AXI_CLK 29 39168404Spjd#define GCC_CAMSS_CPP_CLK 30 40168404Spjd#define GCC_CAMSS_CPP_CLK_SRC 31 41168404Spjd#define GCC_CAMSS_CPP_VBIF_AHB_CLK 32 42185029Spjd#define GCC_CAMSS_CSI0_AHB_CLK 33 43168404Spjd#define GCC_CAMSS_CSI0_CLK 34 44168404Spjd#define GCC_CAMSS_CSI0_CLK_SRC 35 45168404Spjd#define GCC_CAMSS_CSI0PHYTIMER_CLK 36 46265745Sdelphij#define GCC_CAMSS_CSI0PHYTIMER_CLK_SRC 37 47168404Spjd#define GCC_CAMSS_CSI0PIX_CLK 38 48168404Spjd#define GCC_CAMSS_CSI0RDI_CLK 39 49168404Spjd#define GCC_CAMSS_CSI1_AHB_CLK 40 50168404Spjd#define GCC_CAMSS_CSI1_CLK 41 51168404Spjd#define GCC_CAMSS_CSI1_CLK_SRC 42 52168404Spjd#define GCC_CAMSS_CSI1PHYTIMER_CLK 43 53168404Spjd#define GCC_CAMSS_CSI1PHYTIMER_CLK_SRC 44 54168404Spjd#define GCC_CAMSS_CSI1PIX_CLK 45 55168404Spjd#define GCC_CAMSS_CSI1RDI_CLK 46 56168404Spjd#define GCC_CAMSS_CSI2_AHB_CLK 47 57168404Spjd#define GCC_CAMSS_CSI2_CLK 48 58168404Spjd#define GCC_CAMSS_CSI2_CLK_SRC 49 59168404Spjd#define GCC_CAMSS_CSI2PHYTIMER_CLK 50 60168404Spjd#define GCC_CAMSS_CSI2PHYTIMER_CLK_SRC 51 61168404Spjd#define GCC_CAMSS_CSI2PIX_CLK 52 62168404Spjd#define GCC_CAMSS_CSI2RDI_CLK 53 63168404Spjd#define GCC_CAMSS_CSI3_AHB_CLK 54 64168404Spjd#define GCC_CAMSS_CSI3_CLK 55 65168404Spjd#define GCC_CAMSS_CSI3_CLK_SRC 56 66168404Spjd#define GCC_CAMSS_CSI3PIX_CLK 57 67168404Spjd#define GCC_CAMSS_CSI3RDI_CLK 58 68168404Spjd#define GCC_CAMSS_CSI_VFE0_CLK 59 69168404Spjd#define GCC_CAMSS_CSI_VFE1_CLK 60 70168404Spjd#define GCC_CAMSS_CSIPHY0_CLK 61 71168404Spjd#define GCC_CAMSS_CSIPHY1_CLK 62 72168404Spjd#define GCC_CAMSS_CSIPHY2_CLK 63 73168404Spjd#define GCC_CAMSS_CSIPHY_CLK_SRC 64 74168404Spjd#define GCC_CAMSS_GP0_CLK 65 75168404Spjd#define GCC_CAMSS_GP0_CLK_SRC 66 76168404Spjd#define GCC_CAMSS_GP1_CLK 67 77168404Spjd#define GCC_CAMSS_GP1_CLK_SRC 68 78168404Spjd#define GCC_CAMSS_ISPIF_AHB_CLK 69 79168404Spjd#define GCC_CAMSS_JPEG_AHB_CLK 70 80168404Spjd#define GCC_CAMSS_JPEG_AXI_CLK 71 81168404Spjd#define GCC_CAMSS_JPEG_CLK 72 82168404Spjd#define GCC_CAMSS_JPEG_CLK_SRC 73 83168404Spjd#define GCC_CAMSS_MCLK0_CLK 74 84168404Spjd#define GCC_CAMSS_MCLK0_CLK_SRC 75 85168404Spjd#define GCC_CAMSS_MCLK1_CLK 76 86168404Spjd#define GCC_CAMSS_MCLK1_CLK_SRC 77 87168404Spjd#define GCC_CAMSS_MCLK2_CLK 78 88168404Spjd#define GCC_CAMSS_MCLK2_CLK_SRC 79 89168404Spjd#define GCC_CAMSS_MCLK3_CLK 80 90168404Spjd#define GCC_CAMSS_MCLK3_CLK_SRC 81 91168404Spjd#define GCC_CAMSS_MICRO_AHB_CLK 82 92168404Spjd#define GCC_CAMSS_THROTTLE_NRT_AXI_CLK 83 93168404Spjd#define GCC_CAMSS_THROTTLE_RT_AXI_CLK 84 94168404Spjd#define GCC_CAMSS_TOP_AHB_CLK 85 95168404Spjd#define GCC_CAMSS_VFE0_AHB_CLK 86 96168404Spjd#define GCC_CAMSS_VFE0_CLK 87 97168404Spjd#define GCC_CAMSS_VFE0_CLK_SRC 88 98168404Spjd#define GCC_CAMSS_VFE0_STREAM_CLK 89 99168404Spjd#define GCC_CAMSS_VFE1_AHB_CLK 90 100168404Spjd#define GCC_CAMSS_VFE1_CLK 91 101168404Spjd#define GCC_CAMSS_VFE1_CLK_SRC 92 102168404Spjd#define GCC_CAMSS_VFE1_STREAM_CLK 93 103168404Spjd#define GCC_CAMSS_VFE_TSCTR_CLK 94 104168404Spjd#define GCC_CAMSS_VFE_VBIF_AHB_CLK 95 105168404Spjd#define GCC_CAMSS_VFE_VBIF_AXI_CLK 96 106168404Spjd#define GCC_CE1_AHB_CLK 97 107168404Spjd#define GCC_CE1_AXI_CLK 98 108168404Spjd#define GCC_CE1_CLK 99 109168404Spjd#define GCC_CFG_NOC_USB3_PRIM_AXI_CLK 100 110168404Spjd#define GCC_CPUSS_GNOC_CLK 101 111168404Spjd#define GCC_DISP_AHB_CLK 102 112168404Spjd#define GCC_DISP_GPLL0_DIV_CLK_SRC 103 113168404Spjd#define GCC_DISP_HF_AXI_CLK 104 114168404Spjd#define GCC_DISP_THROTTLE_CORE_CLK 105 115168404Spjd#define GCC_DISP_XO_CLK 106 116168404Spjd#define GCC_GP1_CLK 107 117168404Spjd#define GCC_GP1_CLK_SRC 108 118168404Spjd#define GCC_GP2_CLK 109 119168404Spjd#define GCC_GP2_CLK_SRC 110 120168404Spjd#define GCC_GP3_CLK 111 121168404Spjd#define GCC_GP3_CLK_SRC 112 122168404Spjd#define GCC_GPU_CFG_AHB_CLK 113 123168404Spjd#define GCC_GPU_GPLL0_CLK_SRC 114 124168404Spjd#define GCC_GPU_GPLL0_DIV_CLK_SRC 115 125168404Spjd#define GCC_GPU_MEMNOC_GFX_CLK 116 126168404Spjd#define GCC_GPU_SNOC_DVM_GFX_CLK 117 127168404Spjd#define GCC_GPU_THROTTLE_CORE_CLK 118 128168404Spjd#define GCC_GPU_THROTTLE_XO_CLK 119 129168404Spjd#define GCC_MSS_VS_CLK 120 130168404Spjd#define GCC_PDM2_CLK 121 131168404Spjd#define GCC_PDM2_CLK_SRC 122 132168404Spjd#define GCC_PDM_AHB_CLK 123 133168404Spjd#define GCC_PDM_XO4_CLK 124 134168404Spjd#define GCC_PRNG_AHB_CLK 125 135168404Spjd#define GCC_QMIP_CAMERA_NRT_AHB_CLK 126 136168404Spjd#define GCC_QMIP_CAMERA_RT_AHB_CLK 127 137168404Spjd#define GCC_QMIP_DISP_AHB_CLK 128 138168404Spjd#define GCC_QMIP_GPU_CFG_AHB_CLK 129 139168404Spjd#define GCC_QMIP_VIDEO_VCODEC_AHB_CLK 130 140168404Spjd#define GCC_QUPV3_WRAP0_CORE_2X_CLK 131 141168404Spjd#define GCC_QUPV3_WRAP0_CORE_CLK 132 142168404Spjd#define GCC_QUPV3_WRAP0_S0_CLK 133 143168404Spjd#define GCC_QUPV3_WRAP0_S0_CLK_SRC 134 144168404Spjd#define GCC_QUPV3_WRAP0_S1_CLK 135 145168404Spjd#define GCC_QUPV3_WRAP0_S1_CLK_SRC 136 146168404Spjd#define GCC_QUPV3_WRAP0_S2_CLK 137 147168404Spjd#define GCC_QUPV3_WRAP0_S2_CLK_SRC 138 148168404Spjd#define GCC_QUPV3_WRAP0_S3_CLK 139 149168404Spjd#define GCC_QUPV3_WRAP0_S3_CLK_SRC 140 150168404Spjd#define GCC_QUPV3_WRAP0_S4_CLK 141 151168404Spjd#define GCC_QUPV3_WRAP0_S4_CLK_SRC 142 152168404Spjd#define GCC_QUPV3_WRAP0_S5_CLK 143 153168404Spjd#define GCC_QUPV3_WRAP0_S5_CLK_SRC 144 154168404Spjd#define GCC_QUPV3_WRAP1_CORE_2X_CLK 145 155168404Spjd#define GCC_QUPV3_WRAP1_CORE_CLK 146 156168404Spjd#define GCC_QUPV3_WRAP1_S0_CLK 147 157168404Spjd#define GCC_QUPV3_WRAP1_S0_CLK_SRC 148 158168404Spjd#define GCC_QUPV3_WRAP1_S1_CLK 149 159168404Spjd#define GCC_QUPV3_WRAP1_S1_CLK_SRC 150 160168404Spjd#define GCC_QUPV3_WRAP1_S2_CLK 151 161168404Spjd#define GCC_QUPV3_WRAP1_S2_CLK_SRC 152 162168404Spjd#define GCC_QUPV3_WRAP1_S3_CLK 153 163168404Spjd#define GCC_QUPV3_WRAP1_S3_CLK_SRC 154 164168404Spjd#define GCC_QUPV3_WRAP1_S4_CLK 155 165168404Spjd#define GCC_QUPV3_WRAP1_S4_CLK_SRC 156 166168404Spjd#define GCC_QUPV3_WRAP1_S5_CLK 157 167168404Spjd#define GCC_QUPV3_WRAP1_S5_CLK_SRC 158 168219089Spjd#define GCC_QUPV3_WRAP_0_M_AHB_CLK 159 169168404Spjd#define GCC_QUPV3_WRAP_0_S_AHB_CLK 160 170168404Spjd#define GCC_QUPV3_WRAP_1_M_AHB_CLK 161 171168404Spjd#define GCC_QUPV3_WRAP_1_S_AHB_CLK 162 172168404Spjd#define GCC_SDCC1_AHB_CLK 163 173168404Spjd#define GCC_SDCC1_APPS_CLK 164 174168404Spjd#define GCC_SDCC1_APPS_CLK_SRC 165 175168404Spjd#define GCC_SDCC1_ICE_CORE_CLK 166 176168404Spjd#define GCC_SDCC1_ICE_CORE_CLK_SRC 167 177168404Spjd#define GCC_SDCC2_AHB_CLK 168 178168404Spjd#define GCC_SDCC2_APPS_CLK 169 179168404Spjd#define GCC_SDCC2_APPS_CLK_SRC 170 180168404Spjd#define GCC_SYS_NOC_CPUSS_AHB_CLK 171 181168404Spjd#define GCC_SYS_NOC_UFS_PHY_AXI_CLK 172 182265745Sdelphij#define GCC_SYS_NOC_USB3_PRIM_AXI_CLK 173 183168404Spjd#define GCC_UFS_PHY_AHB_CLK 174 184168404Spjd#define GCC_UFS_PHY_AXI_CLK 175 185168404Spjd#define GCC_UFS_PHY_AXI_CLK_SRC 176 186185029Spjd#define GCC_UFS_PHY_ICE_CORE_CLK 177 187168404Spjd#define GCC_UFS_PHY_ICE_CORE_CLK_SRC 178 188168404Spjd#define GCC_UFS_PHY_PHY_AUX_CLK 179 189168404Spjd#define GCC_UFS_PHY_PHY_AUX_CLK_SRC 180 190168404Spjd#define GCC_UFS_PHY_RX_SYMBOL_0_CLK 181 191168404Spjd#define GCC_UFS_PHY_TX_SYMBOL_0_CLK 182 192168404Spjd#define GCC_UFS_PHY_UNIPRO_CORE_CLK 183 193168404Spjd#define GCC_UFS_PHY_UNIPRO_CORE_CLK_SRC 184 194168404Spjd#define GCC_USB30_PRIM_MASTER_CLK 185 195168404Spjd#define GCC_USB30_PRIM_MASTER_CLK_SRC 186 196168404Spjd#define GCC_USB30_PRIM_MOCK_UTMI_CLK 187 197168404Spjd#define GCC_USB30_PRIM_MOCK_UTMI_CLK_SRC 188 198168404Spjd#define GCC_USB30_PRIM_SLEEP_CLK 189 199168404Spjd#define GCC_USB3_PRIM_PHY_AUX_CLK_SRC 190 200168404Spjd#define GCC_USB3_PRIM_PHY_COM_AUX_CLK 191 201168404Spjd#define GCC_USB3_PRIM_PHY_PIPE_CLK 192 202168404Spjd#define GCC_VDDA_VS_CLK 193 203168404Spjd#define GCC_VDDCX_VS_CLK 194 204168404Spjd#define GCC_VDDMX_VS_CLK 195 205168404Spjd#define GCC_VIDEO_AHB_CLK 196 206168404Spjd#define GCC_VIDEO_AXI0_CLK 197 207168404Spjd#define GCC_VIDEO_THROTTLE_CORE_CLK 198 208168404Spjd#define GCC_VIDEO_XO_CLK 199 209168404Spjd#define GCC_VS_CTRL_AHB_CLK 200 210168404Spjd#define GCC_VS_CTRL_CLK 201 211168404Spjd#define GCC_VS_CTRL_CLK_SRC 202 212168404Spjd#define GCC_VSENSOR_CLK_SRC 203 213168404Spjd#define GCC_WCSS_VS_CLK 204 214168404Spjd#define GCC_USB3_PRIM_CLKREF_CLK 205 215168404Spjd#define GCC_SYS_NOC_COMPUTE_SF_AXI_CLK 206 216168404Spjd#define GCC_BIMC_GPU_AXI_CLK 207 217168404Spjd#define GCC_UFS_MEM_CLKREF_CLK 208 218168404Spjd 219168404Spjd/* GDSCs */ 220168404Spjd#define USB30_PRIM_GDSC 0 221168404Spjd#define UFS_PHY_GDSC 1 222168404Spjd#define CAMSS_VFE0_GDSC 2 223168404Spjd#define CAMSS_VFE1_GDSC 3 224168404Spjd#define CAMSS_TOP_GDSC 4 225168404Spjd#define CAM_CPP_GDSC 5 226168404Spjd#define HLOS1_VOTE_TURING_MMU_TBU1_GDSC 6 227168404Spjd#define HLOS1_VOTE_MM_SNOC_MMU_TBU_RT_GDSC 7 228168404Spjd#define HLOS1_VOTE_MM_SNOC_MMU_TBU_NRT_GDSC 8 229168404Spjd#define HLOS1_VOTE_TURING_MMU_TBU0_GDSC 9 230168404Spjd 231168404Spjd#define GCC_QUSB2PHY_PRIM_BCR 0 232168404Spjd#define GCC_QUSB2PHY_SEC_BCR 1 233168404Spjd#define GCC_UFS_PHY_BCR 2 234168404Spjd#define GCC_USB30_PRIM_BCR 3 235168404Spjd#define GCC_USB_PHY_CFG_AHB2PHY_BCR 4 236168404Spjd#define GCC_USB3_PHY_PRIM_SP0_BCR 5 237168404Spjd#define GCC_USB3PHY_PHY_PRIM_SP0_BCR 6 238168404Spjd#define GCC_CAMSS_MICRO_BCR 7 239168404Spjd 240168404Spjd#endif 241168404Spjd