169783Smsmith/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 269783Smsmith/* 369783Smsmith * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. 469783Smsmith */ 569783Smsmith 669783Smsmith#ifndef _DT_BINDINGS_CLK_QCOM_GCC_QCM2290_H 769783Smsmith#define _DT_BINDINGS_CLK_QCOM_GCC_QCM2290_H 869783Smsmith 969783Smsmith/* GCC clocks */ 1069783Smsmith#define GPLL0 0 1169783Smsmith#define GPLL0_OUT_AUX2 1 1269783Smsmith#define GPLL1 2 1369783Smsmith#define GPLL10 3 1469783Smsmith#define GPLL11 4 1569783Smsmith#define GPLL3 5 1669783Smsmith#define GPLL3_OUT_MAIN 6 1769783Smsmith#define GPLL4 7 1869783Smsmith#define GPLL5 8 1969783Smsmith#define GPLL6 9 2069783Smsmith#define GPLL6_OUT_MAIN 10 2169783Smsmith#define GPLL7 11 2269783Smsmith#define GPLL8 12 2369783Smsmith#define GPLL8_OUT_MAIN 13 2469783Smsmith#define GPLL9 14 2569783Smsmith#define GPLL9_OUT_MAIN 15 2669783Smsmith#define GCC_AHB2PHY_CSI_CLK 16 2769783Smsmith#define GCC_AHB2PHY_USB_CLK 17 2869783Smsmith#define GCC_APC_VS_CLK 18 2969783Smsmith#define GCC_BIMC_GPU_AXI_CLK 19 3069783Smsmith#define GCC_BOOT_ROM_AHB_CLK 20 31119418Sobrien#define GCC_CAM_THROTTLE_NRT_CLK 21 32119418Sobrien#define GCC_CAM_THROTTLE_RT_CLK 22 33119418Sobrien#define GCC_CAMERA_AHB_CLK 23 3469783Smsmith#define GCC_CAMERA_XO_CLK 24 3569783Smsmith#define GCC_CAMSS_AXI_CLK 25 3669783Smsmith#define GCC_CAMSS_AXI_CLK_SRC 26 3769783Smsmith#define GCC_CAMSS_CAMNOC_ATB_CLK 27 3869783Smsmith#define GCC_CAMSS_CAMNOC_NTS_XO_CLK 28 3969783Smsmith#define GCC_CAMSS_CCI_0_CLK 29 4069783Smsmith#define GCC_CAMSS_CCI_CLK_SRC 30 41129876Sphk#define GCC_CAMSS_CPHY_0_CLK 31 4269783Smsmith#define GCC_CAMSS_CPHY_1_CLK 32 43107546Simp#define GCC_CAMSS_CSI0PHYTIMER_CLK 33 44107546Simp#define GCC_CAMSS_CSI0PHYTIMER_CLK_SRC 34 45106844Smdodd#define GCC_CAMSS_CSI1PHYTIMER_CLK 35 4669783Smsmith#define GCC_CAMSS_CSI1PHYTIMER_CLK_SRC 36 4769783Smsmith#define GCC_CAMSS_MCLK0_CLK 37 4869783Smsmith#define GCC_CAMSS_MCLK0_CLK_SRC 38 49119285Simp#define GCC_CAMSS_MCLK1_CLK 39 50119285Simp#define GCC_CAMSS_MCLK1_CLK_SRC 40 51119285Simp#define GCC_CAMSS_MCLK2_CLK 41 5269783Smsmith#define GCC_CAMSS_MCLK2_CLK_SRC 42 5369783Smsmith#define GCC_CAMSS_MCLK3_CLK 43 5469783Smsmith#define GCC_CAMSS_MCLK3_CLK_SRC 44 5569783Smsmith#define GCC_CAMSS_NRT_AXI_CLK 45 5669783Smsmith#define GCC_CAMSS_OPE_AHB_CLK 46 5769783Smsmith#define GCC_CAMSS_OPE_AHB_CLK_SRC 47 5869783Smsmith#define GCC_CAMSS_OPE_CLK 48 5969783Smsmith#define GCC_CAMSS_OPE_CLK_SRC 49 6069783Smsmith#define GCC_CAMSS_RT_AXI_CLK 50 61145661Simp#define GCC_CAMSS_TFE_0_CLK 51 6269783Smsmith#define GCC_CAMSS_TFE_0_CLK_SRC 52 6369783Smsmith#define GCC_CAMSS_TFE_0_CPHY_RX_CLK 53 6469783Smsmith#define GCC_CAMSS_TFE_0_CSID_CLK 54 6569783Smsmith#define GCC_CAMSS_TFE_0_CSID_CLK_SRC 55 6669783Smsmith#define GCC_CAMSS_TFE_1_CLK 56 6769783Smsmith#define GCC_CAMSS_TFE_1_CLK_SRC 57 6869783Smsmith#define GCC_CAMSS_TFE_1_CPHY_RX_CLK 58 6969783Smsmith#define GCC_CAMSS_TFE_1_CSID_CLK 59 7069783Smsmith#define GCC_CAMSS_TFE_1_CSID_CLK_SRC 60 7169783Smsmith#define GCC_CAMSS_TFE_CPHY_RX_CLK_SRC 61 7269783Smsmith#define GCC_CAMSS_TOP_AHB_CLK 62 7369783Smsmith#define GCC_CAMSS_TOP_AHB_CLK_SRC 63 7469783Smsmith#define GCC_CFG_NOC_USB3_PRIM_AXI_CLK 64 7569783Smsmith#define GCC_CPUSS_AHB_CLK 65 7669783Smsmith#define GCC_CPUSS_AHB_CLK_SRC 66 7769783Smsmith#define GCC_CPUSS_AHB_POSTDIV_CLK_SRC 67 7869783Smsmith#define GCC_CPUSS_GNOC_CLK 68 7969783Smsmith#define GCC_CPUSS_THROTTLE_CORE_CLK 69 8069783Smsmith#define GCC_CPUSS_THROTTLE_XO_CLK 70 8169783Smsmith#define GCC_DISP_AHB_CLK 71 82164264Sjhb#define GCC_DISP_GPLL0_CLK_SRC 72 83164264Sjhb#define GCC_DISP_GPLL0_DIV_CLK_SRC 73 84164264Sjhb#define GCC_DISP_HF_AXI_CLK 74 85164264Sjhb#define GCC_DISP_THROTTLE_CORE_CLK 75 86169221Sjhb#define GCC_DISP_XO_CLK 76 8769783Smsmith#define GCC_GP1_CLK 77 8869783Smsmith#define GCC_GP1_CLK_SRC 78 8969783Smsmith#define GCC_GP2_CLK 79 9069783Smsmith#define GCC_GP2_CLK_SRC 80 91154079Sjhb#define GCC_GP3_CLK 81 9269783Smsmith#define GCC_GP3_CLK_SRC 82 93154079Sjhb#define GCC_GPU_CFG_AHB_CLK 83 9469783Smsmith#define GCC_GPU_GPLL0_CLK_SRC 84 9569783Smsmith#define GCC_GPU_GPLL0_DIV_CLK_SRC 85 9669783Smsmith#define GCC_GPU_IREF_CLK 86 97163805Simp#define GCC_GPU_MEMNOC_GFX_CLK 87 98163805Simp#define GCC_GPU_SNOC_DVM_GFX_CLK 88 99163805Simp#define GCC_GPU_THROTTLE_CORE_CLK 89 100163805Simp#define GCC_GPU_THROTTLE_XO_CLK 90 101163805Simp#define GCC_PDM2_CLK 91 102163805Simp#define GCC_PDM2_CLK_SRC 92 103163805Simp#define GCC_PDM_AHB_CLK 93 104163805Simp#define GCC_PDM_XO4_CLK 94 105163805Simp#define GCC_PWM0_XO512_CLK 95 106163805Simp#define GCC_QMIP_CAMERA_NRT_AHB_CLK 96 107163805Simp#define GCC_QMIP_CAMERA_RT_AHB_CLK 97 108163805Simp#define GCC_QMIP_CPUSS_CFG_AHB_CLK 98 109163805Simp#define GCC_QMIP_DISP_AHB_CLK 99 110163805Simp#define GCC_QMIP_GPU_CFG_AHB_CLK 100 111163805Simp#define GCC_QMIP_VIDEO_VCODEC_AHB_CLK 101 112163805Simp#define GCC_QUPV3_WRAP0_CORE_2X_CLK 102 113163805Simp#define GCC_QUPV3_WRAP0_CORE_CLK 103 114163805Simp#define GCC_QUPV3_WRAP0_S0_CLK 104 115163805Simp#define GCC_QUPV3_WRAP0_S0_CLK_SRC 105 116163805Simp#define GCC_QUPV3_WRAP0_S1_CLK 106 117163805Simp#define GCC_QUPV3_WRAP0_S1_CLK_SRC 107 118163805Simp#define GCC_QUPV3_WRAP0_S2_CLK 108 119163805Simp#define GCC_QUPV3_WRAP0_S2_CLK_SRC 109 120163805Simp#define GCC_QUPV3_WRAP0_S3_CLK 110 121163805Simp#define GCC_QUPV3_WRAP0_S3_CLK_SRC 111 122163805Simp#define GCC_QUPV3_WRAP0_S4_CLK 112 123163805Simp#define GCC_QUPV3_WRAP0_S4_CLK_SRC 113 12469783Smsmith#define GCC_QUPV3_WRAP0_S5_CLK 114 12569783Smsmith#define GCC_QUPV3_WRAP0_S5_CLK_SRC 115 12669783Smsmith#define GCC_QUPV3_WRAP_0_M_AHB_CLK 116 12769783Smsmith#define GCC_QUPV3_WRAP_0_S_AHB_CLK 117 12869783Smsmith#define GCC_SDCC1_AHB_CLK 118 12969783Smsmith#define GCC_SDCC1_APPS_CLK 119 13069783Smsmith#define GCC_SDCC1_APPS_CLK_SRC 120 13169783Smsmith#define GCC_SDCC1_ICE_CORE_CLK 121 13269783Smsmith#define GCC_SDCC1_ICE_CORE_CLK_SRC 122 13369783Smsmith#define GCC_SDCC2_AHB_CLK 123 13469783Smsmith#define GCC_SDCC2_APPS_CLK 124 13569783Smsmith#define GCC_SDCC2_APPS_CLK_SRC 125 13669783Smsmith#define GCC_SYS_NOC_CPUSS_AHB_CLK 126 137102441Sjhb#define GCC_SYS_NOC_USB3_PRIM_AXI_CLK 127 138102441Sjhb#define GCC_USB30_PRIM_MASTER_CLK 128 13969783Smsmith#define GCC_USB30_PRIM_MASTER_CLK_SRC 129 14069783Smsmith#define GCC_USB30_PRIM_MOCK_UTMI_CLK 130 141119266Simp#define GCC_USB30_PRIM_MOCK_UTMI_CLK_SRC 131 142181789Simp#define GCC_USB30_PRIM_MOCK_UTMI_POSTDIV 132 143181789Simp#define GCC_USB30_PRIM_SLEEP_CLK 133 14469783Smsmith#define GCC_USB3_PRIM_CLKREF_CLK 134 14569783Smsmith#define GCC_USB3_PRIM_PHY_AUX_CLK_SRC 135 14669783Smsmith#define GCC_USB3_PRIM_PHY_COM_AUX_CLK 136 14769783Smsmith#define GCC_USB3_PRIM_PHY_PIPE_CLK 137 14869908Smsmith#define GCC_VCODEC0_AXI_CLK 138 14969908Smsmith#define GCC_VENUS_AHB_CLK 139 15069908Smsmith#define GCC_VENUS_CTL_AXI_CLK 140 15169953Smsmith#define GCC_VIDEO_AHB_CLK 141 152172394Smarius#define GCC_VIDEO_AXI0_CLK 142 153181789Simp#define GCC_VIDEO_THROTTLE_CORE_CLK 143 15469908Smsmith#define GCC_VIDEO_VCODEC0_SYS_CLK 144 15569908Smsmith#define GCC_VIDEO_VENUS_CLK_SRC 145 15669908Smsmith#define GCC_VIDEO_VENUS_CTL_CLK 146 15769908Smsmith#define GCC_VIDEO_XO_CLK 147 15869908Smsmith 15969783Smsmith/* GCC resets */ 16069908Smsmith#define GCC_CAMSS_OPE_BCR 0 161181789Simp#define GCC_CAMSS_TFE_BCR 1 162181789Simp#define GCC_CAMSS_TOP_BCR 2 163181789Simp#define GCC_GPU_BCR 3 164181789Simp#define GCC_MMSS_BCR 4 165181789Simp#define GCC_PDM_BCR 5 166181789Simp#define GCC_QUPV3_WRAPPER_0_BCR 6 167181789Simp#define GCC_SDCC1_BCR 7 168181789Simp#define GCC_SDCC2_BCR 8 169181789Simp#define GCC_USB30_PRIM_BCR 9 170181789Simp#define GCC_USB_PHY_CFG_AHB2PHY_BCR 10 171181789Simp#define GCC_VCODEC0_BCR 11 172181789Simp#define GCC_VENUS_BCR 12 173181789Simp#define GCC_VIDEO_INTERFACE_BCR 13 174181789Simp#define GCC_QUSB2PHY_PRIM_BCR 14 17569908Smsmith#define GCC_USB3_PHY_PRIM_SP0_BCR 15 17669908Smsmith#define GCC_USB3PHY_PHY_PRIM_SP0_BCR 16 17769953Smsmith 17869953Smsmith/* Indexes for GDSCs */ 17969953Smsmith#define GCC_CAMSS_TOP_GDSC 0 18069953Smsmith#define GCC_USB30_PRIM_GDSC 1 18169953Smsmith#define GCC_VCODEC0_GDSC 2 18269953Smsmith#define GCC_VENUS_GDSC 3 18369953Smsmith#define HLOS1_VOTE_TURING_MMU_TBU1_GDSC 4 18469953Smsmith#define HLOS1_VOTE_TURING_MMU_TBU0_GDSC 5 18569908Smsmith#define HLOS1_VOTE_MM_SNOC_MMU_TBU_RT_GDSC 6 18669953Smsmith#define HLOS1_VOTE_MM_SNOC_MMU_TBU_NRT_GDSC 7 18769953Smsmith 18869953Smsmith#endif 18969953Smsmith