190792Sgshapiro/* SPDX-License-Identifier: GPL-2.0-only */ 2261363Sgshapiro/* 390792Sgshapiro * Copyright 2013 Freescale Semiconductor, Inc. 490792Sgshapiro */ 590792Sgshapiro 690792Sgshapiro#ifndef __DT_BINDINGS_CLOCK_IMX6SL_H 790792Sgshapiro#define __DT_BINDINGS_CLOCK_IMX6SL_H 890792Sgshapiro 990792Sgshapiro#define IMX6SL_CLK_DUMMY 0 1090792Sgshapiro#define IMX6SL_CLK_CKIL 1 1190792Sgshapiro#define IMX6SL_CLK_OSC 2 1290792Sgshapiro#define IMX6SL_CLK_PLL1_SYS 3 13120256Sgshapiro#define IMX6SL_CLK_PLL2_BUS 4 14120256Sgshapiro#define IMX6SL_CLK_PLL3_USB_OTG 5 15120256Sgshapiro#define IMX6SL_CLK_PLL4_AUDIO 6 1690792Sgshapiro#define IMX6SL_CLK_PLL5_VIDEO 7 17120256Sgshapiro#define IMX6SL_CLK_PLL6_ENET 8 18120256Sgshapiro#define IMX6SL_CLK_PLL7_USB_HOST 9 19120256Sgshapiro#define IMX6SL_CLK_USBPHY1 10 20120256Sgshapiro#define IMX6SL_CLK_USBPHY2 11 21120256Sgshapiro#define IMX6SL_CLK_USBPHY1_GATE 12 22120256Sgshapiro#define IMX6SL_CLK_USBPHY2_GATE 13 23120256Sgshapiro#define IMX6SL_CLK_PLL4_POST_DIV 14 2490792Sgshapiro#define IMX6SL_CLK_PLL5_POST_DIV 15 2590792Sgshapiro#define IMX6SL_CLK_PLL5_VIDEO_DIV 16 2690792Sgshapiro#define IMX6SL_CLK_ENET_REF 17 27266692Sgshapiro#define IMX6SL_CLK_PLL2_PFD0 18 2890792Sgshapiro#define IMX6SL_CLK_PLL2_PFD1 19 2990792Sgshapiro#define IMX6SL_CLK_PLL2_PFD2 20 3090792Sgshapiro#define IMX6SL_CLK_PLL3_PFD0 21 3190792Sgshapiro#define IMX6SL_CLK_PLL3_PFD1 22 3290792Sgshapiro#define IMX6SL_CLK_PLL3_PFD2 23 3390792Sgshapiro#define IMX6SL_CLK_PLL3_PFD3 24 3490792Sgshapiro#define IMX6SL_CLK_PLL2_198M 25 3590792Sgshapiro#define IMX6SL_CLK_PLL3_120M 26 3690792Sgshapiro#define IMX6SL_CLK_PLL3_80M 27 3790792Sgshapiro#define IMX6SL_CLK_PLL3_60M 28 3890792Sgshapiro#define IMX6SL_CLK_STEP 29 3990792Sgshapiro#define IMX6SL_CLK_PLL1_SW 30 4090792Sgshapiro#define IMX6SL_CLK_OCRAM_ALT_SEL 31 4190792Sgshapiro#define IMX6SL_CLK_OCRAM_SEL 32 4290792Sgshapiro#define IMX6SL_CLK_PRE_PERIPH2_SEL 33 4390792Sgshapiro#define IMX6SL_CLK_PRE_PERIPH_SEL 34 4490792Sgshapiro#define IMX6SL_CLK_PERIPH2_CLK2_SEL 35 4590792Sgshapiro#define IMX6SL_CLK_PERIPH_CLK2_SEL 36 4690792Sgshapiro#define IMX6SL_CLK_CSI_SEL 37 4790792Sgshapiro#define IMX6SL_CLK_LCDIF_AXI_SEL 38 4890792Sgshapiro#define IMX6SL_CLK_USDHC1_SEL 39 4990792Sgshapiro#define IMX6SL_CLK_USDHC2_SEL 40 5090792Sgshapiro#define IMX6SL_CLK_USDHC3_SEL 41 5190792Sgshapiro#define IMX6SL_CLK_USDHC4_SEL 42 5290792Sgshapiro#define IMX6SL_CLK_SSI1_SEL 43 5390792Sgshapiro#define IMX6SL_CLK_SSI2_SEL 44 5490792Sgshapiro#define IMX6SL_CLK_SSI3_SEL 45 5590792Sgshapiro#define IMX6SL_CLK_PERCLK_SEL 46 5690792Sgshapiro#define IMX6SL_CLK_PXP_AXI_SEL 47 5790792Sgshapiro#define IMX6SL_CLK_EPDC_AXI_SEL 48 5890792Sgshapiro#define IMX6SL_CLK_GPU2D_OVG_SEL 49 5990792Sgshapiro#define IMX6SL_CLK_GPU2D_SEL 50 6090792Sgshapiro#define IMX6SL_CLK_LCDIF_PIX_SEL 51 6190792Sgshapiro#define IMX6SL_CLK_EPDC_PIX_SEL 52 6290792Sgshapiro#define IMX6SL_CLK_SPDIF0_SEL 53 6390792Sgshapiro#define IMX6SL_CLK_SPDIF1_SEL 54 6490792Sgshapiro#define IMX6SL_CLK_EXTERN_AUDIO_SEL 55 6590792Sgshapiro#define IMX6SL_CLK_ECSPI_SEL 56 6690792Sgshapiro#define IMX6SL_CLK_UART_SEL 57 6790792Sgshapiro#define IMX6SL_CLK_PERIPH 58 6890792Sgshapiro#define IMX6SL_CLK_PERIPH2 59 6990792Sgshapiro#define IMX6SL_CLK_OCRAM_PODF 60 7090792Sgshapiro#define IMX6SL_CLK_PERIPH_CLK2_PODF 61 7190792Sgshapiro#define IMX6SL_CLK_PERIPH2_CLK2_PODF 62 7290792Sgshapiro#define IMX6SL_CLK_IPG 63 7390792Sgshapiro#define IMX6SL_CLK_CSI_PODF 64 7490792Sgshapiro#define IMX6SL_CLK_LCDIF_AXI_PODF 65 7590792Sgshapiro#define IMX6SL_CLK_USDHC1_PODF 66 7690792Sgshapiro#define IMX6SL_CLK_USDHC2_PODF 67 7790792Sgshapiro#define IMX6SL_CLK_USDHC3_PODF 68 7890792Sgshapiro#define IMX6SL_CLK_USDHC4_PODF 69 7990792Sgshapiro#define IMX6SL_CLK_SSI1_PRED 70 8090792Sgshapiro#define IMX6SL_CLK_SSI1_PODF 71 8190792Sgshapiro#define IMX6SL_CLK_SSI2_PRED 72 8290792Sgshapiro#define IMX6SL_CLK_SSI2_PODF 73 8390792Sgshapiro#define IMX6SL_CLK_SSI3_PRED 74 8490792Sgshapiro#define IMX6SL_CLK_SSI3_PODF 75 8590792Sgshapiro#define IMX6SL_CLK_PERCLK 76 8690792Sgshapiro#define IMX6SL_CLK_PXP_AXI_PODF 77 8790792Sgshapiro#define IMX6SL_CLK_EPDC_AXI_PODF 78 8890792Sgshapiro#define IMX6SL_CLK_GPU2D_OVG_PODF 79 8990792Sgshapiro#define IMX6SL_CLK_GPU2D_PODF 80 9090792Sgshapiro#define IMX6SL_CLK_LCDIF_PIX_PRED 81 9190792Sgshapiro#define IMX6SL_CLK_EPDC_PIX_PRED 82 9290792Sgshapiro#define IMX6SL_CLK_LCDIF_PIX_PODF 83 9390792Sgshapiro#define IMX6SL_CLK_EPDC_PIX_PODF 84 9490792Sgshapiro#define IMX6SL_CLK_SPDIF0_PRED 85 9590792Sgshapiro#define IMX6SL_CLK_SPDIF0_PODF 86 9690792Sgshapiro#define IMX6SL_CLK_SPDIF1_PRED 87 9790792Sgshapiro#define IMX6SL_CLK_SPDIF1_PODF 88 9890792Sgshapiro#define IMX6SL_CLK_EXTERN_AUDIO_PRED 89 9990792Sgshapiro#define IMX6SL_CLK_EXTERN_AUDIO_PODF 90 10090792Sgshapiro#define IMX6SL_CLK_ECSPI_ROOT 91 10190792Sgshapiro#define IMX6SL_CLK_UART_ROOT 92 10290792Sgshapiro#define IMX6SL_CLK_AHB 93 10390792Sgshapiro#define IMX6SL_CLK_MMDC_ROOT 94 10490792Sgshapiro#define IMX6SL_CLK_ARM 95 105#define IMX6SL_CLK_ECSPI1 96 106#define IMX6SL_CLK_ECSPI2 97 107#define IMX6SL_CLK_ECSPI3 98 108#define IMX6SL_CLK_ECSPI4 99 109#define IMX6SL_CLK_EPIT1 100 110#define IMX6SL_CLK_EPIT2 101 111#define IMX6SL_CLK_EXTERN_AUDIO 102 112#define IMX6SL_CLK_GPT 103 113#define IMX6SL_CLK_GPT_SERIAL 104 114#define IMX6SL_CLK_GPU2D_OVG 105 115#define IMX6SL_CLK_I2C1 106 116#define IMX6SL_CLK_I2C2 107 117#define IMX6SL_CLK_I2C3 108 118#define IMX6SL_CLK_OCOTP 109 119#define IMX6SL_CLK_CSI 110 120#define IMX6SL_CLK_PXP_AXI 111 121#define IMX6SL_CLK_EPDC_AXI 112 122#define IMX6SL_CLK_LCDIF_AXI 113 123#define IMX6SL_CLK_LCDIF_PIX 114 124#define IMX6SL_CLK_EPDC_PIX 115 125#define IMX6SL_CLK_OCRAM 116 126#define IMX6SL_CLK_PWM1 117 127#define IMX6SL_CLK_PWM2 118 128#define IMX6SL_CLK_PWM3 119 129#define IMX6SL_CLK_PWM4 120 130#define IMX6SL_CLK_SDMA 121 131#define IMX6SL_CLK_SPDIF 122 132#define IMX6SL_CLK_SSI1 123 133#define IMX6SL_CLK_SSI2 124 134#define IMX6SL_CLK_SSI3 125 135#define IMX6SL_CLK_UART 126 136#define IMX6SL_CLK_UART_SERIAL 127 137#define IMX6SL_CLK_USBOH3 128 138#define IMX6SL_CLK_USDHC1 129 139#define IMX6SL_CLK_USDHC2 130 140#define IMX6SL_CLK_USDHC3 131 141#define IMX6SL_CLK_USDHC4 132 142#define IMX6SL_CLK_PLL4_AUDIO_DIV 133 143#define IMX6SL_CLK_SPBA 134 144#define IMX6SL_CLK_ENET 135 145#define IMX6SL_CLK_LVDS1_SEL 136 146#define IMX6SL_CLK_LVDS1_OUT 137 147#define IMX6SL_CLK_LVDS1_IN 138 148#define IMX6SL_CLK_ANACLK1 139 149#define IMX6SL_PLL1_BYPASS_SRC 140 150#define IMX6SL_PLL2_BYPASS_SRC 141 151#define IMX6SL_PLL3_BYPASS_SRC 142 152#define IMX6SL_PLL4_BYPASS_SRC 143 153#define IMX6SL_PLL5_BYPASS_SRC 144 154#define IMX6SL_PLL6_BYPASS_SRC 145 155#define IMX6SL_PLL7_BYPASS_SRC 146 156#define IMX6SL_CLK_PLL1 147 157#define IMX6SL_CLK_PLL2 148 158#define IMX6SL_CLK_PLL3 149 159#define IMX6SL_CLK_PLL4 150 160#define IMX6SL_CLK_PLL5 151 161#define IMX6SL_CLK_PLL6 152 162#define IMX6SL_CLK_PLL7 153 163#define IMX6SL_PLL1_BYPASS 154 164#define IMX6SL_PLL2_BYPASS 155 165#define IMX6SL_PLL3_BYPASS 156 166#define IMX6SL_PLL4_BYPASS 157 167#define IMX6SL_PLL5_BYPASS 158 168#define IMX6SL_PLL6_BYPASS 159 169#define IMX6SL_PLL7_BYPASS 160 170#define IMX6SL_CLK_SSI1_IPG 161 171#define IMX6SL_CLK_SSI2_IPG 162 172#define IMX6SL_CLK_SSI3_IPG 163 173#define IMX6SL_CLK_SPDIF_GCLK 164 174#define IMX6SL_CLK_MMDC_P0_IPG 165 175#define IMX6SL_CLK_MMDC_P1_IPG 166 176#define IMX6SL_CLK_END 167 177 178#endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */ 179