1168404Spjd/* SPDX-License-Identifier: GPL-2.0-only */ 2168404Spjd/* 3168404Spjd * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru> 4168404Spjd */ 5168404Spjd 6168404Spjd#ifndef __DT_BINDINGS_CLOCK_IMX27_H 7168404Spjd#define __DT_BINDINGS_CLOCK_IMX27_H 8168404Spjd 9168404Spjd#define IMX27_CLK_DUMMY 0 10168404Spjd#define IMX27_CLK_CKIH 1 11168404Spjd#define IMX27_CLK_CKIL 2 12168404Spjd#define IMX27_CLK_MPLL 3 13168404Spjd#define IMX27_CLK_SPLL 4 14168404Spjd#define IMX27_CLK_MPLL_MAIN2 5 15168404Spjd#define IMX27_CLK_AHB 6 16168404Spjd#define IMX27_CLK_IPG 7 17168404Spjd#define IMX27_CLK_NFC_DIV 8 18168404Spjd#define IMX27_CLK_PER1_DIV 9 19168404Spjd#define IMX27_CLK_PER2_DIV 10 20168404Spjd#define IMX27_CLK_PER3_DIV 11 21168404Spjd#define IMX27_CLK_PER4_DIV 12 22219089Spjd#define IMX27_CLK_VPU_SEL 13 23239620Smm#define IMX27_CLK_VPU_DIV 14 24168404Spjd#define IMX27_CLK_USB_DIV 15 25168404Spjd#define IMX27_CLK_CPU_SEL 16 26219089Spjd#define IMX27_CLK_CLKO_SEL 17 27219089Spjd#define IMX27_CLK_CPU_DIV 18 28168404Spjd#define IMX27_CLK_CLKO_DIV 19 29168404Spjd#define IMX27_CLK_SSI1_SEL 20 30168404Spjd#define IMX27_CLK_SSI2_SEL 21 31168404Spjd#define IMX27_CLK_SSI1_DIV 22 32168404Spjd#define IMX27_CLK_SSI2_DIV 23 33168404Spjd#define IMX27_CLK_CLKO_EN 24 34168404Spjd#define IMX27_CLK_SSI2_IPG_GATE 25 35168404Spjd#define IMX27_CLK_SSI1_IPG_GATE 26 36168404Spjd#define IMX27_CLK_SLCDC_IPG_GATE 27 37168404Spjd#define IMX27_CLK_SDHC3_IPG_GATE 28 38219089Spjd#define IMX27_CLK_SDHC2_IPG_GATE 29 39168404Spjd#define IMX27_CLK_SDHC1_IPG_GATE 30 40219089Spjd#define IMX27_CLK_SCC_IPG_GATE 31 41168404Spjd#define IMX27_CLK_SAHARA_IPG_GATE 32 42168404Spjd#define IMX27_CLK_RTC_IPG_GATE 33 43168404Spjd#define IMX27_CLK_PWM_IPG_GATE 34 44168404Spjd#define IMX27_CLK_OWIRE_IPG_GATE 35 45168404Spjd#define IMX27_CLK_LCDC_IPG_GATE 36 46168404Spjd#define IMX27_CLK_KPP_IPG_GATE 37 47168404Spjd#define IMX27_CLK_IIM_IPG_GATE 38 48168404Spjd#define IMX27_CLK_I2C2_IPG_GATE 39 49168404Spjd#define IMX27_CLK_I2C1_IPG_GATE 40 50168404Spjd#define IMX27_CLK_GPT6_IPG_GATE 41 51168404Spjd#define IMX27_CLK_GPT5_IPG_GATE 42 52168404Spjd#define IMX27_CLK_GPT4_IPG_GATE 43 53168404Spjd#define IMX27_CLK_GPT3_IPG_GATE 44 54168404Spjd#define IMX27_CLK_GPT2_IPG_GATE 45 55168404Spjd#define IMX27_CLK_GPT1_IPG_GATE 46 56168404Spjd#define IMX27_CLK_GPIO_IPG_GATE 47 57168404Spjd#define IMX27_CLK_FEC_IPG_GATE 48 58168404Spjd#define IMX27_CLK_EMMA_IPG_GATE 49 59168404Spjd#define IMX27_CLK_DMA_IPG_GATE 50 60168404Spjd#define IMX27_CLK_CSPI3_IPG_GATE 51 61168404Spjd#define IMX27_CLK_CSPI2_IPG_GATE 52 62168404Spjd#define IMX27_CLK_CSPI1_IPG_GATE 53 63168404Spjd#define IMX27_CLK_NFC_BAUD_GATE 54 64168404Spjd#define IMX27_CLK_SSI2_BAUD_GATE 55 65168404Spjd#define IMX27_CLK_SSI1_BAUD_GATE 56 66168404Spjd#define IMX27_CLK_VPU_BAUD_GATE 57 67168404Spjd#define IMX27_CLK_PER4_GATE 58 68168404Spjd#define IMX27_CLK_PER3_GATE 59 69168404Spjd#define IMX27_CLK_PER2_GATE 60 70168404Spjd#define IMX27_CLK_PER1_GATE 61 71219089Spjd#define IMX27_CLK_USB_AHB_GATE 62 72168404Spjd#define IMX27_CLK_SLCDC_AHB_GATE 63 73219089Spjd#define IMX27_CLK_SAHARA_AHB_GATE 64 74219089Spjd#define IMX27_CLK_LCDC_AHB_GATE 65 75219089Spjd#define IMX27_CLK_VPU_AHB_GATE 66 76168404Spjd#define IMX27_CLK_FEC_AHB_GATE 67 77168404Spjd#define IMX27_CLK_EMMA_AHB_GATE 68 78168404Spjd#define IMX27_CLK_EMI_AHB_GATE 69 79168404Spjd#define IMX27_CLK_DMA_AHB_GATE 70 80168404Spjd#define IMX27_CLK_CSI_AHB_GATE 71 81168404Spjd#define IMX27_CLK_BROM_AHB_GATE 72 82168404Spjd#define IMX27_CLK_ATA_AHB_GATE 73 83168404Spjd#define IMX27_CLK_WDOG_IPG_GATE 74 84168404Spjd#define IMX27_CLK_USB_IPG_GATE 75 85168404Spjd#define IMX27_CLK_UART6_IPG_GATE 76 86240868Spjd#define IMX27_CLK_UART5_IPG_GATE 77 87240868Spjd#define IMX27_CLK_UART4_IPG_GATE 78 88240868Spjd#define IMX27_CLK_UART3_IPG_GATE 79 89240868Spjd#define IMX27_CLK_UART2_IPG_GATE 80 90168404Spjd#define IMX27_CLK_UART1_IPG_GATE 81 91168404Spjd#define IMX27_CLK_CKIH_DIV1P5 82 92168404Spjd#define IMX27_CLK_FPM 83 93219089Spjd#define IMX27_CLK_MPLL_OSC_SEL 84 94219089Spjd#define IMX27_CLK_MPLL_SEL 85 95219089Spjd#define IMX27_CLK_SPLL_GATE 86 96219089Spjd#define IMX27_CLK_MSHC_DIV 87 97219089Spjd#define IMX27_CLK_RTIC_IPG_GATE 88 98219089Spjd#define IMX27_CLK_MSHC_IPG_GATE 89 99219089Spjd#define IMX27_CLK_RTIC_AHB_GATE 90 100219089Spjd#define IMX27_CLK_MSHC_BAUD_GATE 91 101219089Spjd#define IMX27_CLK_CKIH_GATE 92 102219089Spjd#define IMX27_CLK_MAX 93 103219089Spjd 104219089Spjd#endif 105219089Spjd