1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Watchdog driver for the K3 RTI module
4 *
5 * (c) Copyright 2019-2020 Texas Instruments Inc.
6 * All rights reserved.
7 */
8
9#include <linux/clk.h>
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/io.h>
13#include <linux/kernel.h>
14#include <linux/mod_devicetable.h>
15#include <linux/module.h>
16#include <linux/moduleparam.h>
17#include <linux/of.h>
18#include <linux/of_address.h>
19#include <linux/platform_device.h>
20#include <linux/pm_runtime.h>
21#include <linux/types.h>
22#include <linux/watchdog.h>
23
24#define DEFAULT_HEARTBEAT 60
25
26/* Max heartbeat is calculated at 32kHz source clock */
27#define MAX_HEARTBEAT	1000
28
29/* Timer register set definition */
30#define RTIDWDCTRL	0x90
31#define RTIDWDPRLD	0x94
32#define RTIWDSTATUS	0x98
33#define RTIWDKEY	0x9c
34#define RTIDWDCNTR	0xa0
35#define RTIWWDRXCTRL	0xa4
36#define RTIWWDSIZECTRL	0xa8
37
38#define RTIWWDRX_NMI	0xa
39
40#define RTIWWDSIZE_50P		0x50
41#define RTIWWDSIZE_25P		0x500
42#define RTIWWDSIZE_12P5		0x5000
43#define RTIWWDSIZE_6P25		0x50000
44#define RTIWWDSIZE_3P125	0x500000
45
46#define WDENABLE_KEY	0xa98559da
47
48#define WDKEY_SEQ0		0xe51a
49#define WDKEY_SEQ1		0xa35c
50
51#define WDT_PRELOAD_SHIFT	13
52
53#define WDT_PRELOAD_MAX		0xfff
54
55#define DWDST			BIT(1)
56
57#define PON_REASON_SOF_NUM	0xBBBBCCCC
58#define PON_REASON_MAGIC_NUM	0xDDDDDDDD
59#define PON_REASON_EOF_NUM	0xCCCCBBBB
60#define RESERVED_MEM_MIN_SIZE	12
61
62static int heartbeat = DEFAULT_HEARTBEAT;
63
64/*
65 * struct to hold data for each WDT device
66 * @base - base io address of WD device
67 * @freq - source clock frequency of WDT
68 * @wdd  - hold watchdog device as is in WDT core
69 */
70struct rti_wdt_device {
71	void __iomem		*base;
72	unsigned long		freq;
73	struct watchdog_device	wdd;
74};
75
76static int rti_wdt_start(struct watchdog_device *wdd)
77{
78	u32 timer_margin;
79	struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
80	int ret;
81
82	ret = pm_runtime_resume_and_get(wdd->parent);
83	if (ret)
84		return ret;
85
86	/* set timeout period */
87	timer_margin = (u64)wdd->timeout * wdt->freq;
88	timer_margin >>= WDT_PRELOAD_SHIFT;
89	if (timer_margin > WDT_PRELOAD_MAX)
90		timer_margin = WDT_PRELOAD_MAX;
91	writel_relaxed(timer_margin, wdt->base + RTIDWDPRLD);
92
93	/*
94	 * RTI only supports a windowed mode, where the watchdog can only
95	 * be petted during the open window; not too early or not too late.
96	 * The HW configuration options only allow for the open window size
97	 * to be 50% or less than that; we obviouly want to configure the open
98	 * window as large as possible so we select the 50% option.
99	 */
100	wdd->min_hw_heartbeat_ms = 500 * wdd->timeout;
101
102	/* Generate NMI when wdt expires */
103	writel_relaxed(RTIWWDRX_NMI, wdt->base + RTIWWDRXCTRL);
104
105	/* Open window size 50%; this is the largest window size available */
106	writel_relaxed(RTIWWDSIZE_50P, wdt->base + RTIWWDSIZECTRL);
107
108	readl_relaxed(wdt->base + RTIWWDSIZECTRL);
109
110	/* enable watchdog */
111	writel_relaxed(WDENABLE_KEY, wdt->base + RTIDWDCTRL);
112	return 0;
113}
114
115static int rti_wdt_ping(struct watchdog_device *wdd)
116{
117	struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
118
119	/* put watchdog in service state */
120	writel_relaxed(WDKEY_SEQ0, wdt->base + RTIWDKEY);
121	/* put watchdog in active state */
122	writel_relaxed(WDKEY_SEQ1, wdt->base + RTIWDKEY);
123
124	return 0;
125}
126
127static int rti_wdt_setup_hw_hb(struct watchdog_device *wdd, u32 wsize)
128{
129	/*
130	 * RTI only supports a windowed mode, where the watchdog can only
131	 * be petted during the open window; not too early or not too late.
132	 * The HW configuration options only allow for the open window size
133	 * to be 50% or less than that.
134	 */
135	switch (wsize) {
136	case RTIWWDSIZE_50P:
137		/* 50% open window => 50% min heartbeat */
138		wdd->min_hw_heartbeat_ms = 500 * heartbeat;
139		break;
140
141	case RTIWWDSIZE_25P:
142		/* 25% open window => 75% min heartbeat */
143		wdd->min_hw_heartbeat_ms = 750 * heartbeat;
144		break;
145
146	case RTIWWDSIZE_12P5:
147		/* 12.5% open window => 87.5% min heartbeat */
148		wdd->min_hw_heartbeat_ms = 875 * heartbeat;
149		break;
150
151	case RTIWWDSIZE_6P25:
152		/* 6.5% open window => 93.5% min heartbeat */
153		wdd->min_hw_heartbeat_ms = 935 * heartbeat;
154		break;
155
156	case RTIWWDSIZE_3P125:
157		/* 3.125% open window => 96.9% min heartbeat */
158		wdd->min_hw_heartbeat_ms = 969 * heartbeat;
159		break;
160
161	default:
162		return -EINVAL;
163	}
164
165	return 0;
166}
167
168static unsigned int rti_wdt_get_timeleft_ms(struct watchdog_device *wdd)
169{
170	u64 timer_counter;
171	u32 val;
172	struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
173
174	/* if timeout has occurred then return 0 */
175	val = readl_relaxed(wdt->base + RTIWDSTATUS);
176	if (val & DWDST)
177		return 0;
178
179	timer_counter = readl_relaxed(wdt->base + RTIDWDCNTR);
180
181	timer_counter *= 1000;
182
183	do_div(timer_counter, wdt->freq);
184
185	return timer_counter;
186}
187
188static unsigned int rti_wdt_get_timeleft(struct watchdog_device *wdd)
189{
190	return rti_wdt_get_timeleft_ms(wdd) / 1000;
191}
192
193static const struct watchdog_info rti_wdt_info = {
194	.options = WDIOF_KEEPALIVEPING,
195	.identity = "K3 RTI Watchdog",
196};
197
198static const struct watchdog_ops rti_wdt_ops = {
199	.owner		= THIS_MODULE,
200	.start		= rti_wdt_start,
201	.ping		= rti_wdt_ping,
202	.get_timeleft	= rti_wdt_get_timeleft,
203};
204
205static int rti_wdt_probe(struct platform_device *pdev)
206{
207	int ret = 0;
208	struct device *dev = &pdev->dev;
209	struct watchdog_device *wdd;
210	struct rti_wdt_device *wdt;
211	struct clk *clk;
212	u32 last_ping = 0;
213	struct device_node *node;
214	u32 reserved_mem_size;
215	struct resource res;
216	u32 *vaddr;
217	u64 paddr;
218
219	wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
220	if (!wdt)
221		return -ENOMEM;
222
223	clk = clk_get(dev, NULL);
224	if (IS_ERR(clk))
225		return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n");
226
227	wdt->freq = clk_get_rate(clk);
228
229	clk_put(clk);
230
231	if (!wdt->freq) {
232		dev_err(dev, "Failed to get fck rate.\n");
233		return -EINVAL;
234	}
235
236	/*
237	 * If watchdog is running at 32k clock, it is not accurate.
238	 * Adjust frequency down in this case so that we don't pet
239	 * the watchdog too often.
240	 */
241	if (wdt->freq < 32768)
242		wdt->freq = wdt->freq * 9 / 10;
243
244	pm_runtime_enable(dev);
245	ret = pm_runtime_resume_and_get(dev);
246	if (ret < 0) {
247		pm_runtime_disable(&pdev->dev);
248		return dev_err_probe(dev, ret, "runtime pm failed\n");
249	}
250
251	platform_set_drvdata(pdev, wdt);
252
253	wdd = &wdt->wdd;
254	wdd->info = &rti_wdt_info;
255	wdd->ops = &rti_wdt_ops;
256	wdd->min_timeout = 1;
257	wdd->max_hw_heartbeat_ms = (WDT_PRELOAD_MAX << WDT_PRELOAD_SHIFT) /
258		wdt->freq * 1000;
259	wdd->parent = dev;
260
261	watchdog_set_drvdata(wdd, wdt);
262	watchdog_set_nowayout(wdd, 1);
263	watchdog_set_restart_priority(wdd, 128);
264
265	wdt->base = devm_platform_ioremap_resource(pdev, 0);
266	if (IS_ERR(wdt->base)) {
267		ret = PTR_ERR(wdt->base);
268		goto err_iomap;
269	}
270
271	if (readl(wdt->base + RTIDWDCTRL) == WDENABLE_KEY) {
272		int preset_heartbeat;
273		u32 time_left_ms;
274		u64 heartbeat_ms;
275		u32 wsize;
276
277		set_bit(WDOG_HW_RUNNING, &wdd->status);
278		time_left_ms = rti_wdt_get_timeleft_ms(wdd);
279		heartbeat_ms = readl(wdt->base + RTIDWDPRLD);
280		heartbeat_ms <<= WDT_PRELOAD_SHIFT;
281		heartbeat_ms *= 1000;
282		do_div(heartbeat_ms, wdt->freq);
283		preset_heartbeat = heartbeat_ms + 500;
284		preset_heartbeat /= 1000;
285		if (preset_heartbeat != heartbeat)
286			dev_warn(dev, "watchdog already running, ignoring heartbeat config!\n");
287
288		heartbeat = preset_heartbeat;
289
290		wsize = readl(wdt->base + RTIWWDSIZECTRL);
291		ret = rti_wdt_setup_hw_hb(wdd, wsize);
292		if (ret) {
293			dev_err(dev, "bad window size.\n");
294			goto err_iomap;
295		}
296
297		last_ping = heartbeat_ms - time_left_ms;
298		if (time_left_ms > heartbeat_ms) {
299			dev_warn(dev, "time_left > heartbeat? Assuming last ping just before now.\n");
300			last_ping = 0;
301		}
302	}
303
304	node = of_parse_phandle(pdev->dev.of_node, "memory-region", 0);
305	if (node) {
306		ret = of_address_to_resource(node, 0, &res);
307		if (ret) {
308			dev_err(dev, "No memory address assigned to the region.\n");
309			goto err_iomap;
310		}
311
312		/*
313		 * If reserved memory is defined for watchdog reset cause.
314		 * Readout the Power-on(PON) reason and pass to bootstatus.
315		 */
316		paddr = res.start;
317		reserved_mem_size = resource_size(&res);
318		if (reserved_mem_size < RESERVED_MEM_MIN_SIZE) {
319			dev_err(dev, "The size of reserved memory is too small.\n");
320			ret = -EINVAL;
321			goto err_iomap;
322		}
323
324		vaddr = memremap(paddr, reserved_mem_size, MEMREMAP_WB);
325		if (!vaddr) {
326			dev_err(dev, "Failed to map memory-region.\n");
327			ret = -ENOMEM;
328			goto err_iomap;
329		}
330
331		if (vaddr[0] == PON_REASON_SOF_NUM &&
332		    vaddr[1] == PON_REASON_MAGIC_NUM &&
333		    vaddr[2] == PON_REASON_EOF_NUM) {
334			wdd->bootstatus |= WDIOF_CARDRESET;
335		}
336		memset(vaddr, 0, reserved_mem_size);
337		memunmap(vaddr);
338	}
339
340	watchdog_init_timeout(wdd, heartbeat, dev);
341
342	ret = watchdog_register_device(wdd);
343	if (ret) {
344		dev_err(dev, "cannot register watchdog device\n");
345		goto err_iomap;
346	}
347
348	if (last_ping)
349		watchdog_set_last_hw_keepalive(wdd, last_ping);
350
351	if (!watchdog_hw_running(wdd))
352		pm_runtime_put_sync(&pdev->dev);
353
354	return 0;
355
356err_iomap:
357	pm_runtime_put_sync(&pdev->dev);
358	pm_runtime_disable(&pdev->dev);
359
360	return ret;
361}
362
363static void rti_wdt_remove(struct platform_device *pdev)
364{
365	struct rti_wdt_device *wdt = platform_get_drvdata(pdev);
366
367	watchdog_unregister_device(&wdt->wdd);
368
369	if (!pm_runtime_suspended(&pdev->dev))
370		pm_runtime_put(&pdev->dev);
371
372	pm_runtime_disable(&pdev->dev);
373}
374
375static const struct of_device_id rti_wdt_of_match[] = {
376	{ .compatible = "ti,j7-rti-wdt", },
377	{},
378};
379MODULE_DEVICE_TABLE(of, rti_wdt_of_match);
380
381static struct platform_driver rti_wdt_driver = {
382	.driver = {
383		.name = "rti-wdt",
384		.of_match_table = rti_wdt_of_match,
385	},
386	.probe = rti_wdt_probe,
387	.remove_new = rti_wdt_remove,
388};
389
390module_platform_driver(rti_wdt_driver);
391
392MODULE_AUTHOR("Tero Kristo <t-kristo@ti.com>");
393MODULE_DESCRIPTION("K3 RTI Watchdog Driver");
394
395module_param(heartbeat, int, 0);
396MODULE_PARM_DESC(heartbeat,
397		 "Watchdog heartbeat period in seconds from 1 to "
398		 __MODULE_STRING(MAX_HEARTBEAT) ", default "
399		 __MODULE_STRING(DEFAULT_HEARTBEAT));
400
401MODULE_LICENSE("GPL");
402MODULE_ALIAS("platform:rti-wdt");
403