1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2018, Richtek Technology Corporation
4 *
5 * Richtek RT1711H Type-C Chip Driver
6 */
7
8#include <linux/bits.h>
9#include <linux/kernel.h>
10#include <linux/mod_devicetable.h>
11#include <linux/module.h>
12#include <linux/i2c.h>
13#include <linux/interrupt.h>
14#include <linux/gpio/consumer.h>
15#include <linux/usb/tcpci.h>
16#include <linux/usb/tcpm.h>
17#include <linux/regmap.h>
18#include <linux/regulator/consumer.h>
19
20#define RT1711H_VID		0x29CF
21#define RT1711H_PID		0x1711
22#define RT1711H_DID		0x2171
23#define RT1715_DID		0x2173
24
25#define RT1711H_PHYCTRL1	0x80
26#define RT1711H_PHYCTRL2	0x81
27
28#define RT1711H_RTCTRL4		0x93
29/* rx threshold of rd/rp: 1b0 for level 0.4V/0.7V, 1b1 for 0.35V/0.75V */
30#define RT1711H_BMCIO_RXDZSEL	BIT(0)
31
32#define RT1711H_RTCTRL8		0x9B
33/* Autoidle timeout = (tout * 2 + 1) * 6.4ms */
34#define RT1711H_RTCTRL8_SET(ck300, ship_off, auto_idle, tout) \
35			    (((ck300) << 7) | ((ship_off) << 5) | \
36			    ((auto_idle) << 3) | ((tout) & 0x07))
37#define RT1711H_AUTOIDLEEN	BIT(3)
38#define RT1711H_ENEXTMSG	BIT(4)
39
40#define RT1711H_RTCTRL11	0x9E
41
42/* I2C timeout = (tout + 1) * 12.5ms */
43#define RT1711H_RTCTRL11_SET(en, tout) \
44			     (((en) << 7) | ((tout) & 0x0F))
45
46#define RT1711H_RTCTRL13	0xA0
47#define RT1711H_RTCTRL14	0xA1
48#define RT1711H_RTCTRL15	0xA2
49#define RT1711H_RTCTRL16	0xA3
50
51#define RT1711H_RTCTRL18	0xAF
52/* 1b0 as fixed rx threshold of rd/rp 0.55V, 1b1 depends on RTCRTL4[0] */
53#define BMCIO_RXDZEN	BIT(0)
54
55struct rt1711h_chip_info {
56	u32 rxdz_sel;
57	u16 did;
58	bool enable_pd30_extended_message;
59};
60
61struct rt1711h_chip {
62	struct tcpci_data data;
63	struct tcpci *tcpci;
64	struct device *dev;
65	struct regulator *vbus;
66	const struct rt1711h_chip_info *info;
67	bool src_en;
68};
69
70static int rt1711h_read16(struct rt1711h_chip *chip, unsigned int reg, u16 *val)
71{
72	return regmap_raw_read(chip->data.regmap, reg, val, sizeof(u16));
73}
74
75static int rt1711h_write16(struct rt1711h_chip *chip, unsigned int reg, u16 val)
76{
77	return regmap_raw_write(chip->data.regmap, reg, &val, sizeof(u16));
78}
79
80static int rt1711h_read8(struct rt1711h_chip *chip, unsigned int reg, u8 *val)
81{
82	return regmap_raw_read(chip->data.regmap, reg, val, sizeof(u8));
83}
84
85static int rt1711h_write8(struct rt1711h_chip *chip, unsigned int reg, u8 val)
86{
87	return regmap_raw_write(chip->data.regmap, reg, &val, sizeof(u8));
88}
89
90static const struct regmap_config rt1711h_regmap_config = {
91	.reg_bits = 8,
92	.val_bits = 8,
93
94	.max_register = 0xFF, /* 0x80 .. 0xFF are vendor defined */
95};
96
97static struct rt1711h_chip *tdata_to_rt1711h(struct tcpci_data *tdata)
98{
99	return container_of(tdata, struct rt1711h_chip, data);
100}
101
102static int rt1711h_init(struct tcpci *tcpci, struct tcpci_data *tdata)
103{
104	struct rt1711h_chip *chip = tdata_to_rt1711h(tdata);
105	struct regmap *regmap = chip->data.regmap;
106	int ret;
107
108	/* CK 300K from 320K, shipping off, auto_idle enable, tout = 32ms */
109	ret = rt1711h_write8(chip, RT1711H_RTCTRL8,
110			     RT1711H_RTCTRL8_SET(0, 1, 1, 2));
111	if (ret < 0)
112		return ret;
113
114	/* Enable PD30 extended message for RT1715 */
115	if (chip->info->enable_pd30_extended_message) {
116		ret = regmap_update_bits(regmap, RT1711H_RTCTRL8,
117					 RT1711H_ENEXTMSG, RT1711H_ENEXTMSG);
118		if (ret < 0)
119			return ret;
120	}
121
122	/* I2C reset : (val + 1) * 12.5ms */
123	ret = rt1711h_write8(chip, RT1711H_RTCTRL11,
124			     RT1711H_RTCTRL11_SET(1, 0x0F));
125	if (ret < 0)
126		return ret;
127
128	/* tTCPCfilter : (26.7 * val) us */
129	ret = rt1711h_write8(chip, RT1711H_RTCTRL14, 0x0F);
130	if (ret < 0)
131		return ret;
132
133	/*  tDRP : (51.2 + 6.4 * val) ms */
134	ret = rt1711h_write8(chip, RT1711H_RTCTRL15, 0x04);
135	if (ret < 0)
136		return ret;
137
138	/* dcSRC.DRP : 33% */
139	ret = rt1711h_write16(chip, RT1711H_RTCTRL16, 330);
140	if (ret < 0)
141		return ret;
142
143	/* Enable phy discard retry, retry count 7, rx filter deglitch 100 us */
144	ret = rt1711h_write8(chip, RT1711H_PHYCTRL1, 0xF1);
145	if (ret < 0)
146		return ret;
147
148	/* Decrease wait time of BMC-encoded 1 bit from 2.67us to 2.55us */
149	/* wait time : (val * .4167) us */
150	return rt1711h_write8(chip, RT1711H_PHYCTRL2, 62);
151}
152
153static int rt1711h_set_vbus(struct tcpci *tcpci, struct tcpci_data *tdata,
154			    bool src, bool snk)
155{
156	struct rt1711h_chip *chip = tdata_to_rt1711h(tdata);
157	int ret;
158
159	if (chip->src_en == src)
160		return 0;
161
162	if (src)
163		ret = regulator_enable(chip->vbus);
164	else
165		ret = regulator_disable(chip->vbus);
166
167	if (!ret)
168		chip->src_en = src;
169	return ret;
170}
171
172static int rt1711h_set_vconn(struct tcpci *tcpci, struct tcpci_data *tdata,
173			     bool enable)
174{
175	struct rt1711h_chip *chip = tdata_to_rt1711h(tdata);
176
177	return regmap_update_bits(chip->data.regmap, RT1711H_RTCTRL8,
178				  RT1711H_AUTOIDLEEN, enable ? 0 : RT1711H_AUTOIDLEEN);
179}
180
181/*
182 * Selects the CC PHY noise filter voltage level according to the remote current
183 * CC voltage level.
184 *
185 * @status: The port's current cc status read from IC
186 * Return 0 if writes succeed; failure code otherwise
187 */
188static inline int rt1711h_init_cc_params(struct rt1711h_chip *chip, u8 status)
189{
190	int ret, cc1, cc2;
191	u8 role = 0;
192	u32 rxdz_en, rxdz_sel;
193
194	ret = rt1711h_read8(chip, TCPC_ROLE_CTRL, &role);
195	if (ret < 0)
196		return ret;
197
198	cc1 = tcpci_to_typec_cc((status >> TCPC_CC_STATUS_CC1_SHIFT) &
199				TCPC_CC_STATUS_CC1_MASK,
200				status & TCPC_CC_STATUS_TERM ||
201				tcpc_presenting_rd(role, CC1));
202	cc2 = tcpci_to_typec_cc((status >> TCPC_CC_STATUS_CC2_SHIFT) &
203				TCPC_CC_STATUS_CC2_MASK,
204				status & TCPC_CC_STATUS_TERM ||
205				tcpc_presenting_rd(role, CC2));
206
207	if ((cc1 >= TYPEC_CC_RP_1_5 && cc2 < TYPEC_CC_RP_DEF) ||
208	    (cc2 >= TYPEC_CC_RP_1_5 && cc1 < TYPEC_CC_RP_DEF)) {
209		rxdz_en = BMCIO_RXDZEN;
210		rxdz_sel = chip->info->rxdz_sel;
211	} else {
212		rxdz_en = 0;
213		rxdz_sel = RT1711H_BMCIO_RXDZSEL;
214	}
215
216	ret = regmap_update_bits(chip->data.regmap, RT1711H_RTCTRL18,
217				 BMCIO_RXDZEN, rxdz_en);
218	if (ret < 0)
219		return ret;
220
221	return regmap_update_bits(chip->data.regmap, RT1711H_RTCTRL4,
222				  RT1711H_BMCIO_RXDZSEL, rxdz_sel);
223}
224
225static int rt1711h_start_drp_toggling(struct tcpci *tcpci,
226				      struct tcpci_data *tdata,
227				      enum typec_cc_status cc)
228{
229	struct rt1711h_chip *chip = tdata_to_rt1711h(tdata);
230	int ret;
231	unsigned int reg = 0;
232
233	switch (cc) {
234	default:
235	case TYPEC_CC_RP_DEF:
236		reg |= (TCPC_ROLE_CTRL_RP_VAL_DEF <<
237			TCPC_ROLE_CTRL_RP_VAL_SHIFT);
238		break;
239	case TYPEC_CC_RP_1_5:
240		reg |= (TCPC_ROLE_CTRL_RP_VAL_1_5 <<
241			TCPC_ROLE_CTRL_RP_VAL_SHIFT);
242		break;
243	case TYPEC_CC_RP_3_0:
244		reg |= (TCPC_ROLE_CTRL_RP_VAL_3_0 <<
245			TCPC_ROLE_CTRL_RP_VAL_SHIFT);
246		break;
247	}
248
249	if (cc == TYPEC_CC_RD)
250		reg |= (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) |
251			   (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT);
252	else
253		reg |= (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
254			   (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT);
255
256	ret = rt1711h_write8(chip, TCPC_ROLE_CTRL, reg);
257	if (ret < 0)
258		return ret;
259	usleep_range(500, 1000);
260
261	return 0;
262}
263
264static irqreturn_t rt1711h_irq(int irq, void *dev_id)
265{
266	int ret;
267	u16 alert;
268	u8 status;
269	struct rt1711h_chip *chip = dev_id;
270
271	if (!chip->tcpci)
272		return IRQ_HANDLED;
273
274	ret = rt1711h_read16(chip, TCPC_ALERT, &alert);
275	if (ret < 0)
276		goto out;
277
278	if (alert & TCPC_ALERT_CC_STATUS) {
279		ret = rt1711h_read8(chip, TCPC_CC_STATUS, &status);
280		if (ret < 0)
281			goto out;
282		/* Clear cc change event triggered by starting toggling */
283		if (status & TCPC_CC_STATUS_TOGGLING)
284			rt1711h_write8(chip, TCPC_ALERT, TCPC_ALERT_CC_STATUS);
285		else
286			rt1711h_init_cc_params(chip, status);
287	}
288
289out:
290	return tcpci_irq(chip->tcpci);
291}
292
293static int rt1711h_sw_reset(struct rt1711h_chip *chip)
294{
295	int ret;
296
297	ret = rt1711h_write8(chip, RT1711H_RTCTRL13, 0x01);
298	if (ret < 0)
299		return ret;
300
301	usleep_range(1000, 2000);
302	return 0;
303}
304
305static int rt1711h_check_revision(struct i2c_client *i2c, struct rt1711h_chip *chip)
306{
307	int ret;
308
309	ret = i2c_smbus_read_word_data(i2c, TCPC_VENDOR_ID);
310	if (ret < 0)
311		return ret;
312	if (ret != RT1711H_VID) {
313		dev_err(&i2c->dev, "vid is not correct, 0x%04x\n", ret);
314		return -ENODEV;
315	}
316	ret = i2c_smbus_read_word_data(i2c, TCPC_PRODUCT_ID);
317	if (ret < 0)
318		return ret;
319	if (ret != RT1711H_PID) {
320		dev_err(&i2c->dev, "pid is not correct, 0x%04x\n", ret);
321		return -ENODEV;
322	}
323	ret = i2c_smbus_read_word_data(i2c, TCPC_BCD_DEV);
324	if (ret < 0)
325		return ret;
326	if (ret != chip->info->did) {
327		dev_err(&i2c->dev, "did is not correct, 0x%04x\n", ret);
328		return -ENODEV;
329	}
330	dev_dbg(&i2c->dev, "did is 0x%04x\n", ret);
331	return ret;
332}
333
334static int rt1711h_probe(struct i2c_client *client)
335{
336	int ret;
337	struct rt1711h_chip *chip;
338
339	chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
340	if (!chip)
341		return -ENOMEM;
342
343	chip->info = i2c_get_match_data(client);
344
345	ret = rt1711h_check_revision(client, chip);
346	if (ret < 0) {
347		dev_err(&client->dev, "check vid/pid fail\n");
348		return ret;
349	}
350
351	chip->data.regmap = devm_regmap_init_i2c(client,
352						 &rt1711h_regmap_config);
353	if (IS_ERR(chip->data.regmap))
354		return PTR_ERR(chip->data.regmap);
355
356	chip->dev = &client->dev;
357	i2c_set_clientdata(client, chip);
358
359	ret = rt1711h_sw_reset(chip);
360	if (ret < 0)
361		return ret;
362
363	/* Disable chip interrupts before requesting irq */
364	ret = rt1711h_write16(chip, TCPC_ALERT_MASK, 0);
365	if (ret < 0)
366		return ret;
367
368	chip->vbus = devm_regulator_get(&client->dev, "vbus");
369	if (IS_ERR(chip->vbus))
370		return PTR_ERR(chip->vbus);
371
372	chip->data.init = rt1711h_init;
373	chip->data.set_vbus = rt1711h_set_vbus;
374	chip->data.set_vconn = rt1711h_set_vconn;
375	chip->data.start_drp_toggling = rt1711h_start_drp_toggling;
376	chip->tcpci = tcpci_register_port(chip->dev, &chip->data);
377	if (IS_ERR_OR_NULL(chip->tcpci))
378		return PTR_ERR(chip->tcpci);
379
380	ret = devm_request_threaded_irq(chip->dev, client->irq, NULL,
381					rt1711h_irq,
382					IRQF_ONESHOT | IRQF_TRIGGER_LOW,
383					dev_name(chip->dev), chip);
384	if (ret < 0)
385		return ret;
386	enable_irq_wake(client->irq);
387
388	return 0;
389}
390
391static void rt1711h_remove(struct i2c_client *client)
392{
393	struct rt1711h_chip *chip = i2c_get_clientdata(client);
394
395	tcpci_unregister_port(chip->tcpci);
396}
397
398static const struct rt1711h_chip_info rt1711h = {
399	.did = RT1711H_DID,
400};
401
402static const struct rt1711h_chip_info rt1715 = {
403	.rxdz_sel = RT1711H_BMCIO_RXDZSEL,
404	.did = RT1715_DID,
405	.enable_pd30_extended_message = true,
406};
407
408static const struct i2c_device_id rt1711h_id[] = {
409	{ "rt1711h", (kernel_ulong_t)&rt1711h },
410	{ "rt1715", (kernel_ulong_t)&rt1715 },
411	{}
412};
413MODULE_DEVICE_TABLE(i2c, rt1711h_id);
414
415static const struct of_device_id rt1711h_of_match[] = {
416	{ .compatible = "richtek,rt1711h", .data = &rt1711h },
417	{ .compatible = "richtek,rt1715", .data = &rt1715 },
418	{}
419};
420MODULE_DEVICE_TABLE(of, rt1711h_of_match);
421
422static struct i2c_driver rt1711h_i2c_driver = {
423	.driver = {
424		.name = "rt1711h",
425		.of_match_table = rt1711h_of_match,
426	},
427	.probe = rt1711h_probe,
428	.remove = rt1711h_remove,
429	.id_table = rt1711h_id,
430};
431module_i2c_driver(rt1711h_i2c_driver);
432
433MODULE_AUTHOR("ShuFan Lee <shufan_lee@richtek.com>");
434MODULE_DESCRIPTION("RT1711H USB Type-C Port Controller Interface Driver");
435MODULE_LICENSE("GPL");
436