1// SPDX-License-Identifier: GPL-1.0+ 2/* 3 * Renesas USB driver 4 * 5 * Copyright (C) 2011 Renesas Solutions Corp. 6 * Copyright (C) 2019 Renesas Electronics Corporation 7 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 8 */ 9#include <linux/delay.h> 10#include <linux/io.h> 11#include <linux/scatterlist.h> 12#include "common.h" 13#include "pipe.h" 14 15#define usbhsf_get_cfifo(p) (&((p)->fifo_info.cfifo)) 16 17#define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */ 18 19/* 20 * packet initialize 21 */ 22void usbhs_pkt_init(struct usbhs_pkt *pkt) 23{ 24 INIT_LIST_HEAD(&pkt->node); 25} 26 27/* 28 * packet control function 29 */ 30static int usbhsf_null_handle(struct usbhs_pkt *pkt, int *is_done) 31{ 32 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); 33 struct device *dev = usbhs_priv_to_dev(priv); 34 35 dev_err(dev, "null handler\n"); 36 37 return -EINVAL; 38} 39 40static const struct usbhs_pkt_handle usbhsf_null_handler = { 41 .prepare = usbhsf_null_handle, 42 .try_run = usbhsf_null_handle, 43}; 44 45void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, 46 void (*done)(struct usbhs_priv *priv, 47 struct usbhs_pkt *pkt), 48 void *buf, int len, int zero, int sequence) 49{ 50 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 51 struct device *dev = usbhs_priv_to_dev(priv); 52 unsigned long flags; 53 54 if (!done) { 55 dev_err(dev, "no done function\n"); 56 return; 57 } 58 59 /******************** spin lock ********************/ 60 usbhs_lock(priv, flags); 61 62 if (!pipe->handler) { 63 dev_err(dev, "no handler function\n"); 64 pipe->handler = &usbhsf_null_handler; 65 } 66 67 list_move_tail(&pkt->node, &pipe->list); 68 69 /* 70 * each pkt must hold own handler. 71 * because handler might be changed by its situation. 72 * dma handler -> pio handler. 73 */ 74 pkt->pipe = pipe; 75 pkt->buf = buf; 76 pkt->handler = pipe->handler; 77 pkt->length = len; 78 pkt->zero = zero; 79 pkt->actual = 0; 80 pkt->done = done; 81 pkt->sequence = sequence; 82 83 usbhs_unlock(priv, flags); 84 /******************** spin unlock ******************/ 85} 86 87static void __usbhsf_pkt_del(struct usbhs_pkt *pkt) 88{ 89 list_del_init(&pkt->node); 90} 91 92struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe) 93{ 94 return list_first_entry_or_null(&pipe->list, struct usbhs_pkt, node); 95} 96 97static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe, 98 struct usbhs_fifo *fifo); 99static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo, 100 struct usbhs_pkt *pkt); 101#define usbhsf_dma_map(p) __usbhsf_dma_map_ctrl(p, 1) 102#define usbhsf_dma_unmap(p) __usbhsf_dma_map_ctrl(p, 0) 103static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map); 104static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable); 105static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable); 106struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt) 107{ 108 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 109 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe); 110 unsigned long flags; 111 112 /******************** spin lock ********************/ 113 usbhs_lock(priv, flags); 114 115 usbhs_pipe_disable(pipe); 116 117 if (!pkt) 118 pkt = __usbhsf_pkt_get(pipe); 119 120 if (pkt) { 121 struct dma_chan *chan = NULL; 122 123 if (fifo) 124 chan = usbhsf_dma_chan_get(fifo, pkt); 125 if (chan) { 126 dmaengine_terminate_all(chan); 127 usbhsf_dma_unmap(pkt); 128 } else { 129 if (usbhs_pipe_is_dir_in(pipe)) 130 usbhsf_rx_irq_ctrl(pipe, 0); 131 else 132 usbhsf_tx_irq_ctrl(pipe, 0); 133 } 134 135 usbhs_pipe_clear_without_sequence(pipe, 0, 0); 136 usbhs_pipe_running(pipe, 0); 137 138 __usbhsf_pkt_del(pkt); 139 } 140 141 if (fifo) 142 usbhsf_fifo_unselect(pipe, fifo); 143 144 usbhs_unlock(priv, flags); 145 /******************** spin unlock ******************/ 146 147 return pkt; 148} 149 150enum { 151 USBHSF_PKT_PREPARE, 152 USBHSF_PKT_TRY_RUN, 153 USBHSF_PKT_DMA_DONE, 154}; 155 156static int usbhsf_pkt_handler(struct usbhs_pipe *pipe, int type) 157{ 158 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 159 struct usbhs_pkt *pkt; 160 struct device *dev = usbhs_priv_to_dev(priv); 161 int (*func)(struct usbhs_pkt *pkt, int *is_done); 162 unsigned long flags; 163 int ret = 0; 164 int is_done = 0; 165 166 /******************** spin lock ********************/ 167 usbhs_lock(priv, flags); 168 169 pkt = __usbhsf_pkt_get(pipe); 170 if (!pkt) { 171 ret = -EINVAL; 172 goto __usbhs_pkt_handler_end; 173 } 174 175 switch (type) { 176 case USBHSF_PKT_PREPARE: 177 func = pkt->handler->prepare; 178 break; 179 case USBHSF_PKT_TRY_RUN: 180 func = pkt->handler->try_run; 181 break; 182 case USBHSF_PKT_DMA_DONE: 183 func = pkt->handler->dma_done; 184 break; 185 default: 186 dev_err(dev, "unknown pkt handler\n"); 187 goto __usbhs_pkt_handler_end; 188 } 189 190 if (likely(func)) 191 ret = func(pkt, &is_done); 192 193 if (is_done) 194 __usbhsf_pkt_del(pkt); 195 196__usbhs_pkt_handler_end: 197 usbhs_unlock(priv, flags); 198 /******************** spin unlock ******************/ 199 200 if (is_done) { 201 pkt->done(priv, pkt); 202 usbhs_pkt_start(pipe); 203 } 204 205 return ret; 206} 207 208void usbhs_pkt_start(struct usbhs_pipe *pipe) 209{ 210 usbhsf_pkt_handler(pipe, USBHSF_PKT_PREPARE); 211} 212 213/* 214 * irq enable/disable function 215 */ 216#define usbhsf_irq_empty_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_bempsts, e) 217#define usbhsf_irq_ready_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_brdysts, e) 218#define usbhsf_irq_callback_ctrl(pipe, status, enable) \ 219 ({ \ 220 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); \ 221 struct usbhs_mod *mod = usbhs_mod_get_current(priv); \ 222 u16 status = (1 << usbhs_pipe_number(pipe)); \ 223 if (!mod) \ 224 return; \ 225 if (enable) \ 226 mod->status |= status; \ 227 else \ 228 mod->status &= ~status; \ 229 usbhs_irq_callback_update(priv, mod); \ 230 }) 231 232static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable) 233{ 234 /* 235 * And DCP pipe can NOT use "ready interrupt" for "send" 236 * it should use "empty" interrupt. 237 * see 238 * "Operation" - "Interrupt Function" - "BRDY Interrupt" 239 * 240 * on the other hand, normal pipe can use "ready interrupt" for "send" 241 * even though it is single/double buffer 242 */ 243 if (usbhs_pipe_is_dcp(pipe)) 244 usbhsf_irq_empty_ctrl(pipe, enable); 245 else 246 usbhsf_irq_ready_ctrl(pipe, enable); 247} 248 249static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable) 250{ 251 usbhsf_irq_ready_ctrl(pipe, enable); 252} 253 254/* 255 * FIFO ctrl 256 */ 257static void usbhsf_send_terminator(struct usbhs_pipe *pipe, 258 struct usbhs_fifo *fifo) 259{ 260 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 261 262 usbhs_bset(priv, fifo->ctr, BVAL, BVAL); 263} 264 265static int usbhsf_fifo_barrier(struct usbhs_priv *priv, 266 struct usbhs_fifo *fifo) 267{ 268 /* The FIFO port is accessible */ 269 if (usbhs_read(priv, fifo->ctr) & FRDY) 270 return 0; 271 272 return -EBUSY; 273} 274 275static void usbhsf_fifo_clear(struct usbhs_pipe *pipe, 276 struct usbhs_fifo *fifo) 277{ 278 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 279 int ret = 0; 280 281 if (!usbhs_pipe_is_dcp(pipe)) { 282 /* 283 * This driver checks the pipe condition first to avoid -EBUSY 284 * from usbhsf_fifo_barrier() if the pipe is RX direction and 285 * empty. 286 */ 287 if (usbhs_pipe_is_dir_in(pipe)) 288 ret = usbhs_pipe_is_accessible(pipe); 289 if (!ret) 290 ret = usbhsf_fifo_barrier(priv, fifo); 291 } 292 293 /* 294 * if non-DCP pipe, this driver should set BCLR when 295 * usbhsf_fifo_barrier() returns 0. 296 */ 297 if (!ret) 298 usbhs_write(priv, fifo->ctr, BCLR); 299} 300 301static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv, 302 struct usbhs_fifo *fifo) 303{ 304 return usbhs_read(priv, fifo->ctr) & DTLN_MASK; 305} 306 307static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe, 308 struct usbhs_fifo *fifo) 309{ 310 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 311 312 usbhs_pipe_select_fifo(pipe, NULL); 313 usbhs_write(priv, fifo->sel, 0); 314} 315 316static int usbhsf_fifo_select(struct usbhs_pipe *pipe, 317 struct usbhs_fifo *fifo, 318 int write) 319{ 320 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 321 struct device *dev = usbhs_priv_to_dev(priv); 322 int timeout = 1024; 323 u16 mask = ((1 << 5) | 0xF); /* mask of ISEL | CURPIPE */ 324 u16 base = usbhs_pipe_number(pipe); /* CURPIPE */ 325 326 if (usbhs_pipe_is_busy(pipe) || 327 usbhsf_fifo_is_busy(fifo)) 328 return -EBUSY; 329 330 if (usbhs_pipe_is_dcp(pipe)) { 331 base |= (1 == write) << 5; /* ISEL */ 332 333 if (usbhs_mod_is_host(priv)) 334 usbhs_dcp_dir_for_host(pipe, write); 335 } 336 337 /* "base" will be used below */ 338 usbhs_write(priv, fifo->sel, base | MBW_32); 339 340 /* check ISEL and CURPIPE value */ 341 while (timeout--) { 342 if (base == (mask & usbhs_read(priv, fifo->sel))) { 343 usbhs_pipe_select_fifo(pipe, fifo); 344 return 0; 345 } 346 udelay(10); 347 } 348 349 dev_err(dev, "fifo select error\n"); 350 351 return -EIO; 352} 353 354/* 355 * DCP status stage 356 */ 357static int usbhs_dcp_dir_switch_to_write(struct usbhs_pkt *pkt, int *is_done) 358{ 359 struct usbhs_pipe *pipe = pkt->pipe; 360 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 361 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ 362 struct device *dev = usbhs_priv_to_dev(priv); 363 int ret; 364 365 usbhs_pipe_disable(pipe); 366 367 ret = usbhsf_fifo_select(pipe, fifo, 1); 368 if (ret < 0) { 369 dev_err(dev, "%s() failed\n", __func__); 370 return ret; 371 } 372 373 usbhs_pipe_sequence_data1(pipe); /* DATA1 */ 374 375 usbhsf_fifo_clear(pipe, fifo); 376 usbhsf_send_terminator(pipe, fifo); 377 378 usbhsf_fifo_unselect(pipe, fifo); 379 380 usbhsf_tx_irq_ctrl(pipe, 1); 381 usbhs_pipe_enable(pipe); 382 383 return ret; 384} 385 386static int usbhs_dcp_dir_switch_to_read(struct usbhs_pkt *pkt, int *is_done) 387{ 388 struct usbhs_pipe *pipe = pkt->pipe; 389 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 390 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ 391 struct device *dev = usbhs_priv_to_dev(priv); 392 int ret; 393 394 usbhs_pipe_disable(pipe); 395 396 ret = usbhsf_fifo_select(pipe, fifo, 0); 397 if (ret < 0) { 398 dev_err(dev, "%s() fail\n", __func__); 399 return ret; 400 } 401 402 usbhs_pipe_sequence_data1(pipe); /* DATA1 */ 403 usbhsf_fifo_clear(pipe, fifo); 404 405 usbhsf_fifo_unselect(pipe, fifo); 406 407 usbhsf_rx_irq_ctrl(pipe, 1); 408 usbhs_pipe_enable(pipe); 409 410 return ret; 411 412} 413 414static int usbhs_dcp_dir_switch_done(struct usbhs_pkt *pkt, int *is_done) 415{ 416 struct usbhs_pipe *pipe = pkt->pipe; 417 418 if (pkt->handler == &usbhs_dcp_status_stage_in_handler) 419 usbhsf_tx_irq_ctrl(pipe, 0); 420 else 421 usbhsf_rx_irq_ctrl(pipe, 0); 422 423 pkt->actual = pkt->length; 424 *is_done = 1; 425 426 return 0; 427} 428 429const struct usbhs_pkt_handle usbhs_dcp_status_stage_in_handler = { 430 .prepare = usbhs_dcp_dir_switch_to_write, 431 .try_run = usbhs_dcp_dir_switch_done, 432}; 433 434const struct usbhs_pkt_handle usbhs_dcp_status_stage_out_handler = { 435 .prepare = usbhs_dcp_dir_switch_to_read, 436 .try_run = usbhs_dcp_dir_switch_done, 437}; 438 439/* 440 * DCP data stage (push) 441 */ 442static int usbhsf_dcp_data_stage_try_push(struct usbhs_pkt *pkt, int *is_done) 443{ 444 struct usbhs_pipe *pipe = pkt->pipe; 445 446 usbhs_pipe_sequence_data1(pipe); /* DATA1 */ 447 448 /* 449 * change handler to PIO push 450 */ 451 pkt->handler = &usbhs_fifo_pio_push_handler; 452 453 return pkt->handler->prepare(pkt, is_done); 454} 455 456const struct usbhs_pkt_handle usbhs_dcp_data_stage_out_handler = { 457 .prepare = usbhsf_dcp_data_stage_try_push, 458}; 459 460/* 461 * DCP data stage (pop) 462 */ 463static int usbhsf_dcp_data_stage_prepare_pop(struct usbhs_pkt *pkt, 464 int *is_done) 465{ 466 struct usbhs_pipe *pipe = pkt->pipe; 467 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 468 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); 469 470 if (usbhs_pipe_is_busy(pipe)) 471 return 0; 472 473 /* 474 * prepare pop for DCP should 475 * - change DCP direction, 476 * - clear fifo 477 * - DATA1 478 */ 479 usbhs_pipe_disable(pipe); 480 481 usbhs_pipe_sequence_data1(pipe); /* DATA1 */ 482 483 usbhsf_fifo_select(pipe, fifo, 0); 484 usbhsf_fifo_clear(pipe, fifo); 485 usbhsf_fifo_unselect(pipe, fifo); 486 487 /* 488 * change handler to PIO pop 489 */ 490 pkt->handler = &usbhs_fifo_pio_pop_handler; 491 492 return pkt->handler->prepare(pkt, is_done); 493} 494 495const struct usbhs_pkt_handle usbhs_dcp_data_stage_in_handler = { 496 .prepare = usbhsf_dcp_data_stage_prepare_pop, 497}; 498 499/* 500 * PIO push handler 501 */ 502static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done) 503{ 504 struct usbhs_pipe *pipe = pkt->pipe; 505 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 506 struct device *dev = usbhs_priv_to_dev(priv); 507 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ 508 void __iomem *addr = priv->base + fifo->port; 509 u8 *buf; 510 int maxp = usbhs_pipe_get_maxpacket(pipe); 511 int total_len; 512 int i, ret, len; 513 int is_short; 514 515 usbhs_pipe_data_sequence(pipe, pkt->sequence); 516 pkt->sequence = -1; /* -1 sequence will be ignored */ 517 518 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length); 519 520 ret = usbhsf_fifo_select(pipe, fifo, 1); 521 if (ret < 0) 522 return 0; 523 524 ret = usbhs_pipe_is_accessible(pipe); 525 if (ret < 0) { 526 /* inaccessible pipe is not an error */ 527 ret = 0; 528 goto usbhs_fifo_write_busy; 529 } 530 531 ret = usbhsf_fifo_barrier(priv, fifo); 532 if (ret < 0) 533 goto usbhs_fifo_write_busy; 534 535 buf = pkt->buf + pkt->actual; 536 len = pkt->length - pkt->actual; 537 len = min(len, maxp); 538 total_len = len; 539 is_short = total_len < maxp; 540 541 /* 542 * FIXME 543 * 544 * 32-bit access only 545 */ 546 if (len >= 4 && !((unsigned long)buf & 0x03)) { 547 iowrite32_rep(addr, buf, len / 4); 548 len %= 4; 549 buf += total_len - len; 550 } 551 552 /* the rest operation */ 553 if (usbhs_get_dparam(priv, cfifo_byte_addr)) { 554 for (i = 0; i < len; i++) 555 iowrite8(buf[i], addr + (i & 0x03)); 556 } else { 557 for (i = 0; i < len; i++) 558 iowrite8(buf[i], addr + (0x03 - (i & 0x03))); 559 } 560 561 /* 562 * variable update 563 */ 564 pkt->actual += total_len; 565 566 if (pkt->actual < pkt->length) 567 *is_done = 0; /* there are remainder data */ 568 else if (is_short) 569 *is_done = 1; /* short packet */ 570 else 571 *is_done = !pkt->zero; /* send zero packet ? */ 572 573 /* 574 * pipe/irq handling 575 */ 576 if (is_short) 577 usbhsf_send_terminator(pipe, fifo); 578 579 usbhsf_tx_irq_ctrl(pipe, !*is_done); 580 usbhs_pipe_running(pipe, !*is_done); 581 usbhs_pipe_enable(pipe); 582 583 dev_dbg(dev, " send %d (%d/ %d/ %d/ %d)\n", 584 usbhs_pipe_number(pipe), 585 pkt->length, pkt->actual, *is_done, pkt->zero); 586 587 usbhsf_fifo_unselect(pipe, fifo); 588 589 return 0; 590 591usbhs_fifo_write_busy: 592 usbhsf_fifo_unselect(pipe, fifo); 593 594 /* 595 * pipe is busy. 596 * retry in interrupt 597 */ 598 usbhsf_tx_irq_ctrl(pipe, 1); 599 usbhs_pipe_running(pipe, 1); 600 601 return ret; 602} 603 604static int usbhsf_pio_prepare_push(struct usbhs_pkt *pkt, int *is_done) 605{ 606 if (usbhs_pipe_is_running(pkt->pipe)) 607 return 0; 608 609 return usbhsf_pio_try_push(pkt, is_done); 610} 611 612const struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = { 613 .prepare = usbhsf_pio_prepare_push, 614 .try_run = usbhsf_pio_try_push, 615}; 616 617/* 618 * PIO pop handler 619 */ 620static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done) 621{ 622 struct usbhs_pipe *pipe = pkt->pipe; 623 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 624 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); 625 626 if (usbhs_pipe_is_busy(pipe)) 627 return 0; 628 629 if (usbhs_pipe_is_running(pipe)) 630 return 0; 631 632 /* 633 * pipe enable to prepare packet receive 634 */ 635 usbhs_pipe_data_sequence(pipe, pkt->sequence); 636 pkt->sequence = -1; /* -1 sequence will be ignored */ 637 638 if (usbhs_pipe_is_dcp(pipe)) 639 usbhsf_fifo_clear(pipe, fifo); 640 641 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length); 642 usbhs_pipe_enable(pipe); 643 usbhs_pipe_running(pipe, 1); 644 usbhsf_rx_irq_ctrl(pipe, 1); 645 646 return 0; 647} 648 649static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done) 650{ 651 struct usbhs_pipe *pipe = pkt->pipe; 652 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 653 struct device *dev = usbhs_priv_to_dev(priv); 654 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ 655 void __iomem *addr = priv->base + fifo->port; 656 u8 *buf; 657 u32 data = 0; 658 int maxp = usbhs_pipe_get_maxpacket(pipe); 659 int rcv_len, len; 660 int i, ret; 661 int total_len = 0; 662 663 ret = usbhsf_fifo_select(pipe, fifo, 0); 664 if (ret < 0) 665 return 0; 666 667 ret = usbhsf_fifo_barrier(priv, fifo); 668 if (ret < 0) 669 goto usbhs_fifo_read_busy; 670 671 rcv_len = usbhsf_fifo_rcv_len(priv, fifo); 672 673 buf = pkt->buf + pkt->actual; 674 len = pkt->length - pkt->actual; 675 len = min(len, rcv_len); 676 total_len = len; 677 678 /* 679 * update actual length first here to decide disable pipe. 680 * if this pipe keeps BUF status and all data were popped, 681 * then, next interrupt/token will be issued again 682 */ 683 pkt->actual += total_len; 684 685 if ((pkt->actual == pkt->length) || /* receive all data */ 686 (total_len < maxp)) { /* short packet */ 687 *is_done = 1; 688 usbhsf_rx_irq_ctrl(pipe, 0); 689 usbhs_pipe_running(pipe, 0); 690 /* 691 * If function mode, since this controller is possible to enter 692 * Control Write status stage at this timing, this driver 693 * should not disable the pipe. If such a case happens, this 694 * controller is not able to complete the status stage. 695 */ 696 if (!usbhs_mod_is_host(priv) && !usbhs_pipe_is_dcp(pipe)) 697 usbhs_pipe_disable(pipe); /* disable pipe first */ 698 } 699 700 /* 701 * Buffer clear if Zero-Length packet 702 * 703 * see 704 * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function" 705 */ 706 if (0 == rcv_len) { 707 pkt->zero = 1; 708 usbhsf_fifo_clear(pipe, fifo); 709 goto usbhs_fifo_read_end; 710 } 711 712 /* 713 * FIXME 714 * 715 * 32-bit access only 716 */ 717 if (len >= 4 && !((unsigned long)buf & 0x03)) { 718 ioread32_rep(addr, buf, len / 4); 719 len %= 4; 720 buf += total_len - len; 721 } 722 723 /* the rest operation */ 724 for (i = 0; i < len; i++) { 725 if (!(i & 0x03)) 726 data = ioread32(addr); 727 728 buf[i] = (data >> ((i & 0x03) * 8)) & 0xff; 729 } 730 731usbhs_fifo_read_end: 732 dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n", 733 usbhs_pipe_number(pipe), 734 pkt->length, pkt->actual, *is_done, pkt->zero); 735 736usbhs_fifo_read_busy: 737 usbhsf_fifo_unselect(pipe, fifo); 738 739 return ret; 740} 741 742const struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = { 743 .prepare = usbhsf_prepare_pop, 744 .try_run = usbhsf_pio_try_pop, 745}; 746 747/* 748 * DCP ctrol statge handler 749 */ 750static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt, int *is_done) 751{ 752 usbhs_dcp_control_transfer_done(pkt->pipe); 753 754 *is_done = 1; 755 756 return 0; 757} 758 759const struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = { 760 .prepare = usbhsf_ctrl_stage_end, 761 .try_run = usbhsf_ctrl_stage_end, 762}; 763 764/* 765 * DMA fifo functions 766 */ 767static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo, 768 struct usbhs_pkt *pkt) 769{ 770 if (&usbhs_fifo_dma_push_handler == pkt->handler) 771 return fifo->tx_chan; 772 773 if (&usbhs_fifo_dma_pop_handler == pkt->handler) 774 return fifo->rx_chan; 775 776 return NULL; 777} 778 779static struct usbhs_fifo *usbhsf_get_dma_fifo(struct usbhs_priv *priv, 780 struct usbhs_pkt *pkt) 781{ 782 struct usbhs_fifo *fifo; 783 int i; 784 785 usbhs_for_each_dfifo(priv, fifo, i) { 786 if (usbhsf_dma_chan_get(fifo, pkt) && 787 !usbhsf_fifo_is_busy(fifo)) 788 return fifo; 789 } 790 791 return NULL; 792} 793 794#define usbhsf_dma_start(p, f) __usbhsf_dma_ctrl(p, f, DREQE) 795#define usbhsf_dma_stop(p, f) __usbhsf_dma_ctrl(p, f, 0) 796static void __usbhsf_dma_ctrl(struct usbhs_pipe *pipe, 797 struct usbhs_fifo *fifo, 798 u16 dreqe) 799{ 800 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 801 802 usbhs_bset(priv, fifo->sel, DREQE, dreqe); 803} 804 805static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map) 806{ 807 struct usbhs_pipe *pipe = pkt->pipe; 808 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 809 struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); 810 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe); 811 struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt); 812 813 return info->dma_map_ctrl(chan->device->dev, pkt, map); 814} 815 816static void usbhsf_dma_complete(void *arg, 817 const struct dmaengine_result *result); 818static void usbhsf_dma_xfer_preparing(struct usbhs_pkt *pkt) 819{ 820 struct usbhs_pipe *pipe = pkt->pipe; 821 struct usbhs_fifo *fifo; 822 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 823 struct dma_async_tx_descriptor *desc; 824 struct dma_chan *chan; 825 struct device *dev = usbhs_priv_to_dev(priv); 826 enum dma_transfer_direction dir; 827 dma_cookie_t cookie; 828 829 fifo = usbhs_pipe_to_fifo(pipe); 830 if (!fifo) 831 return; 832 833 chan = usbhsf_dma_chan_get(fifo, pkt); 834 dir = usbhs_pipe_is_dir_in(pipe) ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV; 835 836 desc = dmaengine_prep_slave_single(chan, pkt->dma + pkt->actual, 837 pkt->trans, dir, 838 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 839 if (!desc) 840 return; 841 842 desc->callback_result = usbhsf_dma_complete; 843 desc->callback_param = pkt; 844 845 cookie = dmaengine_submit(desc); 846 if (cookie < 0) { 847 dev_err(dev, "Failed to submit dma descriptor\n"); 848 return; 849 } 850 851 dev_dbg(dev, " %s %d (%d/ %d)\n", 852 fifo->name, usbhs_pipe_number(pipe), pkt->length, pkt->zero); 853 854 usbhs_pipe_running(pipe, 1); 855 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->trans); 856 dma_async_issue_pending(chan); 857 usbhsf_dma_start(pipe, fifo); 858 usbhs_pipe_enable(pipe); 859} 860 861static void xfer_work(struct work_struct *work) 862{ 863 struct usbhs_pkt *pkt = container_of(work, struct usbhs_pkt, work); 864 struct usbhs_pipe *pipe = pkt->pipe; 865 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 866 unsigned long flags; 867 868 usbhs_lock(priv, flags); 869 usbhsf_dma_xfer_preparing(pkt); 870 usbhs_unlock(priv, flags); 871} 872 873/* 874 * DMA push handler 875 */ 876static int usbhsf_dma_prepare_push(struct usbhs_pkt *pkt, int *is_done) 877{ 878 struct usbhs_pipe *pipe = pkt->pipe; 879 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 880 struct usbhs_fifo *fifo; 881 int len = pkt->length - pkt->actual; 882 int ret; 883 uintptr_t align_mask; 884 885 if (usbhs_pipe_is_busy(pipe)) 886 return 0; 887 888 /* use PIO if packet is less than pio_dma_border or pipe is DCP */ 889 if ((len < usbhs_get_dparam(priv, pio_dma_border)) || 890 usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC)) 891 goto usbhsf_pio_prepare_push; 892 893 /* check data length if this driver don't use USB-DMAC */ 894 if (!usbhs_get_dparam(priv, has_usb_dmac) && len & 0x7) 895 goto usbhsf_pio_prepare_push; 896 897 /* check buffer alignment */ 898 align_mask = usbhs_get_dparam(priv, has_usb_dmac) ? 899 USBHS_USB_DMAC_XFER_SIZE - 1 : 0x7; 900 if ((uintptr_t)(pkt->buf + pkt->actual) & align_mask) 901 goto usbhsf_pio_prepare_push; 902 903 /* return at this time if the pipe is running */ 904 if (usbhs_pipe_is_running(pipe)) 905 return 0; 906 907 /* get enable DMA fifo */ 908 fifo = usbhsf_get_dma_fifo(priv, pkt); 909 if (!fifo) 910 goto usbhsf_pio_prepare_push; 911 912 ret = usbhsf_fifo_select(pipe, fifo, 0); 913 if (ret < 0) 914 goto usbhsf_pio_prepare_push; 915 916 if (usbhsf_dma_map(pkt) < 0) 917 goto usbhsf_pio_prepare_push_unselect; 918 919 pkt->trans = len; 920 921 usbhsf_tx_irq_ctrl(pipe, 0); 922 /* FIXME: Workaound for usb dmac that driver can be used in atomic */ 923 if (usbhs_get_dparam(priv, has_usb_dmac)) { 924 usbhsf_dma_xfer_preparing(pkt); 925 } else { 926 INIT_WORK(&pkt->work, xfer_work); 927 schedule_work(&pkt->work); 928 } 929 930 return 0; 931 932usbhsf_pio_prepare_push_unselect: 933 usbhsf_fifo_unselect(pipe, fifo); 934usbhsf_pio_prepare_push: 935 /* 936 * change handler to PIO 937 */ 938 pkt->handler = &usbhs_fifo_pio_push_handler; 939 940 return pkt->handler->prepare(pkt, is_done); 941} 942 943static int usbhsf_dma_push_done(struct usbhs_pkt *pkt, int *is_done) 944{ 945 struct usbhs_pipe *pipe = pkt->pipe; 946 int is_short = pkt->trans % usbhs_pipe_get_maxpacket(pipe); 947 948 pkt->actual += pkt->trans; 949 950 if (pkt->actual < pkt->length) 951 *is_done = 0; /* there are remainder data */ 952 else if (is_short) 953 *is_done = 1; /* short packet */ 954 else 955 *is_done = !pkt->zero; /* send zero packet? */ 956 957 usbhs_pipe_running(pipe, !*is_done); 958 959 usbhsf_dma_stop(pipe, pipe->fifo); 960 usbhsf_dma_unmap(pkt); 961 usbhsf_fifo_unselect(pipe, pipe->fifo); 962 963 if (!*is_done) { 964 /* change handler to PIO */ 965 pkt->handler = &usbhs_fifo_pio_push_handler; 966 return pkt->handler->try_run(pkt, is_done); 967 } 968 969 return 0; 970} 971 972const struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = { 973 .prepare = usbhsf_dma_prepare_push, 974 .dma_done = usbhsf_dma_push_done, 975}; 976 977/* 978 * DMA pop handler 979 */ 980 981static int usbhsf_dma_prepare_pop_with_rx_irq(struct usbhs_pkt *pkt, 982 int *is_done) 983{ 984 return usbhsf_prepare_pop(pkt, is_done); 985} 986 987static int usbhsf_dma_prepare_pop_with_usb_dmac(struct usbhs_pkt *pkt, 988 int *is_done) 989{ 990 struct usbhs_pipe *pipe = pkt->pipe; 991 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 992 struct usbhs_fifo *fifo; 993 int ret; 994 995 if (usbhs_pipe_is_busy(pipe)) 996 return 0; 997 998 /* use PIO if packet is less than pio_dma_border or pipe is DCP */ 999 if ((pkt->length < usbhs_get_dparam(priv, pio_dma_border)) || 1000 usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC)) 1001 goto usbhsf_pio_prepare_pop; 1002 1003 fifo = usbhsf_get_dma_fifo(priv, pkt); 1004 if (!fifo) 1005 goto usbhsf_pio_prepare_pop; 1006 1007 if ((uintptr_t)pkt->buf & (USBHS_USB_DMAC_XFER_SIZE - 1)) 1008 goto usbhsf_pio_prepare_pop; 1009 1010 /* return at this time if the pipe is running */ 1011 if (usbhs_pipe_is_running(pipe)) 1012 return 0; 1013 1014 usbhs_pipe_config_change_bfre(pipe, 1); 1015 1016 ret = usbhsf_fifo_select(pipe, fifo, 0); 1017 if (ret < 0) 1018 goto usbhsf_pio_prepare_pop; 1019 1020 if (usbhsf_dma_map(pkt) < 0) 1021 goto usbhsf_pio_prepare_pop_unselect; 1022 1023 /* DMA */ 1024 1025 /* 1026 * usbhs_fifo_dma_pop_handler :: prepare 1027 * enabled irq to come here. 1028 * but it is no longer needed for DMA. disable it. 1029 */ 1030 usbhsf_rx_irq_ctrl(pipe, 0); 1031 1032 pkt->trans = pkt->length; 1033 1034 usbhsf_dma_xfer_preparing(pkt); 1035 1036 return 0; 1037 1038usbhsf_pio_prepare_pop_unselect: 1039 usbhsf_fifo_unselect(pipe, fifo); 1040usbhsf_pio_prepare_pop: 1041 1042 /* 1043 * change handler to PIO 1044 */ 1045 pkt->handler = &usbhs_fifo_pio_pop_handler; 1046 usbhs_pipe_config_change_bfre(pipe, 0); 1047 1048 return pkt->handler->prepare(pkt, is_done); 1049} 1050 1051static int usbhsf_dma_prepare_pop(struct usbhs_pkt *pkt, int *is_done) 1052{ 1053 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); 1054 1055 if (usbhs_get_dparam(priv, has_usb_dmac)) 1056 return usbhsf_dma_prepare_pop_with_usb_dmac(pkt, is_done); 1057 else 1058 return usbhsf_dma_prepare_pop_with_rx_irq(pkt, is_done); 1059} 1060 1061static int usbhsf_dma_try_pop_with_rx_irq(struct usbhs_pkt *pkt, int *is_done) 1062{ 1063 struct usbhs_pipe *pipe = pkt->pipe; 1064 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 1065 struct usbhs_fifo *fifo; 1066 int len, ret; 1067 1068 if (usbhs_pipe_is_busy(pipe)) 1069 return 0; 1070 1071 if (usbhs_pipe_is_dcp(pipe)) 1072 goto usbhsf_pio_prepare_pop; 1073 1074 /* get enable DMA fifo */ 1075 fifo = usbhsf_get_dma_fifo(priv, pkt); 1076 if (!fifo) 1077 goto usbhsf_pio_prepare_pop; 1078 1079 if ((uintptr_t)(pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */ 1080 goto usbhsf_pio_prepare_pop; 1081 1082 ret = usbhsf_fifo_select(pipe, fifo, 0); 1083 if (ret < 0) 1084 goto usbhsf_pio_prepare_pop; 1085 1086 /* use PIO if packet is less than pio_dma_border */ 1087 len = usbhsf_fifo_rcv_len(priv, fifo); 1088 len = min(pkt->length - pkt->actual, len); 1089 if (len & 0x7) /* 8byte alignment */ 1090 goto usbhsf_pio_prepare_pop_unselect; 1091 1092 if (len < usbhs_get_dparam(priv, pio_dma_border)) 1093 goto usbhsf_pio_prepare_pop_unselect; 1094 1095 ret = usbhsf_fifo_barrier(priv, fifo); 1096 if (ret < 0) 1097 goto usbhsf_pio_prepare_pop_unselect; 1098 1099 if (usbhsf_dma_map(pkt) < 0) 1100 goto usbhsf_pio_prepare_pop_unselect; 1101 1102 /* DMA */ 1103 1104 /* 1105 * usbhs_fifo_dma_pop_handler :: prepare 1106 * enabled irq to come here. 1107 * but it is no longer needed for DMA. disable it. 1108 */ 1109 usbhsf_rx_irq_ctrl(pipe, 0); 1110 1111 pkt->trans = len; 1112 1113 INIT_WORK(&pkt->work, xfer_work); 1114 schedule_work(&pkt->work); 1115 1116 return 0; 1117 1118usbhsf_pio_prepare_pop_unselect: 1119 usbhsf_fifo_unselect(pipe, fifo); 1120usbhsf_pio_prepare_pop: 1121 1122 /* 1123 * change handler to PIO 1124 */ 1125 pkt->handler = &usbhs_fifo_pio_pop_handler; 1126 1127 return pkt->handler->try_run(pkt, is_done); 1128} 1129 1130static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done) 1131{ 1132 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); 1133 1134 BUG_ON(usbhs_get_dparam(priv, has_usb_dmac)); 1135 1136 return usbhsf_dma_try_pop_with_rx_irq(pkt, is_done); 1137} 1138 1139static int usbhsf_dma_pop_done_with_rx_irq(struct usbhs_pkt *pkt, int *is_done) 1140{ 1141 struct usbhs_pipe *pipe = pkt->pipe; 1142 int maxp = usbhs_pipe_get_maxpacket(pipe); 1143 1144 usbhsf_dma_stop(pipe, pipe->fifo); 1145 usbhsf_dma_unmap(pkt); 1146 usbhsf_fifo_unselect(pipe, pipe->fifo); 1147 1148 pkt->actual += pkt->trans; 1149 1150 if ((pkt->actual == pkt->length) || /* receive all data */ 1151 (pkt->trans < maxp)) { /* short packet */ 1152 *is_done = 1; 1153 usbhs_pipe_running(pipe, 0); 1154 } else { 1155 /* re-enable */ 1156 usbhs_pipe_running(pipe, 0); 1157 usbhsf_prepare_pop(pkt, is_done); 1158 } 1159 1160 return 0; 1161} 1162 1163static size_t usbhs_dma_calc_received_size(struct usbhs_pkt *pkt, 1164 struct dma_chan *chan, int dtln) 1165{ 1166 struct usbhs_pipe *pipe = pkt->pipe; 1167 size_t received_size; 1168 int maxp = usbhs_pipe_get_maxpacket(pipe); 1169 1170 received_size = pkt->length - pkt->dma_result->residue; 1171 1172 if (dtln) { 1173 received_size -= USBHS_USB_DMAC_XFER_SIZE; 1174 received_size &= ~(maxp - 1); 1175 received_size += dtln; 1176 } 1177 1178 return received_size; 1179} 1180 1181static int usbhsf_dma_pop_done_with_usb_dmac(struct usbhs_pkt *pkt, 1182 int *is_done) 1183{ 1184 struct usbhs_pipe *pipe = pkt->pipe; 1185 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 1186 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe); 1187 struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt); 1188 int rcv_len; 1189 1190 /* 1191 * Since the driver disables rx_irq in DMA mode, the interrupt handler 1192 * cannot the BRDYSTS. So, the function clears it here because the 1193 * driver may use PIO mode next time. 1194 */ 1195 usbhs_xxxsts_clear(priv, BRDYSTS, usbhs_pipe_number(pipe)); 1196 1197 rcv_len = usbhsf_fifo_rcv_len(priv, fifo); 1198 usbhsf_fifo_clear(pipe, fifo); 1199 pkt->actual = usbhs_dma_calc_received_size(pkt, chan, rcv_len); 1200 1201 usbhs_pipe_running(pipe, 0); 1202 usbhsf_dma_stop(pipe, fifo); 1203 usbhsf_dma_unmap(pkt); 1204 usbhsf_fifo_unselect(pipe, pipe->fifo); 1205 1206 /* The driver can assume the rx transaction is always "done" */ 1207 *is_done = 1; 1208 1209 return 0; 1210} 1211 1212static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done) 1213{ 1214 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); 1215 1216 if (usbhs_get_dparam(priv, has_usb_dmac)) 1217 return usbhsf_dma_pop_done_with_usb_dmac(pkt, is_done); 1218 else 1219 return usbhsf_dma_pop_done_with_rx_irq(pkt, is_done); 1220} 1221 1222const struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = { 1223 .prepare = usbhsf_dma_prepare_pop, 1224 .try_run = usbhsf_dma_try_pop, 1225 .dma_done = usbhsf_dma_pop_done 1226}; 1227 1228/* 1229 * DMA setting 1230 */ 1231static bool usbhsf_dma_filter(struct dma_chan *chan, void *param) 1232{ 1233 struct sh_dmae_slave *slave = param; 1234 1235 /* 1236 * FIXME 1237 * 1238 * usbhs doesn't recognize id = 0 as valid DMA 1239 */ 1240 if (0 == slave->shdma_slave.slave_id) 1241 return false; 1242 1243 chan->private = slave; 1244 1245 return true; 1246} 1247 1248static void usbhsf_dma_quit(struct usbhs_priv *priv, struct usbhs_fifo *fifo) 1249{ 1250 if (fifo->tx_chan) 1251 dma_release_channel(fifo->tx_chan); 1252 if (fifo->rx_chan) 1253 dma_release_channel(fifo->rx_chan); 1254 1255 fifo->tx_chan = NULL; 1256 fifo->rx_chan = NULL; 1257} 1258 1259static void usbhsf_dma_init_pdev(struct usbhs_fifo *fifo) 1260{ 1261 dma_cap_mask_t mask; 1262 1263 dma_cap_zero(mask); 1264 dma_cap_set(DMA_SLAVE, mask); 1265 fifo->tx_chan = dma_request_channel(mask, usbhsf_dma_filter, 1266 &fifo->tx_slave); 1267 1268 dma_cap_zero(mask); 1269 dma_cap_set(DMA_SLAVE, mask); 1270 fifo->rx_chan = dma_request_channel(mask, usbhsf_dma_filter, 1271 &fifo->rx_slave); 1272} 1273 1274static void usbhsf_dma_init_dt(struct device *dev, struct usbhs_fifo *fifo, 1275 int channel) 1276{ 1277 char name[16]; 1278 1279 /* 1280 * To avoid complex handing for DnFIFOs, the driver uses each 1281 * DnFIFO as TX or RX direction (not bi-direction). 1282 * So, the driver uses odd channels for TX, even channels for RX. 1283 */ 1284 snprintf(name, sizeof(name), "ch%d", channel); 1285 if (channel & 1) { 1286 fifo->tx_chan = dma_request_chan(dev, name); 1287 if (IS_ERR(fifo->tx_chan)) 1288 fifo->tx_chan = NULL; 1289 } else { 1290 fifo->rx_chan = dma_request_chan(dev, name); 1291 if (IS_ERR(fifo->rx_chan)) 1292 fifo->rx_chan = NULL; 1293 } 1294} 1295 1296static void usbhsf_dma_init(struct usbhs_priv *priv, struct usbhs_fifo *fifo, 1297 int channel) 1298{ 1299 struct device *dev = usbhs_priv_to_dev(priv); 1300 1301 if (dev_of_node(dev)) 1302 usbhsf_dma_init_dt(dev, fifo, channel); 1303 else 1304 usbhsf_dma_init_pdev(fifo); 1305 1306 if (fifo->tx_chan || fifo->rx_chan) 1307 dev_dbg(dev, "enable DMAEngine (%s%s%s)\n", 1308 fifo->name, 1309 fifo->tx_chan ? "[TX]" : " ", 1310 fifo->rx_chan ? "[RX]" : " "); 1311} 1312 1313/* 1314 * irq functions 1315 */ 1316static int usbhsf_irq_empty(struct usbhs_priv *priv, 1317 struct usbhs_irq_state *irq_state) 1318{ 1319 struct usbhs_pipe *pipe; 1320 struct device *dev = usbhs_priv_to_dev(priv); 1321 int i, ret; 1322 1323 if (!irq_state->bempsts) { 1324 dev_err(dev, "debug %s !!\n", __func__); 1325 return -EIO; 1326 } 1327 1328 dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts); 1329 1330 /* 1331 * search interrupted "pipe" 1332 * not "uep". 1333 */ 1334 usbhs_for_each_pipe_with_dcp(pipe, priv, i) { 1335 if (!(irq_state->bempsts & (1 << i))) 1336 continue; 1337 1338 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN); 1339 if (ret < 0) 1340 dev_err(dev, "irq_empty run_error %d : %d\n", i, ret); 1341 } 1342 1343 return 0; 1344} 1345 1346static int usbhsf_irq_ready(struct usbhs_priv *priv, 1347 struct usbhs_irq_state *irq_state) 1348{ 1349 struct usbhs_pipe *pipe; 1350 struct device *dev = usbhs_priv_to_dev(priv); 1351 int i, ret; 1352 1353 if (!irq_state->brdysts) { 1354 dev_err(dev, "debug %s !!\n", __func__); 1355 return -EIO; 1356 } 1357 1358 dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts); 1359 1360 /* 1361 * search interrupted "pipe" 1362 * not "uep". 1363 */ 1364 usbhs_for_each_pipe_with_dcp(pipe, priv, i) { 1365 if (!(irq_state->brdysts & (1 << i))) 1366 continue; 1367 1368 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN); 1369 if (ret < 0) 1370 dev_err(dev, "irq_ready run_error %d : %d\n", i, ret); 1371 } 1372 1373 return 0; 1374} 1375 1376static void usbhsf_dma_complete(void *arg, 1377 const struct dmaengine_result *result) 1378{ 1379 struct usbhs_pkt *pkt = arg; 1380 struct usbhs_pipe *pipe = pkt->pipe; 1381 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 1382 struct device *dev = usbhs_priv_to_dev(priv); 1383 int ret; 1384 1385 pkt->dma_result = result; 1386 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_DMA_DONE); 1387 if (ret < 0) 1388 dev_err(dev, "dma_complete run_error %d : %d\n", 1389 usbhs_pipe_number(pipe), ret); 1390} 1391 1392void usbhs_fifo_clear_dcp(struct usbhs_pipe *pipe) 1393{ 1394 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 1395 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ 1396 1397 /* clear DCP FIFO of transmission */ 1398 if (usbhsf_fifo_select(pipe, fifo, 1) < 0) 1399 return; 1400 usbhsf_fifo_clear(pipe, fifo); 1401 usbhsf_fifo_unselect(pipe, fifo); 1402 1403 /* clear DCP FIFO of reception */ 1404 if (usbhsf_fifo_select(pipe, fifo, 0) < 0) 1405 return; 1406 usbhsf_fifo_clear(pipe, fifo); 1407 usbhsf_fifo_unselect(pipe, fifo); 1408} 1409 1410/* 1411 * fifo init 1412 */ 1413void usbhs_fifo_init(struct usbhs_priv *priv) 1414{ 1415 struct usbhs_mod *mod = usbhs_mod_get_current(priv); 1416 struct usbhs_fifo *cfifo = usbhsf_get_cfifo(priv); 1417 struct usbhs_fifo *dfifo; 1418 int i; 1419 1420 mod->irq_empty = usbhsf_irq_empty; 1421 mod->irq_ready = usbhsf_irq_ready; 1422 mod->irq_bempsts = 0; 1423 mod->irq_brdysts = 0; 1424 1425 cfifo->pipe = NULL; 1426 usbhs_for_each_dfifo(priv, dfifo, i) 1427 dfifo->pipe = NULL; 1428} 1429 1430void usbhs_fifo_quit(struct usbhs_priv *priv) 1431{ 1432 struct usbhs_mod *mod = usbhs_mod_get_current(priv); 1433 1434 mod->irq_empty = NULL; 1435 mod->irq_ready = NULL; 1436 mod->irq_bempsts = 0; 1437 mod->irq_brdysts = 0; 1438} 1439 1440#define __USBHS_DFIFO_INIT(priv, fifo, channel, fifo_port) \ 1441do { \ 1442 fifo = usbhsf_get_dnfifo(priv, channel); \ 1443 fifo->name = "D"#channel"FIFO"; \ 1444 fifo->port = fifo_port; \ 1445 fifo->sel = D##channel##FIFOSEL; \ 1446 fifo->ctr = D##channel##FIFOCTR; \ 1447 fifo->tx_slave.shdma_slave.slave_id = \ 1448 usbhs_get_dparam(priv, d##channel##_tx_id); \ 1449 fifo->rx_slave.shdma_slave.slave_id = \ 1450 usbhs_get_dparam(priv, d##channel##_rx_id); \ 1451 usbhsf_dma_init(priv, fifo, channel); \ 1452} while (0) 1453 1454#define USBHS_DFIFO_INIT(priv, fifo, channel) \ 1455 __USBHS_DFIFO_INIT(priv, fifo, channel, D##channel##FIFO) 1456#define USBHS_DFIFO_INIT_NO_PORT(priv, fifo, channel) \ 1457 __USBHS_DFIFO_INIT(priv, fifo, channel, 0) 1458 1459int usbhs_fifo_probe(struct usbhs_priv *priv) 1460{ 1461 struct usbhs_fifo *fifo; 1462 1463 /* CFIFO */ 1464 fifo = usbhsf_get_cfifo(priv); 1465 fifo->name = "CFIFO"; 1466 fifo->port = CFIFO; 1467 fifo->sel = CFIFOSEL; 1468 fifo->ctr = CFIFOCTR; 1469 1470 /* DFIFO */ 1471 USBHS_DFIFO_INIT(priv, fifo, 0); 1472 USBHS_DFIFO_INIT(priv, fifo, 1); 1473 USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 2); 1474 USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 3); 1475 1476 return 0; 1477} 1478 1479void usbhs_fifo_remove(struct usbhs_priv *priv) 1480{ 1481 struct usbhs_fifo *fifo; 1482 int i; 1483 1484 usbhs_for_each_dfifo(priv, fifo, i) 1485 usbhsf_dma_quit(priv, fifo); 1486} 1487