1169695Skan/* SPDX-License-Identifier: GPL-2.0 */ 2169695Skan/* 3169695Skan * MUSB OTG driver DMA controller abstraction 4169695Skan * 5169695Skan * Copyright 2005 Mentor Graphics Corporation 6169695Skan * Copyright (C) 2005-2006 by Texas Instruments 7169695Skan * Copyright (C) 2006-2007 Nokia Corporation 8169695Skan */ 9169695Skan 10169695Skan#ifndef __MUSB_DMA_H__ 11169695Skan#define __MUSB_DMA_H__ 12169695Skan 13169695Skanstruct musb_hw_ep; 14169695Skan 15169695Skan/* 16169695Skan * DMA Controller Abstraction 17169695Skan * 18169695Skan * DMA Controllers are abstracted to allow use of a variety of different 19169695Skan * implementations of DMA, as allowed by the Inventra USB cores. On the 20169695Skan * host side, usbcore sets up the DMA mappings and flushes caches; on the 21169695Skan * peripheral side, the gadget controller driver does. Responsibilities 22169695Skan * of a DMA controller driver include: 23169695Skan * 24169695Skan * - Handling the details of moving multiple USB packets 25169695Skan * in cooperation with the Inventra USB core, including especially 26169695Skan * the correct RX side treatment of short packets and buffer-full 27169695Skan * states (both of which terminate transfers). 28169695Skan * 29169695Skan * - Knowing the correlation between dma channels and the 30169695Skan * Inventra core's local endpoint resources and data direction. 31169695Skan * 32169695Skan * - Maintaining a list of allocated/available channels. 33169695Skan * 34169695Skan * - Updating channel status on interrupts, 35169695Skan * whether shared with the Inventra core or separate. 36169695Skan */ 37169695Skan 38169695Skan#define MUSB_HSDMA_BASE 0x200 39169695Skan#define MUSB_HSDMA_INTR (MUSB_HSDMA_BASE + 0) 40169695Skan#define MUSB_HSDMA_CONTROL 0x4 41169695Skan#define MUSB_HSDMA_ADDRESS 0x8 42169695Skan#define MUSB_HSDMA_COUNT 0xc 43169695Skan 44169695Skan#define DMA_ADDR_INVALID (~(dma_addr_t)0) 45169695Skan 46169695Skan#ifdef CONFIG_MUSB_PIO_ONLY 47169695Skan#define is_dma_capable() (0) 48169695Skan#else 49169695Skan#define is_dma_capable() (1) 50169695Skan#endif 51169695Skan 52169695Skan#ifdef CONFIG_USB_UX500_DMA 53169695Skan#define musb_dma_ux500(musb) (musb->ops->quirks & MUSB_DMA_UX500) 54169695Skan#else 55169695Skan#define musb_dma_ux500(musb) 0 56169695Skan#endif 57169695Skan 58169695Skan#ifdef CONFIG_USB_TI_CPPI41_DMA 59169695Skan#define musb_dma_cppi41(musb) (musb->ops->quirks & MUSB_DMA_CPPI41) 60169695Skan#else 61169695Skan#define musb_dma_cppi41(musb) 0 62169695Skan#endif 63169695Skan 64169695Skan#ifdef CONFIG_USB_TUSB_OMAP_DMA 65169695Skan#define tusb_dma_omap(musb) (musb->ops->quirks & MUSB_DMA_TUSB_OMAP) 66169695Skan#else 67169695Skan#define tusb_dma_omap(musb) 0 68169695Skan#endif 69169695Skan 70169695Skan#ifdef CONFIG_USB_INVENTRA_DMA 71169695Skan#define musb_dma_inventra(musb) (musb->ops->quirks & MUSB_DMA_INVENTRA) 72169695Skan#else 73169695Skan#define musb_dma_inventra(musb) 0 74169695Skan#endif 75169695Skan 76169695Skan#if defined(CONFIG_USB_TI_CPPI41_DMA) 77169695Skan#define is_cppi_enabled(musb) musb_dma_cppi41(musb) 78169695Skan#else 79169695Skan#define is_cppi_enabled(musb) 0 80169695Skan#endif 81169695Skan 82169695Skan/* 83169695Skan * DMA channel status ... updated by the dma controller driver whenever that 84169695Skan * status changes, and protected by the overall controller spinlock. 85169695Skan */ 86169695Skanenum dma_channel_status { 87169695Skan /* unallocated */ 88169695Skan MUSB_DMA_STATUS_UNKNOWN, 89169695Skan /* allocated ... but not busy, no errors */ 90169695Skan MUSB_DMA_STATUS_FREE, 91169695Skan /* busy ... transactions are active */ 92169695Skan MUSB_DMA_STATUS_BUSY, 93169695Skan /* transaction(s) aborted due to ... dma or memory bus error */ 94169695Skan MUSB_DMA_STATUS_BUS_ABORT, 95169695Skan /* transaction(s) aborted due to ... core error or USB fault */ 96169695Skan MUSB_DMA_STATUS_CORE_ABORT 97169695Skan}; 98169695Skan 99169695Skanstruct dma_controller; 100169695Skan 101169695Skan/** 102169695Skan * struct dma_channel - A DMA channel. 103169695Skan * @private_data: channel-private data 104169695Skan * @max_len: the maximum number of bytes the channel can move in one 105169695Skan * transaction (typically representing many USB maximum-sized packets) 106169695Skan * @actual_len: how many bytes have been transferred 107169695Skan * @status: current channel status (updated e.g. on interrupt) 108169695Skan * @desired_mode: true if mode 1 is desired; false if mode 0 is desired 109169695Skan * 110169695Skan * channels are associated with an endpoint for the duration of at least 111169695Skan * one usb transfer. 112169695Skan */ 113169695Skanstruct dma_channel { 114169695Skan void *private_data; 115169695Skan /* FIXME not void* private_data, but a dma_controller * */ 116169695Skan size_t max_len; 117169695Skan size_t actual_len; 118169695Skan enum dma_channel_status status; 119169695Skan bool desired_mode; 120169695Skan bool rx_packet_done; 121169695Skan}; 122169695Skan 123169695Skan/* 124169695Skan * dma_channel_status - return status of dma channel 125169695Skan * @c: the channel 126169695Skan * 127169695Skan * Returns the software's view of the channel status. If that status is BUSY 128169695Skan * then it's possible that the hardware has completed (or aborted) a transfer, 129169695Skan * so the driver needs to update that status. 130169695Skan */ 131169695Skanstatic inline enum dma_channel_status 132169695Skandma_channel_status(struct dma_channel *c) 133169695Skan{ 134169695Skan return (is_dma_capable() && c) ? c->status : MUSB_DMA_STATUS_UNKNOWN; 135169695Skan} 136169695Skan 137/** 138 * struct dma_controller - A DMA Controller. 139 * @musb: the usb controller 140 * @start: call this to start a DMA controller; 141 * return 0 on success, else negative errno 142 * @stop: call this to stop a DMA controller 143 * return 0 on success, else negative errno 144 * @channel_alloc: call this to allocate a DMA channel 145 * @channel_release: call this to release a DMA channel 146 * @channel_abort: call this to abort a pending DMA transaction, 147 * returning it to FREE (but allocated) state 148 * @dma_callback: invoked on DMA completion, useful to run platform 149 * code such IRQ acknowledgment. 150 * 151 * Controllers manage dma channels. 152 */ 153struct dma_controller { 154 struct musb *musb; 155 struct dma_channel *(*channel_alloc)(struct dma_controller *, 156 struct musb_hw_ep *, u8 is_tx); 157 void (*channel_release)(struct dma_channel *); 158 int (*channel_program)(struct dma_channel *channel, 159 u16 maxpacket, u8 mode, 160 dma_addr_t dma_addr, 161 u32 length); 162 int (*channel_abort)(struct dma_channel *); 163 int (*is_compatible)(struct dma_channel *channel, 164 u16 maxpacket, 165 void *buf, u32 length); 166 void (*dma_callback)(struct dma_controller *); 167}; 168 169/* called after channel_program(), may indicate a fault */ 170extern void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit); 171 172#ifdef CONFIG_MUSB_PIO_ONLY 173static inline struct dma_controller * 174musb_dma_controller_create(struct musb *m, void __iomem *io) 175{ 176 return NULL; 177} 178 179static inline void musb_dma_controller_destroy(struct dma_controller *d) { } 180 181#else 182 183extern struct dma_controller * 184(*musb_dma_controller_create)(struct musb *, void __iomem *); 185 186extern void (*musb_dma_controller_destroy)(struct dma_controller *); 187#endif 188 189/* Platform specific DMA functions */ 190extern struct dma_controller * 191musbhs_dma_controller_create(struct musb *musb, void __iomem *base); 192extern void musbhs_dma_controller_destroy(struct dma_controller *c); 193extern struct dma_controller * 194musbhs_dma_controller_create_noirq(struct musb *musb, void __iomem *base); 195extern irqreturn_t dma_controller_irq(int irq, void *private_data); 196 197extern struct dma_controller * 198tusb_dma_controller_create(struct musb *musb, void __iomem *base); 199extern void tusb_dma_controller_destroy(struct dma_controller *c); 200 201extern struct dma_controller * 202cppi41_dma_controller_create(struct musb *musb, void __iomem *base); 203extern void cppi41_dma_controller_destroy(struct dma_controller *c); 204 205extern struct dma_controller * 206ux500_dma_controller_create(struct musb *musb, void __iomem *base); 207extern void ux500_dma_controller_destroy(struct dma_controller *c); 208 209#endif /* __MUSB_DMA_H__ */ 210