1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Support for Intel Camera Imaging ISP subsystem.
4 * Copyright (c) 2015, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13 * more details.
14 */
15
16#ifndef __INPUT_FORMATTER_GLOBAL_H_INCLUDED__
17#define __INPUT_FORMATTER_GLOBAL_H_INCLUDED__
18
19#define IS_INPUT_FORMATTER_VERSION2
20#define IS_INPUT_SWITCH_VERSION2
21
22#include <type_support.h>
23#include <system_local.h>
24#include "if_defs.h"
25#include "str2mem_defs.h"
26#include "input_switch_2400_defs.h"
27
28#define _HIVE_INPUT_SWITCH_GET_FSYNC_REG_LSB(ch_id)        ((ch_id) * 3)
29
30#define HIVE_SWITCH_N_CHANNELS				4
31#define HIVE_SWITCH_N_FORMATTYPES			32
32#define HIVE_SWITCH_N_SWITCH_CODE			4
33#define HIVE_SWITCH_M_CHANNELS				0x00000003
34#define HIVE_SWITCH_M_FORMATTYPES			0x0000001f
35#define HIVE_SWITCH_M_SWITCH_CODE			0x00000003
36#define HIVE_SWITCH_M_FSYNC					0x00000007
37
38#define HIVE_SWITCH_ENCODE_FSYNC(x) \
39	(1U << (((x) - 1) & HIVE_SWITCH_M_CHANNELS))
40
41#define _HIVE_INPUT_SWITCH_GET_LUT_FIELD(reg, bit_index) \
42	(((reg) >> (bit_index)) & HIVE_SWITCH_M_SWITCH_CODE)
43#define _HIVE_INPUT_SWITCH_SET_LUT_FIELD(reg, bit_index, val) \
44	(((reg) & ~(HIVE_SWITCH_M_SWITCH_CODE << (bit_index))) | (((hrt_data)(val) & HIVE_SWITCH_M_SWITCH_CODE) << (bit_index)))
45#define _HIVE_INPUT_SWITCH_GET_FSYNC_FIELD(reg, bit_index) \
46	(((reg) >> (bit_index)) & HIVE_SWITCH_M_FSYNC)
47#define _HIVE_INPUT_SWITCH_SET_FSYNC_FIELD(reg, bit_index, val) \
48	(((reg) & ~(HIVE_SWITCH_M_FSYNC << (bit_index))) | (((hrt_data)(val) & HIVE_SWITCH_M_FSYNC) << (bit_index)))
49
50typedef struct input_formatter_cfg_s	input_formatter_cfg_t;
51
52/* Hardware registers */
53/*#define HIVE_IF_RESET_ADDRESS                   0x000*/ /* deprecated */
54#define HIVE_IF_START_LINE_ADDRESS              0x004
55#define HIVE_IF_START_COLUMN_ADDRESS            0x008
56#define HIVE_IF_CROPPED_HEIGHT_ADDRESS          0x00C
57#define HIVE_IF_CROPPED_WIDTH_ADDRESS           0x010
58#define HIVE_IF_VERTICAL_DECIMATION_ADDRESS     0x014
59#define HIVE_IF_HORIZONTAL_DECIMATION_ADDRESS   0x018
60#define HIVE_IF_H_DEINTERLEAVING_ADDRESS        0x01C
61#define HIVE_IF_LEFTPADDING_WIDTH_ADDRESS       0x020
62#define HIVE_IF_END_OF_LINE_OFFSET_ADDRESS      0x024
63#define HIVE_IF_VMEM_START_ADDRESS_ADDRESS      0x028
64#define HIVE_IF_VMEM_END_ADDRESS_ADDRESS        0x02C
65#define HIVE_IF_VMEM_INCREMENT_ADDRESS          0x030
66#define HIVE_IF_YUV_420_FORMAT_ADDRESS          0x034
67#define HIVE_IF_VSYNCK_ACTIVE_LOW_ADDRESS       0x038
68#define HIVE_IF_HSYNCK_ACTIVE_LOW_ADDRESS       0x03C
69#define HIVE_IF_ALLOW_FIFO_OVERFLOW_ADDRESS     0x040
70#define HIVE_IF_BLOCK_FIFO_NO_REQ_ADDRESS       0x044
71#define HIVE_IF_V_DEINTERLEAVING_ADDRESS        0x048
72#define HIVE_IF_FSM_CROP_PIXEL_COUNTER          0x110
73#define HIVE_IF_FSM_CROP_LINE_COUNTER           0x10C
74#define HIVE_IF_FSM_CROP_STATUS                 0x108
75
76/* Registers only for simulation */
77#define HIVE_IF_CRUN_MODE_ADDRESS               0x04C
78#define HIVE_IF_DUMP_OUTPUT_ADDRESS             0x050
79
80/* Follow the DMA syntax, "cmd" last */
81#define IF_PACK(val, cmd)             ((val & 0x0fff) | (cmd /*& 0xf000*/))
82
83#define HIVE_STR2MEM_SOFT_RESET_REG_ADDRESS                   (_STR2MEM_SOFT_RESET_REG_ID * _STR2MEM_REG_ALIGN)
84#define HIVE_STR2MEM_INPUT_ENDIANNESS_REG_ADDRESS             (_STR2MEM_INPUT_ENDIANNESS_REG_ID * _STR2MEM_REG_ALIGN)
85#define HIVE_STR2MEM_OUTPUT_ENDIANNESS_REG_ADDRESS            (_STR2MEM_OUTPUT_ENDIANNESS_REG_ID * _STR2MEM_REG_ALIGN)
86#define HIVE_STR2MEM_BIT_SWAPPING_REG_ADDRESS                 (_STR2MEM_BIT_SWAPPING_REG_ID * _STR2MEM_REG_ALIGN)
87#define HIVE_STR2MEM_BLOCK_SYNC_LEVEL_REG_ADDRESS             (_STR2MEM_BLOCK_SYNC_LEVEL_REG_ID * _STR2MEM_REG_ALIGN)
88#define HIVE_STR2MEM_PACKET_SYNC_LEVEL_REG_ADDRESS            (_STR2MEM_PACKET_SYNC_LEVEL_REG_ID * _STR2MEM_REG_ALIGN)
89#define HIVE_STR2MEM_READ_POST_WRITE_SYNC_ENABLE_REG_ADDRESS  (_STR2MEM_READ_POST_WRITE_SYNC_ENABLE_REG_ID * _STR2MEM_REG_ALIGN)
90#define HIVE_STR2MEM_DUAL_BYTE_INPUTS_ENABLED_REG_ADDRESS     (_STR2MEM_DUAL_BYTE_INPUTS_ENABLED_REG_ID * _STR2MEM_REG_ALIGN)
91#define HIVE_STR2MEM_EN_STAT_UPDATE_ADDRESS                   (_STR2MEM_EN_STAT_UPDATE_ID * _STR2MEM_REG_ALIGN)
92
93/*
94 * This data structure is shared between host and SP
95 */
96struct input_formatter_cfg_s {
97	u32	start_line;
98	u32	start_column;
99	u32	left_padding;
100	u32	cropped_height;
101	u32	cropped_width;
102	u32	deinterleaving;
103	u32	buf_vecs;
104	u32	buf_start_index;
105	u32	buf_increment;
106	u32	buf_eol_offset;
107	u32	is_yuv420_format;
108	u32	block_no_reqs;
109};
110
111extern const hrt_address HIVE_IF_SRST_ADDRESS[N_INPUT_FORMATTER_ID];
112extern const hrt_data HIVE_IF_SRST_MASK[N_INPUT_FORMATTER_ID];
113extern const u8 HIVE_IF_SWITCH_CODE[N_INPUT_FORMATTER_ID];
114
115#endif /* __INPUT_FORMATTER_GLOBAL_H_INCLUDED__ */
116