184121Sdfr/* SPDX-License-Identifier: GPL-2.0 */
284121Sdfr/*
384121Sdfr * Support for Intel Camera Imaging ISP subsystem.
484121Sdfr * Copyright (c) 2015, Intel Corporation.
584121Sdfr *
684121Sdfr * This program is free software; you can redistribute it and/or modify it
784121Sdfr * under the terms and conditions of the GNU General Public License,
884121Sdfr * version 2, as published by the Free Software Foundation.
984121Sdfr *
1084121Sdfr * This program is distributed in the hope it will be useful, but WITHOUT
1184121Sdfr * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1284121Sdfr * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
1384121Sdfr * more details.
1484121Sdfr */
1584121Sdfr
1684121Sdfr#ifndef __ISYS_DMA_GLOBAL_H_INCLUDED__
1784121Sdfr#define __ISYS_DMA_GLOBAL_H_INCLUDED__
1884121Sdfr
1984121Sdfr#include <type_support.h>
2084121Sdfr
2184121Sdfr#define HIVE_ISYS2401_DMA_IBUF_DDR_CONN	0
2284121Sdfr#define HIVE_ISYS2401_DMA_IBUF_VMEM_CONN	1
2384121Sdfr#define _DMA_V2_ZERO_EXTEND		0
2484121Sdfr#define _DMA_V2_SIGN_EXTEND		1
2584121Sdfr
2684121Sdfr#define _DMA_ZERO_EXTEND     _DMA_V2_ZERO_EXTEND
27135453Smarcel#define _DMA_SIGN_EXTEND     _DMA_V2_SIGN_EXTEND
28135453Smarcel
29135453Smarcel/********************************************************
3084121Sdfr *
3184121Sdfr * DMA Port.
32205234Smarcel *
3395245Smarcel * The DMA port definition for the input system
3495245Smarcel * 2401 DMA is the duplication of the DMA port
3595245Smarcel * definition for the CSS system DMA. It is duplicated
3695245Smarcel * here just as the temporal step before the device library
37135453Smarcel * is available. The device library is suppose to provide
38205234Smarcel * the capability of reusing the control interface of the
3996061Smarcel * same device prototypes. The refactor team will work on
4084121Sdfr * this, right?
4185656Smarcel *
4284121Sdfr ********************************************************/
43205234Smarceltypedef struct isys2401_dma_port_cfg_s isys2401_dma_port_cfg_t;
4496442Smarcelstruct isys2401_dma_port_cfg_s {
4584121Sdfr	u32 stride;
4684121Sdfr	u32 elements;
4784121Sdfr	u32 cropping;
4884121Sdfr	u32 width;
4984121Sdfr};
5084121Sdfr
51135453Smarcel/* end of DMA Port */
52135453Smarcel
53135453Smarcel/************************************************
5484121Sdfr *
5584121Sdfr * DMA Device.
5684121Sdfr *
5784121Sdfr * The DMA device definition for the input system
5884121Sdfr * 2401 DMA is the duplicattion of the DMA device
5984121Sdfr * definition for the CSS system DMA. It is duplicated
6084121Sdfr * here just as the temporal step before the device library
6184121Sdfr * is available. The device library is suppose to provide
6284121Sdfr * the capability of reusing the control interface of the
6384121Sdfr * same device prototypes. The refactor team will work on
6484121Sdfr * this, right?
6584121Sdfr *
6684121Sdfr ************************************************/
67135453Smarceltypedef enum {
6884121Sdfr	isys2401_dma_ibuf_to_ddr_connection	= HIVE_ISYS2401_DMA_IBUF_DDR_CONN,
6984121Sdfr	isys2401_dma_ibuf_to_vmem_connection	= HIVE_ISYS2401_DMA_IBUF_VMEM_CONN
7084121Sdfr} isys2401_dma_connection;
7184121Sdfr
7284121Sdfrtypedef enum {
73205234Smarcel	isys2401_dma_zero_extension = _DMA_ZERO_EXTEND,
7484121Sdfr	isys2401_dma_sign_extension = _DMA_SIGN_EXTEND
75135453Smarcel} isys2401_dma_extension;
76135453Smarcel
77135453Smarceltypedef struct isys2401_dma_cfg_s isys2401_dma_cfg_t;
78135453Smarcelstruct isys2401_dma_cfg_s {
79183299Sobrien	isys2401_dma_channel	channel;
8084121Sdfr	isys2401_dma_connection	connection;
8184121Sdfr	isys2401_dma_extension	extension;
8284121Sdfr	u32		height;
8384121Sdfr};
84135453Smarcel
85135453Smarcel/* end of DMA Device */
8685211Smarcel
8785211Smarcel/* isys2401_dma_channel limits per DMA ID */
8884121Sdfrextern const isys2401_dma_channel
8985211SmarcelN_ISYS2401_DMA_CHANNEL_PROCS[N_ISYS2401_DMA_ID];
9085211Smarcel
9184121Sdfr#endif /* __ISYS_DMA_GLOBAL_H_INCLUDED__ */
9284121Sdfr