1/* SPDX-License-Identifier: GPL-2.0-only */
2
3#ifndef __SOC_MEDIATEK_MT8183_MMSYS_H
4#define __SOC_MEDIATEK_MT8183_MMSYS_H
5
6#define MT8183_DISP_OVL0_MOUT_EN		0xf00
7#define MT8183_DISP_OVL0_2L_MOUT_EN		0xf04
8#define MT8183_DISP_OVL1_2L_MOUT_EN		0xf08
9#define MT8183_DISP_DITHER0_MOUT_EN		0xf0c
10#define MT8183_DISP_PATH0_SEL_IN		0xf24
11#define MT8183_DISP_DSI0_SEL_IN			0xf2c
12#define MT8183_DISP_DPI0_SEL_IN			0xf30
13#define MT8183_DISP_RDMA0_SOUT_SEL_IN		0xf50
14#define MT8183_DISP_RDMA1_SOUT_SEL_IN		0xf54
15
16#define MT8183_OVL0_MOUT_EN_OVL0_2L		BIT(4)
17#define MT8183_OVL0_2L_MOUT_EN_DISP_PATH0	BIT(0)
18#define MT8183_OVL1_2L_MOUT_EN_RDMA1		BIT(4)
19#define MT8183_DITHER0_MOUT_IN_DSI0		BIT(0)
20#define MT8183_DISP_PATH0_SEL_IN_OVL0_2L	0x1
21#define MT8183_DSI0_SEL_IN_RDMA0		0x1
22#define MT8183_DSI0_SEL_IN_RDMA1		0x3
23#define MT8183_DPI0_SEL_IN_RDMA0		0x1
24#define MT8183_DPI0_SEL_IN_RDMA1		0x2
25#define MT8183_RDMA0_SOUT_COLOR0		0x1
26#define MT8183_RDMA1_SOUT_DSI0			0x1
27
28#define MT8183_MMSYS_SW0_RST_B			0x140
29
30static const struct mtk_mmsys_routes mmsys_mt8183_routing_table[] = {
31	{
32		DDP_COMPONENT_OVL0, DDP_COMPONENT_OVL_2L0,
33		MT8183_DISP_OVL0_MOUT_EN, MT8183_OVL0_MOUT_EN_OVL0_2L,
34		MT8183_OVL0_MOUT_EN_OVL0_2L
35	}, {
36		DDP_COMPONENT_OVL_2L0, DDP_COMPONENT_RDMA0,
37		MT8183_DISP_OVL0_2L_MOUT_EN, MT8183_OVL0_2L_MOUT_EN_DISP_PATH0,
38		MT8183_OVL0_2L_MOUT_EN_DISP_PATH0
39	}, {
40		DDP_COMPONENT_OVL_2L1, DDP_COMPONENT_RDMA1,
41		MT8183_DISP_OVL1_2L_MOUT_EN, MT8183_OVL1_2L_MOUT_EN_RDMA1,
42		MT8183_OVL1_2L_MOUT_EN_RDMA1
43	}, {
44		DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
45		MT8183_DISP_DITHER0_MOUT_EN, MT8183_DITHER0_MOUT_IN_DSI0,
46		MT8183_DITHER0_MOUT_IN_DSI0
47	}, {
48		DDP_COMPONENT_OVL_2L0, DDP_COMPONENT_RDMA0,
49		MT8183_DISP_PATH0_SEL_IN, MT8183_DISP_PATH0_SEL_IN_OVL0_2L,
50		MT8183_DISP_PATH0_SEL_IN_OVL0_2L
51	}, {
52		DDP_COMPONENT_RDMA1, DDP_COMPONENT_DPI0,
53		MT8183_DISP_DPI0_SEL_IN, MT8183_DPI0_SEL_IN_RDMA1,
54		MT8183_DPI0_SEL_IN_RDMA1
55	}, {
56		DDP_COMPONENT_RDMA0, DDP_COMPONENT_COLOR0,
57		MT8183_DISP_RDMA0_SOUT_SEL_IN, MT8183_RDMA0_SOUT_COLOR0,
58		MT8183_RDMA0_SOUT_COLOR0
59	}
60};
61
62#endif /* __SOC_MEDIATEK_MT8183_MMSYS_H */
63
64