1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _AHA1740_H
3
4/* $Id$
5 *
6 * Header file for the adaptec 1740 driver for Linux
7 *
8 * With minor revisions 3/31/93
9 * Written and (C) 1992,1993 Brad McLean.  See aha1740.c
10 * for more info
11 *
12 */
13
14#include <linux/types.h>
15
16#define SLOTSIZE	0x5c
17
18/* EISA configuration registers & values */
19#define	HID0(base)	(base + 0x0)
20#define	HID1(base)	(base + 0x1)
21#define HID2(base)	(base + 0x2)
22#define	HID3(base)	(base + 0x3)
23#define	EBCNTRL(base)	(base + 0x4)
24#define	PORTADR(base)	(base + 0x40)
25#define BIOSADR(base)	(base + 0x41)
26#define INTDEF(base)	(base + 0x42)
27#define SCSIDEF(base)	(base + 0x43)
28#define BUSDEF(base)	(base + 0x44)
29#define	RESV0(base)	(base + 0x45)
30#define RESV1(base)	(base + 0x46)
31#define	RESV2(base)	(base + 0x47)
32
33#define	HID_MFG	"ADP"
34#define	HID_PRD 0
35#define HID_REV 2
36#define EBCNTRL_VALUE 1
37#define PORTADDR_ENH 0x80
38/* READ */
39#define	G2INTST(base)	(base + 0x56)
40#define G2STAT(base)	(base + 0x57)
41#define	MBOXIN0(base)	(base + 0x58)
42#define	MBOXIN1(base)	(base + 0x59)
43#define	MBOXIN2(base)	(base + 0x5a)
44#define	MBOXIN3(base)	(base + 0x5b)
45#define G2STAT2(base)	(base + 0x5c)
46
47#define G2INTST_MASK		0xf0	/* isolate the status */
48#define	G2INTST_CCBGOOD		0x10	/* CCB Completed */
49#define	G2INTST_CCBRETRY	0x50	/* CCB Completed with a retry */
50#define	G2INTST_HARDFAIL	0x70	/* Adapter Hardware Failure */
51#define	G2INTST_CMDGOOD		0xa0	/* Immediate command success */
52#define G2INTST_CCBERROR	0xc0	/* CCB Completed with error */
53#define	G2INTST_ASNEVENT	0xd0	/* Asynchronous Event Notification */
54#define	G2INTST_CMDERROR	0xe0	/* Immediate command error */
55
56#define G2STAT_MBXOUT	4	/* Mailbox Out Empty Bit */
57#define	G2STAT_INTPEND	2	/* Interrupt Pending Bit */
58#define	G2STAT_BUSY	1	/* Busy Bit (attention pending) */
59
60#define G2STAT2_READY	0	/* Host Ready Bit */
61
62/* WRITE (and ReadBack) */
63#define	MBOXOUT0(base)	(base + 0x50)
64#define	MBOXOUT1(base)	(base + 0x51)
65#define	MBOXOUT2(base)	(base + 0x52)
66#define	MBOXOUT3(base)	(base + 0x53)
67#define	ATTN(base)	(base + 0x54)
68#define G2CNTRL(base)	(base + 0x55)
69
70#define	ATTN_IMMED	0x10	/* Immediate Command */
71#define	ATTN_START	0x40	/* Start CCB */
72#define	ATTN_ABORT	0x50	/* Abort CCB */
73
74#define G2CNTRL_HRST	0x80	/* Hard Reset */
75#define G2CNTRL_IRST	0x40	/* Clear EISA Interrupt */
76#define G2CNTRL_HRDY	0x20	/* Sets HOST ready */
77
78/* This is used with scatter-gather */
79struct aha1740_chain {
80	u32 dataptr;		/* Location of data */
81	u32 datalen;		/* Size of this part of chain */
82};
83
84/* These belong in scsi.h */
85#define any2scsi(up, p)				\
86(up)[0] = (((unsigned long)(p)) >> 16)  ;	\
87(up)[1] = (((unsigned long)(p)) >> 8);		\
88(up)[2] = ((unsigned long)(p));
89
90#define scsi2int(up) ( (((long)*(up)) << 16) + (((long)(up)[1]) << 8) + ((long)(up)[2]) )
91
92#define xany2scsi(up, p)	\
93(up)[0] = ((long)(p)) >> 24;	\
94(up)[1] = ((long)(p)) >> 16;	\
95(up)[2] = ((long)(p)) >> 8;	\
96(up)[3] = ((long)(p));
97
98#define xscsi2int(up) ( (((long)(up)[0]) << 24) + (((long)(up)[1]) << 16) \
99		      + (((long)(up)[2]) <<  8) +  ((long)(up)[3]) )
100
101#define MAX_CDB 12
102#define MAX_SENSE 14
103#define MAX_STATUS 32
104
105struct ecb {			/* Enhanced Control Block 6.1 */
106	u16 cmdw;		/* Command Word */
107	/* Flag Word 1 */
108	u16 cne:1,		/* Control Block Chaining */
109	:6, di:1,		/* Disable Interrupt */
110	:2, ses:1,		/* Suppress Underrun error */
111	:1, sg:1,		/* Scatter/Gather */
112	:1, dsb:1,		/* Disable Status Block */
113	 ars:1;			/* Automatic Request Sense */
114	/* Flag Word 2 */
115	u16 lun:3,		/* Logical Unit */
116	 tag:1,			/* Tagged Queuing */
117	 tt:2,			/* Tag Type */
118	 nd:1,			/* No Disconnect */
119	:1, dat:1,		/* Data transfer - check direction */
120	 dir:1,			/* Direction of transfer 1 = datain */
121	 st:1,			/* Suppress Transfer */
122	 chk:1,			/* Calculate Checksum */
123	:2, rec:1,:1;		/* Error Recovery */
124	u16 nil0;		/* nothing */
125	u32 dataptr;		/* Data or Scatter List ptr */
126	u32 datalen;		/* Data or Scatter List len */
127	u32 statusptr;		/* Status Block ptr */
128	u32 linkptr;		/* Chain Address */
129	u32 nil1;		/* nothing */
130	u32 senseptr;		/* Sense Info Pointer */
131	u8 senselen;		/* Sense Length */
132	u8 cdblen;		/* CDB Length */
133	u16 datacheck;		/* Data checksum */
134	u8 cdb[MAX_CDB];	/* CDB area */
135/* Hardware defined portion ends here, rest is driver defined */
136	u8 sense[MAX_SENSE];	/* Sense area */
137	u8 status[MAX_STATUS];	/* Status area */
138	struct scsi_cmnd *SCpnt;	/* Link to the SCSI Command Block */
139	void (*done) (struct scsi_cmnd *);	/* Completion Function */
140};
141
142#define	AHA1740CMD_NOP	 0x00	/* No OP */
143#define AHA1740CMD_INIT	 0x01	/* Initiator SCSI Command */
144#define AHA1740CMD_DIAG	 0x05	/* Run Diagnostic Command */
145#define AHA1740CMD_SCSI	 0x06	/* Initialize SCSI */
146#define AHA1740CMD_SENSE 0x08	/* Read Sense Information */
147#define AHA1740CMD_DOWN  0x09	/* Download Firmware (yeah, I bet!) */
148#define AHA1740CMD_RINQ  0x0a	/* Read Host Adapter Inquiry Data */
149#define AHA1740CMD_TARG  0x10	/* Target SCSI Command */
150
151#define AHA1740_ECBS 32
152#define AHA1740_SCATTER 16
153
154#endif
155