1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Pinctrl data for VIA VT8500 SoC
4 *
5 * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz>
6 */
7
8#include <linux/io.h>
9#include <linux/init.h>
10#include <linux/pinctrl/pinctrl.h>
11#include <linux/platform_device.h>
12#include <linux/slab.h>
13
14#include "pinctrl-wmt.h"
15
16/*
17 * Describe the register offsets within the GPIO memory space
18 * The dedicated external GPIO's should always be listed in bank 0
19 * so they are exported in the 0..31 range which is what users
20 * expect.
21 *
22 * Do not reorder these banks as it will change the pin numbering
23 */
24static const struct wmt_pinctrl_bank_registers vt8500_banks[] = {
25	WMT_PINCTRL_BANK(NO_REG, 0x3C, 0x5C, 0x7C, NO_REG, NO_REG),	/* 0 */
26	WMT_PINCTRL_BANK(0x00, 0x20, 0x40, 0x60, NO_REG, NO_REG),	/* 1 */
27	WMT_PINCTRL_BANK(0x04, 0x24, 0x44, 0x64, NO_REG, NO_REG),	/* 2 */
28	WMT_PINCTRL_BANK(0x08, 0x28, 0x48, 0x68, NO_REG, NO_REG),	/* 3 */
29	WMT_PINCTRL_BANK(0x0C, 0x2C, 0x4C, 0x6C, NO_REG, NO_REG),	/* 4 */
30	WMT_PINCTRL_BANK(0x10, 0x30, 0x50, 0x70, NO_REG, NO_REG),	/* 5 */
31	WMT_PINCTRL_BANK(0x14, 0x34, 0x54, 0x74, NO_REG, NO_REG),	/* 6 */
32};
33
34/* Please keep sorted by bank/bit */
35#define WMT_PIN_EXTGPIO0	WMT_PIN(0, 0)
36#define WMT_PIN_EXTGPIO1	WMT_PIN(0, 1)
37#define WMT_PIN_EXTGPIO2	WMT_PIN(0, 2)
38#define WMT_PIN_EXTGPIO3	WMT_PIN(0, 3)
39#define WMT_PIN_EXTGPIO4	WMT_PIN(0, 4)
40#define WMT_PIN_EXTGPIO5	WMT_PIN(0, 5)
41#define WMT_PIN_EXTGPIO6	WMT_PIN(0, 6)
42#define WMT_PIN_EXTGPIO7	WMT_PIN(0, 7)
43#define WMT_PIN_EXTGPIO8	WMT_PIN(0, 8)
44#define WMT_PIN_UART0RTS	WMT_PIN(1, 0)
45#define WMT_PIN_UART0TXD	WMT_PIN(1, 1)
46#define WMT_PIN_UART0CTS	WMT_PIN(1, 2)
47#define WMT_PIN_UART0RXD	WMT_PIN(1, 3)
48#define WMT_PIN_UART1RTS	WMT_PIN(1, 4)
49#define WMT_PIN_UART1TXD	WMT_PIN(1, 5)
50#define WMT_PIN_UART1CTS	WMT_PIN(1, 6)
51#define WMT_PIN_UART1RXD	WMT_PIN(1, 7)
52#define WMT_PIN_SPI0CLK		WMT_PIN(1, 8)
53#define WMT_PIN_SPI0SS		WMT_PIN(1, 9)
54#define WMT_PIN_SPI0MISO	WMT_PIN(1, 10)
55#define WMT_PIN_SPI0MOSI	WMT_PIN(1, 11)
56#define WMT_PIN_SPI1CLK		WMT_PIN(1, 12)
57#define WMT_PIN_SPI1SS		WMT_PIN(1, 13)
58#define WMT_PIN_SPI1MISO	WMT_PIN(1, 14)
59#define WMT_PIN_SPI1MOSI	WMT_PIN(1, 15)
60#define WMT_PIN_SPI2CLK		WMT_PIN(1, 16)
61#define WMT_PIN_SPI2SS		WMT_PIN(1, 17)
62#define WMT_PIN_SPI2MISO	WMT_PIN(1, 18)
63#define WMT_PIN_SPI2MOSI	WMT_PIN(1, 19)
64#define WMT_PIN_SDDATA0		WMT_PIN(2, 0)
65#define WMT_PIN_SDDATA1		WMT_PIN(2, 1)
66#define WMT_PIN_SDDATA2		WMT_PIN(2, 2)
67#define WMT_PIN_SDDATA3		WMT_PIN(2, 3)
68#define WMT_PIN_MMCDATA0	WMT_PIN(2, 4)
69#define WMT_PIN_MMCDATA1	WMT_PIN(2, 5)
70#define WMT_PIN_MMCDATA2	WMT_PIN(2, 6)
71#define WMT_PIN_MMCDATA3	WMT_PIN(2, 7)
72#define WMT_PIN_SDCLK		WMT_PIN(2, 8)
73#define WMT_PIN_SDWP		WMT_PIN(2, 9)
74#define WMT_PIN_SDCMD		WMT_PIN(2, 10)
75#define WMT_PIN_MSDATA0		WMT_PIN(2, 16)
76#define WMT_PIN_MSDATA1		WMT_PIN(2, 17)
77#define WMT_PIN_MSDATA2		WMT_PIN(2, 18)
78#define WMT_PIN_MSDATA3		WMT_PIN(2, 19)
79#define WMT_PIN_MSCLK		WMT_PIN(2, 20)
80#define WMT_PIN_MSBS		WMT_PIN(2, 21)
81#define WMT_PIN_MSINS		WMT_PIN(2, 22)
82#define WMT_PIN_I2C0SCL		WMT_PIN(2, 24)
83#define WMT_PIN_I2C0SDA		WMT_PIN(2, 25)
84#define WMT_PIN_I2C1SCL		WMT_PIN(2, 26)
85#define WMT_PIN_I2C1SDA		WMT_PIN(2, 27)
86#define WMT_PIN_MII0RXD0	WMT_PIN(3, 0)
87#define WMT_PIN_MII0RXD1	WMT_PIN(3, 1)
88#define WMT_PIN_MII0RXD2	WMT_PIN(3, 2)
89#define WMT_PIN_MII0RXD3	WMT_PIN(3, 3)
90#define WMT_PIN_MII0RXCLK	WMT_PIN(3, 4)
91#define WMT_PIN_MII0RXDV	WMT_PIN(3, 5)
92#define WMT_PIN_MII0RXERR	WMT_PIN(3, 6)
93#define WMT_PIN_MII0PHYRST	WMT_PIN(3, 7)
94#define WMT_PIN_MII0TXD0	WMT_PIN(3, 8)
95#define WMT_PIN_MII0TXD1	WMT_PIN(3, 9)
96#define WMT_PIN_MII0TXD2	WMT_PIN(3, 10)
97#define WMT_PIN_MII0TXD3	WMT_PIN(3, 11)
98#define WMT_PIN_MII0TXCLK	WMT_PIN(3, 12)
99#define WMT_PIN_MII0TXEN	WMT_PIN(3, 13)
100#define WMT_PIN_MII0TXERR	WMT_PIN(3, 14)
101#define WMT_PIN_MII0PHYPD	WMT_PIN(3, 15)
102#define WMT_PIN_MII0COL		WMT_PIN(3, 16)
103#define WMT_PIN_MII0CRS		WMT_PIN(3, 17)
104#define WMT_PIN_MII0MDIO	WMT_PIN(3, 18)
105#define WMT_PIN_MII0MDC		WMT_PIN(3, 19)
106#define WMT_PIN_SEECS		WMT_PIN(3, 20)
107#define WMT_PIN_SEECK		WMT_PIN(3, 21)
108#define WMT_PIN_SEEDI		WMT_PIN(3, 22)
109#define WMT_PIN_SEEDO		WMT_PIN(3, 23)
110#define WMT_PIN_IDEDREQ0	WMT_PIN(3, 24)
111#define WMT_PIN_IDEDREQ1	WMT_PIN(3, 25)
112#define WMT_PIN_IDEIOW		WMT_PIN(3, 26)
113#define WMT_PIN_IDEIOR		WMT_PIN(3, 27)
114#define WMT_PIN_IDEDACK		WMT_PIN(3, 28)
115#define WMT_PIN_IDEIORDY	WMT_PIN(3, 29)
116#define WMT_PIN_IDEINTRQ	WMT_PIN(3, 30)
117#define WMT_PIN_VDIN0		WMT_PIN(4, 0)
118#define WMT_PIN_VDIN1		WMT_PIN(4, 1)
119#define WMT_PIN_VDIN2		WMT_PIN(4, 2)
120#define WMT_PIN_VDIN3		WMT_PIN(4, 3)
121#define WMT_PIN_VDIN4		WMT_PIN(4, 4)
122#define WMT_PIN_VDIN5		WMT_PIN(4, 5)
123#define WMT_PIN_VDIN6		WMT_PIN(4, 6)
124#define WMT_PIN_VDIN7		WMT_PIN(4, 7)
125#define WMT_PIN_VDOUT0		WMT_PIN(4, 8)
126#define WMT_PIN_VDOUT1		WMT_PIN(4, 9)
127#define WMT_PIN_VDOUT2		WMT_PIN(4, 10)
128#define WMT_PIN_VDOUT3		WMT_PIN(4, 11)
129#define WMT_PIN_VDOUT4		WMT_PIN(4, 12)
130#define WMT_PIN_VDOUT5		WMT_PIN(4, 13)
131#define WMT_PIN_NANDCLE0	WMT_PIN(4, 14)
132#define WMT_PIN_NANDCLE1	WMT_PIN(4, 15)
133#define WMT_PIN_VDOUT6_7	WMT_PIN(4, 16)
134#define WMT_PIN_VHSYNC		WMT_PIN(4, 17)
135#define WMT_PIN_VVSYNC		WMT_PIN(4, 18)
136#define WMT_PIN_TSDIN0		WMT_PIN(5, 8)
137#define WMT_PIN_TSDIN1		WMT_PIN(5, 9)
138#define WMT_PIN_TSDIN2		WMT_PIN(5, 10)
139#define WMT_PIN_TSDIN3		WMT_PIN(5, 11)
140#define WMT_PIN_TSDIN4		WMT_PIN(5, 12)
141#define WMT_PIN_TSDIN5		WMT_PIN(5, 13)
142#define WMT_PIN_TSDIN6		WMT_PIN(5, 14)
143#define WMT_PIN_TSDIN7		WMT_PIN(5, 15)
144#define WMT_PIN_TSSYNC		WMT_PIN(5, 16)
145#define WMT_PIN_TSVALID		WMT_PIN(5, 17)
146#define WMT_PIN_TSCLK		WMT_PIN(5, 18)
147#define WMT_PIN_LCDD0		WMT_PIN(6, 0)
148#define WMT_PIN_LCDD1		WMT_PIN(6, 1)
149#define WMT_PIN_LCDD2		WMT_PIN(6, 2)
150#define WMT_PIN_LCDD3		WMT_PIN(6, 3)
151#define WMT_PIN_LCDD4		WMT_PIN(6, 4)
152#define WMT_PIN_LCDD5		WMT_PIN(6, 5)
153#define WMT_PIN_LCDD6		WMT_PIN(6, 6)
154#define WMT_PIN_LCDD7		WMT_PIN(6, 7)
155#define WMT_PIN_LCDD8		WMT_PIN(6, 8)
156#define WMT_PIN_LCDD9		WMT_PIN(6, 9)
157#define WMT_PIN_LCDD10		WMT_PIN(6, 10)
158#define WMT_PIN_LCDD11		WMT_PIN(6, 11)
159#define WMT_PIN_LCDD12		WMT_PIN(6, 12)
160#define WMT_PIN_LCDD13		WMT_PIN(6, 13)
161#define WMT_PIN_LCDD14		WMT_PIN(6, 14)
162#define WMT_PIN_LCDD15		WMT_PIN(6, 15)
163#define WMT_PIN_LCDD16		WMT_PIN(6, 16)
164#define WMT_PIN_LCDD17		WMT_PIN(6, 17)
165#define WMT_PIN_LCDCLK		WMT_PIN(6, 18)
166#define WMT_PIN_LCDDEN		WMT_PIN(6, 19)
167#define WMT_PIN_LCDLINE		WMT_PIN(6, 20)
168#define WMT_PIN_LCDFRM		WMT_PIN(6, 21)
169#define WMT_PIN_LCDBIAS		WMT_PIN(6, 22)
170
171static const struct pinctrl_pin_desc vt8500_pins[] = {
172	PINCTRL_PIN(WMT_PIN_EXTGPIO0, "extgpio0"),
173	PINCTRL_PIN(WMT_PIN_EXTGPIO1, "extgpio1"),
174	PINCTRL_PIN(WMT_PIN_EXTGPIO2, "extgpio2"),
175	PINCTRL_PIN(WMT_PIN_EXTGPIO3, "extgpio3"),
176	PINCTRL_PIN(WMT_PIN_EXTGPIO4, "extgpio4"),
177	PINCTRL_PIN(WMT_PIN_EXTGPIO5, "extgpio5"),
178	PINCTRL_PIN(WMT_PIN_EXTGPIO6, "extgpio6"),
179	PINCTRL_PIN(WMT_PIN_EXTGPIO7, "extgpio7"),
180	PINCTRL_PIN(WMT_PIN_EXTGPIO8, "extgpio8"),
181	PINCTRL_PIN(WMT_PIN_UART0RTS, "uart0_rts"),
182	PINCTRL_PIN(WMT_PIN_UART0TXD, "uart0_txd"),
183	PINCTRL_PIN(WMT_PIN_UART0CTS, "uart0_cts"),
184	PINCTRL_PIN(WMT_PIN_UART0RXD, "uart0_rxd"),
185	PINCTRL_PIN(WMT_PIN_UART1RTS, "uart1_rts"),
186	PINCTRL_PIN(WMT_PIN_UART1TXD, "uart1_txd"),
187	PINCTRL_PIN(WMT_PIN_UART1CTS, "uart1_cts"),
188	PINCTRL_PIN(WMT_PIN_UART1RXD, "uart1_rxd"),
189	PINCTRL_PIN(WMT_PIN_SPI0CLK, "spi0_clk"),
190	PINCTRL_PIN(WMT_PIN_SPI0SS, "spi0_ss"),
191	PINCTRL_PIN(WMT_PIN_SPI0MISO, "spi0_miso"),
192	PINCTRL_PIN(WMT_PIN_SPI0MOSI, "spi0_mosi"),
193	PINCTRL_PIN(WMT_PIN_SPI1CLK, "spi1_clk"),
194	PINCTRL_PIN(WMT_PIN_SPI1SS, "spi1_ss"),
195	PINCTRL_PIN(WMT_PIN_SPI1MISO, "spi1_miso"),
196	PINCTRL_PIN(WMT_PIN_SPI1MOSI, "spi1_mosi"),
197	PINCTRL_PIN(WMT_PIN_SPI2CLK, "spi2_clk"),
198	PINCTRL_PIN(WMT_PIN_SPI2SS, "spi2_ss"),
199	PINCTRL_PIN(WMT_PIN_SPI2MISO, "spi2_miso"),
200	PINCTRL_PIN(WMT_PIN_SPI2MOSI, "spi2_mosi"),
201	PINCTRL_PIN(WMT_PIN_SDDATA0, "sd_data0"),
202	PINCTRL_PIN(WMT_PIN_SDDATA1, "sd_data1"),
203	PINCTRL_PIN(WMT_PIN_SDDATA2, "sd_data2"),
204	PINCTRL_PIN(WMT_PIN_SDDATA3, "sd_data3"),
205	PINCTRL_PIN(WMT_PIN_MMCDATA0, "mmc_data0"),
206	PINCTRL_PIN(WMT_PIN_MMCDATA1, "mmc_data1"),
207	PINCTRL_PIN(WMT_PIN_MMCDATA2, "mmc_data2"),
208	PINCTRL_PIN(WMT_PIN_MMCDATA3, "mmc_data3"),
209	PINCTRL_PIN(WMT_PIN_SDCLK, "sd_clk"),
210	PINCTRL_PIN(WMT_PIN_SDWP, "sd_wp"),
211	PINCTRL_PIN(WMT_PIN_SDCMD, "sd_cmd"),
212	PINCTRL_PIN(WMT_PIN_MSDATA0, "ms_data0"),
213	PINCTRL_PIN(WMT_PIN_MSDATA1, "ms_data1"),
214	PINCTRL_PIN(WMT_PIN_MSDATA2, "ms_data2"),
215	PINCTRL_PIN(WMT_PIN_MSDATA3, "ms_data3"),
216	PINCTRL_PIN(WMT_PIN_MSCLK, "ms_clk"),
217	PINCTRL_PIN(WMT_PIN_MSBS, "ms_bs"),
218	PINCTRL_PIN(WMT_PIN_MSINS, "ms_ins"),
219	PINCTRL_PIN(WMT_PIN_I2C0SCL, "i2c0_scl"),
220	PINCTRL_PIN(WMT_PIN_I2C0SDA, "i2c0_sda"),
221	PINCTRL_PIN(WMT_PIN_I2C1SCL, "i2c1_scl"),
222	PINCTRL_PIN(WMT_PIN_I2C1SDA, "i2c1_sda"),
223	PINCTRL_PIN(WMT_PIN_MII0RXD0, "mii0_rxd0"),
224	PINCTRL_PIN(WMT_PIN_MII0RXD1, "mii0_rxd1"),
225	PINCTRL_PIN(WMT_PIN_MII0RXD2, "mii0_rxd2"),
226	PINCTRL_PIN(WMT_PIN_MII0RXD3, "mii0_rxd3"),
227	PINCTRL_PIN(WMT_PIN_MII0RXCLK, "mii0_rxclk"),
228	PINCTRL_PIN(WMT_PIN_MII0RXDV, "mii0_rxdv"),
229	PINCTRL_PIN(WMT_PIN_MII0RXERR, "mii0_rxerr"),
230	PINCTRL_PIN(WMT_PIN_MII0PHYRST, "mii0_phyrst"),
231	PINCTRL_PIN(WMT_PIN_MII0TXD0, "mii0_txd0"),
232	PINCTRL_PIN(WMT_PIN_MII0TXD1, "mii0_txd1"),
233	PINCTRL_PIN(WMT_PIN_MII0TXD2, "mii0_txd2"),
234	PINCTRL_PIN(WMT_PIN_MII0TXD3, "mii0_txd3"),
235	PINCTRL_PIN(WMT_PIN_MII0TXCLK, "mii0_txclk"),
236	PINCTRL_PIN(WMT_PIN_MII0TXEN, "mii0_txen"),
237	PINCTRL_PIN(WMT_PIN_MII0TXERR, "mii0_txerr"),
238	PINCTRL_PIN(WMT_PIN_MII0PHYPD, "mii0_phypd"),
239	PINCTRL_PIN(WMT_PIN_MII0COL, "mii0_col"),
240	PINCTRL_PIN(WMT_PIN_MII0CRS, "mii0_crs"),
241	PINCTRL_PIN(WMT_PIN_MII0MDIO, "mii0_mdio"),
242	PINCTRL_PIN(WMT_PIN_MII0MDC, "mii0_mdc"),
243	PINCTRL_PIN(WMT_PIN_SEECS, "see_cs"),
244	PINCTRL_PIN(WMT_PIN_SEECK, "see_ck"),
245	PINCTRL_PIN(WMT_PIN_SEEDI, "see_di"),
246	PINCTRL_PIN(WMT_PIN_SEEDO, "see_do"),
247	PINCTRL_PIN(WMT_PIN_IDEDREQ0, "ide_dreq0"),
248	PINCTRL_PIN(WMT_PIN_IDEDREQ1, "ide_dreq1"),
249	PINCTRL_PIN(WMT_PIN_IDEIOW, "ide_iow"),
250	PINCTRL_PIN(WMT_PIN_IDEIOR, "ide_ior"),
251	PINCTRL_PIN(WMT_PIN_IDEDACK, "ide_dack"),
252	PINCTRL_PIN(WMT_PIN_IDEIORDY, "ide_iordy"),
253	PINCTRL_PIN(WMT_PIN_IDEINTRQ, "ide_intrq"),
254	PINCTRL_PIN(WMT_PIN_VDIN0, "vdin0"),
255	PINCTRL_PIN(WMT_PIN_VDIN1, "vdin1"),
256	PINCTRL_PIN(WMT_PIN_VDIN2, "vdin2"),
257	PINCTRL_PIN(WMT_PIN_VDIN3, "vdin3"),
258	PINCTRL_PIN(WMT_PIN_VDIN4, "vdin4"),
259	PINCTRL_PIN(WMT_PIN_VDIN5, "vdin5"),
260	PINCTRL_PIN(WMT_PIN_VDIN6, "vdin6"),
261	PINCTRL_PIN(WMT_PIN_VDIN7, "vdin7"),
262	PINCTRL_PIN(WMT_PIN_VDOUT0, "vdout0"),
263	PINCTRL_PIN(WMT_PIN_VDOUT1, "vdout1"),
264	PINCTRL_PIN(WMT_PIN_VDOUT2, "vdout2"),
265	PINCTRL_PIN(WMT_PIN_VDOUT3, "vdout3"),
266	PINCTRL_PIN(WMT_PIN_VDOUT4, "vdout4"),
267	PINCTRL_PIN(WMT_PIN_VDOUT5, "vdout5"),
268	PINCTRL_PIN(WMT_PIN_NANDCLE0, "nand_cle0"),
269	PINCTRL_PIN(WMT_PIN_NANDCLE1, "nand_cle1"),
270	PINCTRL_PIN(WMT_PIN_VDOUT6_7, "vdout6_7"),
271	PINCTRL_PIN(WMT_PIN_VHSYNC, "vhsync"),
272	PINCTRL_PIN(WMT_PIN_VVSYNC, "vvsync"),
273	PINCTRL_PIN(WMT_PIN_TSDIN0, "tsdin0"),
274	PINCTRL_PIN(WMT_PIN_TSDIN1, "tsdin1"),
275	PINCTRL_PIN(WMT_PIN_TSDIN2, "tsdin2"),
276	PINCTRL_PIN(WMT_PIN_TSDIN3, "tsdin3"),
277	PINCTRL_PIN(WMT_PIN_TSDIN4, "tsdin4"),
278	PINCTRL_PIN(WMT_PIN_TSDIN5, "tsdin5"),
279	PINCTRL_PIN(WMT_PIN_TSDIN6, "tsdin6"),
280	PINCTRL_PIN(WMT_PIN_TSDIN7, "tsdin7"),
281	PINCTRL_PIN(WMT_PIN_TSSYNC, "tssync"),
282	PINCTRL_PIN(WMT_PIN_TSVALID, "tsvalid"),
283	PINCTRL_PIN(WMT_PIN_TSCLK, "tsclk"),
284	PINCTRL_PIN(WMT_PIN_LCDD0, "lcd_d0"),
285	PINCTRL_PIN(WMT_PIN_LCDD1, "lcd_d1"),
286	PINCTRL_PIN(WMT_PIN_LCDD2, "lcd_d2"),
287	PINCTRL_PIN(WMT_PIN_LCDD3, "lcd_d3"),
288	PINCTRL_PIN(WMT_PIN_LCDD4, "lcd_d4"),
289	PINCTRL_PIN(WMT_PIN_LCDD5, "lcd_d5"),
290	PINCTRL_PIN(WMT_PIN_LCDD6, "lcd_d6"),
291	PINCTRL_PIN(WMT_PIN_LCDD7, "lcd_d7"),
292	PINCTRL_PIN(WMT_PIN_LCDD8, "lcd_d8"),
293	PINCTRL_PIN(WMT_PIN_LCDD9, "lcd_d9"),
294	PINCTRL_PIN(WMT_PIN_LCDD10, "lcd_d10"),
295	PINCTRL_PIN(WMT_PIN_LCDD11, "lcd_d11"),
296	PINCTRL_PIN(WMT_PIN_LCDD12, "lcd_d12"),
297	PINCTRL_PIN(WMT_PIN_LCDD13, "lcd_d13"),
298	PINCTRL_PIN(WMT_PIN_LCDD14, "lcd_d14"),
299	PINCTRL_PIN(WMT_PIN_LCDD15, "lcd_d15"),
300	PINCTRL_PIN(WMT_PIN_LCDD16, "lcd_d16"),
301	PINCTRL_PIN(WMT_PIN_LCDD17, "lcd_d17"),
302	PINCTRL_PIN(WMT_PIN_LCDCLK, "lcd_clk"),
303	PINCTRL_PIN(WMT_PIN_LCDDEN, "lcd_den"),
304	PINCTRL_PIN(WMT_PIN_LCDLINE, "lcd_line"),
305	PINCTRL_PIN(WMT_PIN_LCDFRM, "lcd_frm"),
306	PINCTRL_PIN(WMT_PIN_LCDBIAS, "lcd_bias"),
307};
308
309/* Order of these names must match the above list */
310static const char * const vt8500_groups[] = {
311	"extgpio0",
312	"extgpio1",
313	"extgpio2",
314	"extgpio3",
315	"extgpio4",
316	"extgpio5",
317	"extgpio6",
318	"extgpio7",
319	"extgpio8",
320	"uart0_rts",
321	"uart0_txd",
322	"uart0_cts",
323	"uart0_rxd",
324	"uart1_rts",
325	"uart1_txd",
326	"uart1_cts",
327	"uart1_rxd",
328	"spi0_clk",
329	"spi0_ss",
330	"spi0_miso",
331	"spi0_mosi",
332	"spi1_clk",
333	"spi1_ss",
334	"spi1_miso",
335	"spi1_mosi",
336	"spi2_clk",
337	"spi2_ss",
338	"spi2_miso",
339	"spi2_mosi",
340	"sd_data0",
341	"sd_data1",
342	"sd_data2",
343	"sd_data3",
344	"mmc_data0",
345	"mmc_data1",
346	"mmc_data2",
347	"mmc_data3",
348	"sd_clk",
349	"sd_wp",
350	"sd_cmd",
351	"ms_data0",
352	"ms_data1",
353	"ms_data2",
354	"ms_data3",
355	"ms_clk",
356	"ms_bs",
357	"ms_ins",
358	"i2c0_scl",
359	"i2c0_sda",
360	"i2c1_scl",
361	"i2c1_sda",
362	"mii0_rxd0",
363	"mii0_rxd1",
364	"mii0_rxd2",
365	"mii0_rxd3",
366	"mii0_rxclk",
367	"mii0_rxdv",
368	"mii0_rxerr",
369	"mii0_phyrst",
370	"mii0_txd0",
371	"mii0_txd1",
372	"mii0_txd2",
373	"mii0_txd3",
374	"mii0_txclk",
375	"mii0_txen",
376	"mii0_txerr",
377	"mii0_phypd",
378	"mii0_col",
379	"mii0_crs",
380	"mii0_mdio",
381	"mii0_mdc",
382	"see_cs",
383	"see_ck",
384	"see_di",
385	"see_do",
386	"ide_dreq0",
387	"ide_dreq1",
388	"ide_iow",
389	"ide_ior",
390	"ide_dack",
391	"ide_iordy",
392	"ide_intrq",
393	"vdin0",
394	"vdin1",
395	"vdin2",
396	"vdin3",
397	"vdin4",
398	"vdin5",
399	"vdin6",
400	"vdin7",
401	"vdout0",
402	"vdout1",
403	"vdout2",
404	"vdout3",
405	"vdout4",
406	"vdout5",
407	"nand_cle0",
408	"nand_cle1",
409	"vdout6_7",
410	"vhsync",
411	"vvsync",
412	"tsdin0",
413	"tsdin1",
414	"tsdin2",
415	"tsdin3",
416	"tsdin4",
417	"tsdin5",
418	"tsdin6",
419	"tsdin7",
420	"tssync",
421	"tsvalid",
422	"tsclk",
423	"lcd_d0",
424	"lcd_d1",
425	"lcd_d2",
426	"lcd_d3",
427	"lcd_d4",
428	"lcd_d5",
429	"lcd_d6",
430	"lcd_d7",
431	"lcd_d8",
432	"lcd_d9",
433	"lcd_d10",
434	"lcd_d11",
435	"lcd_d12",
436	"lcd_d13",
437	"lcd_d14",
438	"lcd_d15",
439	"lcd_d16",
440	"lcd_d17",
441	"lcd_clk",
442	"lcd_den",
443	"lcd_line",
444	"lcd_frm",
445	"lcd_bias",
446};
447
448static int vt8500_pinctrl_probe(struct platform_device *pdev)
449{
450	struct wmt_pinctrl_data *data;
451
452	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
453	if (!data)
454		return -ENOMEM;
455
456	data->banks = vt8500_banks;
457	data->nbanks = ARRAY_SIZE(vt8500_banks);
458	data->pins = vt8500_pins;
459	data->npins = ARRAY_SIZE(vt8500_pins);
460	data->groups = vt8500_groups;
461	data->ngroups = ARRAY_SIZE(vt8500_groups);
462
463	return wmt_pinctrl_probe(pdev, data);
464}
465
466static const struct of_device_id wmt_pinctrl_of_match[] = {
467	{ .compatible = "via,vt8500-pinctrl" },
468	{ /* sentinel */ },
469};
470
471static struct platform_driver wmt_pinctrl_driver = {
472	.probe	= vt8500_pinctrl_probe,
473	.driver = {
474		.name	= "pinctrl-vt8500",
475		.of_match_table	= wmt_pinctrl_of_match,
476		.suppress_bind_attrs = true,
477	},
478};
479builtin_platform_driver(wmt_pinctrl_driver);
480