1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (c) 2014, Sony Mobile Communications AB. 4 * Copyright (c) 2016 BayLibre, SAS. 5 * Author : Neil Armstrong <narmstrong@baylibre.com> 6 */ 7 8#include <linux/module.h> 9#include <linux/of.h> 10#include <linux/platform_device.h> 11#include <linux/pinctrl/pinmux.h> 12 13#include "pinctrl-msm.h" 14 15static const struct pinctrl_pin_desc mdm9615_pins[] = { 16 PINCTRL_PIN(0, "GPIO_0"), 17 PINCTRL_PIN(1, "GPIO_1"), 18 PINCTRL_PIN(2, "GPIO_2"), 19 PINCTRL_PIN(3, "GPIO_3"), 20 PINCTRL_PIN(4, "GPIO_4"), 21 PINCTRL_PIN(5, "GPIO_5"), 22 PINCTRL_PIN(6, "GPIO_6"), 23 PINCTRL_PIN(7, "GPIO_7"), 24 PINCTRL_PIN(8, "GPIO_8"), 25 PINCTRL_PIN(9, "GPIO_9"), 26 PINCTRL_PIN(10, "GPIO_10"), 27 PINCTRL_PIN(11, "GPIO_11"), 28 PINCTRL_PIN(12, "GPIO_12"), 29 PINCTRL_PIN(13, "GPIO_13"), 30 PINCTRL_PIN(14, "GPIO_14"), 31 PINCTRL_PIN(15, "GPIO_15"), 32 PINCTRL_PIN(16, "GPIO_16"), 33 PINCTRL_PIN(17, "GPIO_17"), 34 PINCTRL_PIN(18, "GPIO_18"), 35 PINCTRL_PIN(19, "GPIO_19"), 36 PINCTRL_PIN(20, "GPIO_20"), 37 PINCTRL_PIN(21, "GPIO_21"), 38 PINCTRL_PIN(22, "GPIO_22"), 39 PINCTRL_PIN(23, "GPIO_23"), 40 PINCTRL_PIN(24, "GPIO_24"), 41 PINCTRL_PIN(25, "GPIO_25"), 42 PINCTRL_PIN(26, "GPIO_26"), 43 PINCTRL_PIN(27, "GPIO_27"), 44 PINCTRL_PIN(28, "GPIO_28"), 45 PINCTRL_PIN(29, "GPIO_29"), 46 PINCTRL_PIN(30, "GPIO_30"), 47 PINCTRL_PIN(31, "GPIO_31"), 48 PINCTRL_PIN(32, "GPIO_32"), 49 PINCTRL_PIN(33, "GPIO_33"), 50 PINCTRL_PIN(34, "GPIO_34"), 51 PINCTRL_PIN(35, "GPIO_35"), 52 PINCTRL_PIN(36, "GPIO_36"), 53 PINCTRL_PIN(37, "GPIO_37"), 54 PINCTRL_PIN(38, "GPIO_38"), 55 PINCTRL_PIN(39, "GPIO_39"), 56 PINCTRL_PIN(40, "GPIO_40"), 57 PINCTRL_PIN(41, "GPIO_41"), 58 PINCTRL_PIN(42, "GPIO_42"), 59 PINCTRL_PIN(43, "GPIO_43"), 60 PINCTRL_PIN(44, "GPIO_44"), 61 PINCTRL_PIN(45, "GPIO_45"), 62 PINCTRL_PIN(46, "GPIO_46"), 63 PINCTRL_PIN(47, "GPIO_47"), 64 PINCTRL_PIN(48, "GPIO_48"), 65 PINCTRL_PIN(49, "GPIO_49"), 66 PINCTRL_PIN(50, "GPIO_50"), 67 PINCTRL_PIN(51, "GPIO_51"), 68 PINCTRL_PIN(52, "GPIO_52"), 69 PINCTRL_PIN(53, "GPIO_53"), 70 PINCTRL_PIN(54, "GPIO_54"), 71 PINCTRL_PIN(55, "GPIO_55"), 72 PINCTRL_PIN(56, "GPIO_56"), 73 PINCTRL_PIN(57, "GPIO_57"), 74 PINCTRL_PIN(58, "GPIO_58"), 75 PINCTRL_PIN(59, "GPIO_59"), 76 PINCTRL_PIN(60, "GPIO_60"), 77 PINCTRL_PIN(61, "GPIO_61"), 78 PINCTRL_PIN(62, "GPIO_62"), 79 PINCTRL_PIN(63, "GPIO_63"), 80 PINCTRL_PIN(64, "GPIO_64"), 81 PINCTRL_PIN(65, "GPIO_65"), 82 PINCTRL_PIN(66, "GPIO_66"), 83 PINCTRL_PIN(67, "GPIO_67"), 84 PINCTRL_PIN(68, "GPIO_68"), 85 PINCTRL_PIN(69, "GPIO_69"), 86 PINCTRL_PIN(70, "GPIO_70"), 87 PINCTRL_PIN(71, "GPIO_71"), 88 PINCTRL_PIN(72, "GPIO_72"), 89 PINCTRL_PIN(73, "GPIO_73"), 90 PINCTRL_PIN(74, "GPIO_74"), 91 PINCTRL_PIN(75, "GPIO_75"), 92 PINCTRL_PIN(76, "GPIO_76"), 93 PINCTRL_PIN(77, "GPIO_77"), 94 PINCTRL_PIN(78, "GPIO_78"), 95 PINCTRL_PIN(79, "GPIO_79"), 96 PINCTRL_PIN(80, "GPIO_80"), 97 PINCTRL_PIN(81, "GPIO_81"), 98 PINCTRL_PIN(82, "GPIO_82"), 99 PINCTRL_PIN(83, "GPIO_83"), 100 PINCTRL_PIN(84, "GPIO_84"), 101 PINCTRL_PIN(85, "GPIO_85"), 102 PINCTRL_PIN(86, "GPIO_86"), 103 PINCTRL_PIN(87, "GPIO_87"), 104}; 105 106#define DECLARE_MSM_GPIO_PINS(pin) \ 107 static const unsigned int gpio##pin##_pins[] = { pin } 108DECLARE_MSM_GPIO_PINS(0); 109DECLARE_MSM_GPIO_PINS(1); 110DECLARE_MSM_GPIO_PINS(2); 111DECLARE_MSM_GPIO_PINS(3); 112DECLARE_MSM_GPIO_PINS(4); 113DECLARE_MSM_GPIO_PINS(5); 114DECLARE_MSM_GPIO_PINS(6); 115DECLARE_MSM_GPIO_PINS(7); 116DECLARE_MSM_GPIO_PINS(8); 117DECLARE_MSM_GPIO_PINS(9); 118DECLARE_MSM_GPIO_PINS(10); 119DECLARE_MSM_GPIO_PINS(11); 120DECLARE_MSM_GPIO_PINS(12); 121DECLARE_MSM_GPIO_PINS(13); 122DECLARE_MSM_GPIO_PINS(14); 123DECLARE_MSM_GPIO_PINS(15); 124DECLARE_MSM_GPIO_PINS(16); 125DECLARE_MSM_GPIO_PINS(17); 126DECLARE_MSM_GPIO_PINS(18); 127DECLARE_MSM_GPIO_PINS(19); 128DECLARE_MSM_GPIO_PINS(20); 129DECLARE_MSM_GPIO_PINS(21); 130DECLARE_MSM_GPIO_PINS(22); 131DECLARE_MSM_GPIO_PINS(23); 132DECLARE_MSM_GPIO_PINS(24); 133DECLARE_MSM_GPIO_PINS(25); 134DECLARE_MSM_GPIO_PINS(26); 135DECLARE_MSM_GPIO_PINS(27); 136DECLARE_MSM_GPIO_PINS(28); 137DECLARE_MSM_GPIO_PINS(29); 138DECLARE_MSM_GPIO_PINS(30); 139DECLARE_MSM_GPIO_PINS(31); 140DECLARE_MSM_GPIO_PINS(32); 141DECLARE_MSM_GPIO_PINS(33); 142DECLARE_MSM_GPIO_PINS(34); 143DECLARE_MSM_GPIO_PINS(35); 144DECLARE_MSM_GPIO_PINS(36); 145DECLARE_MSM_GPIO_PINS(37); 146DECLARE_MSM_GPIO_PINS(38); 147DECLARE_MSM_GPIO_PINS(39); 148DECLARE_MSM_GPIO_PINS(40); 149DECLARE_MSM_GPIO_PINS(41); 150DECLARE_MSM_GPIO_PINS(42); 151DECLARE_MSM_GPIO_PINS(43); 152DECLARE_MSM_GPIO_PINS(44); 153DECLARE_MSM_GPIO_PINS(45); 154DECLARE_MSM_GPIO_PINS(46); 155DECLARE_MSM_GPIO_PINS(47); 156DECLARE_MSM_GPIO_PINS(48); 157DECLARE_MSM_GPIO_PINS(49); 158DECLARE_MSM_GPIO_PINS(50); 159DECLARE_MSM_GPIO_PINS(51); 160DECLARE_MSM_GPIO_PINS(52); 161DECLARE_MSM_GPIO_PINS(53); 162DECLARE_MSM_GPIO_PINS(54); 163DECLARE_MSM_GPIO_PINS(55); 164DECLARE_MSM_GPIO_PINS(56); 165DECLARE_MSM_GPIO_PINS(57); 166DECLARE_MSM_GPIO_PINS(58); 167DECLARE_MSM_GPIO_PINS(59); 168DECLARE_MSM_GPIO_PINS(60); 169DECLARE_MSM_GPIO_PINS(61); 170DECLARE_MSM_GPIO_PINS(62); 171DECLARE_MSM_GPIO_PINS(63); 172DECLARE_MSM_GPIO_PINS(64); 173DECLARE_MSM_GPIO_PINS(65); 174DECLARE_MSM_GPIO_PINS(66); 175DECLARE_MSM_GPIO_PINS(67); 176DECLARE_MSM_GPIO_PINS(68); 177DECLARE_MSM_GPIO_PINS(69); 178DECLARE_MSM_GPIO_PINS(70); 179DECLARE_MSM_GPIO_PINS(71); 180DECLARE_MSM_GPIO_PINS(72); 181DECLARE_MSM_GPIO_PINS(73); 182DECLARE_MSM_GPIO_PINS(74); 183DECLARE_MSM_GPIO_PINS(75); 184DECLARE_MSM_GPIO_PINS(76); 185DECLARE_MSM_GPIO_PINS(77); 186DECLARE_MSM_GPIO_PINS(78); 187DECLARE_MSM_GPIO_PINS(79); 188DECLARE_MSM_GPIO_PINS(80); 189DECLARE_MSM_GPIO_PINS(81); 190DECLARE_MSM_GPIO_PINS(82); 191DECLARE_MSM_GPIO_PINS(83); 192DECLARE_MSM_GPIO_PINS(84); 193DECLARE_MSM_GPIO_PINS(85); 194DECLARE_MSM_GPIO_PINS(86); 195DECLARE_MSM_GPIO_PINS(87); 196 197#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \ 198 { \ 199 .grp = PINCTRL_PINGROUP("gpio" #id, \ 200 gpio##id##_pins, \ 201 ARRAY_SIZE(gpio##id##_pins)), \ 202 .funcs = (int[]){ \ 203 msm_mux_gpio, \ 204 msm_mux_##f1, \ 205 msm_mux_##f2, \ 206 msm_mux_##f3, \ 207 msm_mux_##f4, \ 208 msm_mux_##f5, \ 209 msm_mux_##f6, \ 210 msm_mux_##f7, \ 211 msm_mux_##f8, \ 212 msm_mux_##f9, \ 213 msm_mux_##f10, \ 214 msm_mux_##f11 \ 215 }, \ 216 .nfuncs = 12, \ 217 .ctl_reg = 0x1000 + 0x10 * id, \ 218 .io_reg = 0x1004 + 0x10 * id, \ 219 .intr_cfg_reg = 0x1008 + 0x10 * id, \ 220 .intr_status_reg = 0x100c + 0x10 * id, \ 221 .intr_target_reg = 0x400 + 0x4 * id, \ 222 .mux_bit = 2, \ 223 .pull_bit = 0, \ 224 .drv_bit = 6, \ 225 .oe_bit = 9, \ 226 .in_bit = 0, \ 227 .out_bit = 1, \ 228 .intr_enable_bit = 0, \ 229 .intr_status_bit = 0, \ 230 .intr_ack_high = 1, \ 231 .intr_target_bit = 0, \ 232 .intr_target_kpss_val = 4, \ 233 .intr_raw_status_bit = 3, \ 234 .intr_polarity_bit = 1, \ 235 .intr_detection_bit = 2, \ 236 .intr_detection_width = 1, \ 237 } 238 239enum mdm9615_functions { 240 msm_mux_gpio, 241 msm_mux_gsbi2_i2c, 242 msm_mux_gsbi3, 243 msm_mux_gsbi4, 244 msm_mux_gsbi5_i2c, 245 msm_mux_gsbi5_uart, 246 msm_mux_sdc2, 247 msm_mux_ebi2_lcdc, 248 msm_mux_ps_hold, 249 msm_mux_prim_audio, 250 msm_mux_sec_audio, 251 msm_mux_cdc_mclk, 252 msm_mux_NA, 253}; 254 255static const char * const gpio_groups[] = { 256 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 257 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", 258 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 259 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 260 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 261 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", 262 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", 263 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", 264 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", 265 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", 266 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", 267 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84", 268 "gpio85", "gpio86", "gpio87" 269}; 270 271static const char * const gsbi2_i2c_groups[] = { 272 "gpio4", "gpio5" 273}; 274 275static const char * const gsbi3_groups[] = { 276 "gpio8", "gpio9", "gpio10", "gpio11" 277}; 278 279static const char * const gsbi4_groups[] = { 280 "gpio12", "gpio13", "gpio14", "gpio15" 281}; 282 283static const char * const gsbi5_i2c_groups[] = { 284 "gpio16", "gpio17" 285}; 286 287static const char * const gsbi5_uart_groups[] = { 288 "gpio18", "gpio19" 289}; 290 291static const char * const sdc2_groups[] = { 292 "gpio25", "gpio26", "gpio27", "gpio28", "gpio29", "gpio30", 293}; 294 295static const char * const ebi2_lcdc_groups[] = { 296 "gpio21", "gpio22", "gpio24", 297}; 298 299static const char * const ps_hold_groups[] = { 300 "gpio83", 301}; 302 303static const char * const prim_audio_groups[] = { 304 "gpio20", "gpio21", "gpio22", "gpio23", 305}; 306 307static const char * const sec_audio_groups[] = { 308 "gpio25", "gpio26", "gpio27", "gpio28", 309}; 310 311static const char * const cdc_mclk_groups[] = { 312 "gpio24", 313}; 314 315static const struct pinfunction mdm9615_functions[] = { 316 MSM_PIN_FUNCTION(gpio), 317 MSM_PIN_FUNCTION(gsbi2_i2c), 318 MSM_PIN_FUNCTION(gsbi3), 319 MSM_PIN_FUNCTION(gsbi4), 320 MSM_PIN_FUNCTION(gsbi5_i2c), 321 MSM_PIN_FUNCTION(gsbi5_uart), 322 MSM_PIN_FUNCTION(sdc2), 323 MSM_PIN_FUNCTION(ebi2_lcdc), 324 MSM_PIN_FUNCTION(ps_hold), 325 MSM_PIN_FUNCTION(prim_audio), 326 MSM_PIN_FUNCTION(sec_audio), 327 MSM_PIN_FUNCTION(cdc_mclk), 328}; 329 330static const struct msm_pingroup mdm9615_groups[] = { 331 PINGROUP(0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 332 PINGROUP(1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 333 PINGROUP(2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 334 PINGROUP(3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 335 PINGROUP(4, gsbi2_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 336 PINGROUP(5, gsbi2_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 337 PINGROUP(6, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 338 PINGROUP(7, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 339 PINGROUP(8, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 340 PINGROUP(9, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 341 PINGROUP(10, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 342 PINGROUP(11, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 343 PINGROUP(12, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 344 PINGROUP(13, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 345 PINGROUP(14, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 346 PINGROUP(15, gsbi4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 347 PINGROUP(16, gsbi5_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 348 PINGROUP(17, gsbi5_i2c, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 349 PINGROUP(18, gsbi5_uart, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 350 PINGROUP(19, gsbi5_uart, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 351 PINGROUP(20, prim_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 352 PINGROUP(21, prim_audio, ebi2_lcdc, NA, NA, NA, NA, NA, NA, NA, NA, NA), 353 PINGROUP(22, prim_audio, ebi2_lcdc, NA, NA, NA, NA, NA, NA, NA, NA, NA), 354 PINGROUP(23, prim_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 355 PINGROUP(24, cdc_mclk, NA, ebi2_lcdc, NA, NA, NA, NA, NA, NA, NA, NA), 356 PINGROUP(25, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA), 357 PINGROUP(26, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA), 358 PINGROUP(27, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA), 359 PINGROUP(28, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA), 360 PINGROUP(29, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA), 361 PINGROUP(30, sdc2, sec_audio, NA, NA, NA, NA, NA, NA, NA, NA, NA), 362 PINGROUP(31, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 363 PINGROUP(32, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 364 PINGROUP(33, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 365 PINGROUP(34, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 366 PINGROUP(35, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 367 PINGROUP(36, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 368 PINGROUP(37, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 369 PINGROUP(38, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 370 PINGROUP(39, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 371 PINGROUP(40, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 372 PINGROUP(41, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 373 PINGROUP(42, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 374 PINGROUP(43, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 375 PINGROUP(44, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 376 PINGROUP(45, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 377 PINGROUP(46, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 378 PINGROUP(47, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 379 PINGROUP(48, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 380 PINGROUP(49, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 381 PINGROUP(50, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 382 PINGROUP(51, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 383 PINGROUP(52, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 384 PINGROUP(53, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 385 PINGROUP(54, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 386 PINGROUP(55, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 387 PINGROUP(56, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 388 PINGROUP(57, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 389 PINGROUP(58, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 390 PINGROUP(59, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 391 PINGROUP(60, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 392 PINGROUP(61, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 393 PINGROUP(62, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 394 PINGROUP(63, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 395 PINGROUP(64, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 396 PINGROUP(65, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 397 PINGROUP(66, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 398 PINGROUP(67, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 399 PINGROUP(68, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 400 PINGROUP(69, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 401 PINGROUP(70, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 402 PINGROUP(71, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 403 PINGROUP(72, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 404 PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 405 PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 406 PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 407 PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 408 PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 409 PINGROUP(78, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 410 PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 411 PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 412 PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 413 PINGROUP(82, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 414 PINGROUP(83, ps_hold, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 415 PINGROUP(84, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 416 PINGROUP(85, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 417 PINGROUP(86, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 418 PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 419}; 420 421#define NUM_GPIO_PINGROUPS 88 422 423static const struct msm_pinctrl_soc_data mdm9615_pinctrl = { 424 .pins = mdm9615_pins, 425 .npins = ARRAY_SIZE(mdm9615_pins), 426 .functions = mdm9615_functions, 427 .nfunctions = ARRAY_SIZE(mdm9615_functions), 428 .groups = mdm9615_groups, 429 .ngroups = ARRAY_SIZE(mdm9615_groups), 430 .ngpios = NUM_GPIO_PINGROUPS, 431}; 432 433static int mdm9615_pinctrl_probe(struct platform_device *pdev) 434{ 435 return msm_pinctrl_probe(pdev, &mdm9615_pinctrl); 436} 437 438static const struct of_device_id mdm9615_pinctrl_of_match[] = { 439 { .compatible = "qcom,mdm9615-pinctrl", }, 440 { }, 441}; 442 443static struct platform_driver mdm9615_pinctrl_driver = { 444 .driver = { 445 .name = "mdm9615-pinctrl", 446 .of_match_table = mdm9615_pinctrl_of_match, 447 }, 448 .probe = mdm9615_pinctrl_probe, 449 .remove_new = msm_pinctrl_remove, 450}; 451 452static int __init mdm9615_pinctrl_init(void) 453{ 454 return platform_driver_register(&mdm9615_pinctrl_driver); 455} 456arch_initcall(mdm9615_pinctrl_init); 457 458static void __exit mdm9615_pinctrl_exit(void) 459{ 460 platform_driver_unregister(&mdm9615_pinctrl_driver); 461} 462module_exit(mdm9615_pinctrl_exit); 463 464MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>"); 465MODULE_DESCRIPTION("Qualcomm MDM9615 pinctrl driver"); 466MODULE_LICENSE("GPL v2"); 467MODULE_DEVICE_TABLE(of, mdm9615_pinctrl_of_match); 468