1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2016 Freescale Semiconductor, Inc. 4 * Copyright 2017-2018 NXP 5 * Dong Aisheng <aisheng.dong@nxp.com> 6 */ 7 8#include <dt-bindings/pinctrl/pads-imx8qxp.h> 9#include <linux/err.h> 10#include <linux/firmware/imx/sci.h> 11#include <linux/init.h> 12#include <linux/io.h> 13#include <linux/mod_devicetable.h> 14#include <linux/module.h> 15#include <linux/of.h> 16#include <linux/pinctrl/pinctrl.h> 17#include <linux/platform_device.h> 18 19#include "pinctrl-imx.h" 20 21static const struct pinctrl_pin_desc imx8qxp_pinctrl_pads[] = { 22 IMX_PINCTRL_PIN(IMX8QXP_PCIE_CTRL0_PERST_B), 23 IMX_PINCTRL_PIN(IMX8QXP_PCIE_CTRL0_CLKREQ_B), 24 IMX_PINCTRL_PIN(IMX8QXP_PCIE_CTRL0_WAKE_B), 25 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_PCIESEP), 26 IMX_PINCTRL_PIN(IMX8QXP_USB_SS3_TC0), 27 IMX_PINCTRL_PIN(IMX8QXP_USB_SS3_TC1), 28 IMX_PINCTRL_PIN(IMX8QXP_USB_SS3_TC2), 29 IMX_PINCTRL_PIN(IMX8QXP_USB_SS3_TC3), 30 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_3V3_USB3IO), 31 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_CLK), 32 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_CMD), 33 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA0), 34 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA1), 35 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA2), 36 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA3), 37 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_SD1FIX0), 38 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA4), 39 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA5), 40 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA6), 41 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA7), 42 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_STROBE), 43 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_RESET_B), 44 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_SD1FIX1), 45 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_RESET_B), 46 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_VSELECT), 47 IMX_PINCTRL_PIN(IMX8QXP_CTL_NAND_RE_P_N), 48 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_WP), 49 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_CD_B), 50 IMX_PINCTRL_PIN(IMX8QXP_CTL_NAND_DQS_P_N), 51 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_VSELSEP), 52 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_CLK), 53 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_CMD), 54 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_DATA0), 55 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_DATA1), 56 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_DATA2), 57 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_DATA3), 58 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_VSEL3), 59 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_TXC), 60 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_TX_CTL), 61 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_TXD0), 62 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_TXD1), 63 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_TXD2), 64 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_TXD3), 65 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0), 66 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_RXC), 67 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_RX_CTL), 68 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_RXD0), 69 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_RXD1), 70 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_RXD2), 71 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_RXD3), 72 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1), 73 IMX_PINCTRL_PIN(IMX8QXP_ENET0_REFCLK_125M_25M), 74 IMX_PINCTRL_PIN(IMX8QXP_ENET0_MDIO), 75 IMX_PINCTRL_PIN(IMX8QXP_ENET0_MDC), 76 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIOCT), 77 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_FSR), 78 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_FST), 79 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_SCKR), 80 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_SCKT), 81 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_TX0), 82 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_TX1), 83 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_TX2_RX3), 84 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_TX3_RX2), 85 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_TX4_RX1), 86 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_TX5_RX0), 87 IMX_PINCTRL_PIN(IMX8QXP_SPDIF0_RX), 88 IMX_PINCTRL_PIN(IMX8QXP_SPDIF0_TX), 89 IMX_PINCTRL_PIN(IMX8QXP_SPDIF0_EXT_CLK), 90 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHB), 91 IMX_PINCTRL_PIN(IMX8QXP_SPI3_SCK), 92 IMX_PINCTRL_PIN(IMX8QXP_SPI3_SDO), 93 IMX_PINCTRL_PIN(IMX8QXP_SPI3_SDI), 94 IMX_PINCTRL_PIN(IMX8QXP_SPI3_CS0), 95 IMX_PINCTRL_PIN(IMX8QXP_SPI3_CS1), 96 IMX_PINCTRL_PIN(IMX8QXP_MCLK_IN1), 97 IMX_PINCTRL_PIN(IMX8QXP_MCLK_IN0), 98 IMX_PINCTRL_PIN(IMX8QXP_MCLK_OUT0), 99 IMX_PINCTRL_PIN(IMX8QXP_UART1_TX), 100 IMX_PINCTRL_PIN(IMX8QXP_UART1_RX), 101 IMX_PINCTRL_PIN(IMX8QXP_UART1_RTS_B), 102 IMX_PINCTRL_PIN(IMX8QXP_UART1_CTS_B), 103 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHK), 104 IMX_PINCTRL_PIN(IMX8QXP_SAI0_TXD), 105 IMX_PINCTRL_PIN(IMX8QXP_SAI0_TXC), 106 IMX_PINCTRL_PIN(IMX8QXP_SAI0_RXD), 107 IMX_PINCTRL_PIN(IMX8QXP_SAI0_TXFS), 108 IMX_PINCTRL_PIN(IMX8QXP_SAI1_RXD), 109 IMX_PINCTRL_PIN(IMX8QXP_SAI1_RXC), 110 IMX_PINCTRL_PIN(IMX8QXP_SAI1_RXFS), 111 IMX_PINCTRL_PIN(IMX8QXP_SPI2_CS0), 112 IMX_PINCTRL_PIN(IMX8QXP_SPI2_SDO), 113 IMX_PINCTRL_PIN(IMX8QXP_SPI2_SDI), 114 IMX_PINCTRL_PIN(IMX8QXP_SPI2_SCK), 115 IMX_PINCTRL_PIN(IMX8QXP_SPI0_SCK), 116 IMX_PINCTRL_PIN(IMX8QXP_SPI0_SDI), 117 IMX_PINCTRL_PIN(IMX8QXP_SPI0_SDO), 118 IMX_PINCTRL_PIN(IMX8QXP_SPI0_CS1), 119 IMX_PINCTRL_PIN(IMX8QXP_SPI0_CS0), 120 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHT), 121 IMX_PINCTRL_PIN(IMX8QXP_ADC_IN1), 122 IMX_PINCTRL_PIN(IMX8QXP_ADC_IN0), 123 IMX_PINCTRL_PIN(IMX8QXP_ADC_IN3), 124 IMX_PINCTRL_PIN(IMX8QXP_ADC_IN2), 125 IMX_PINCTRL_PIN(IMX8QXP_ADC_IN5), 126 IMX_PINCTRL_PIN(IMX8QXP_ADC_IN4), 127 IMX_PINCTRL_PIN(IMX8QXP_FLEXCAN0_RX), 128 IMX_PINCTRL_PIN(IMX8QXP_FLEXCAN0_TX), 129 IMX_PINCTRL_PIN(IMX8QXP_FLEXCAN1_RX), 130 IMX_PINCTRL_PIN(IMX8QXP_FLEXCAN1_TX), 131 IMX_PINCTRL_PIN(IMX8QXP_FLEXCAN2_RX), 132 IMX_PINCTRL_PIN(IMX8QXP_FLEXCAN2_TX), 133 IMX_PINCTRL_PIN(IMX8QXP_UART0_RX), 134 IMX_PINCTRL_PIN(IMX8QXP_UART0_TX), 135 IMX_PINCTRL_PIN(IMX8QXP_UART2_TX), 136 IMX_PINCTRL_PIN(IMX8QXP_UART2_RX), 137 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIOLH), 138 IMX_PINCTRL_PIN(IMX8QXP_MIPI_DSI0_I2C0_SCL), 139 IMX_PINCTRL_PIN(IMX8QXP_MIPI_DSI0_I2C0_SDA), 140 IMX_PINCTRL_PIN(IMX8QXP_MIPI_DSI0_GPIO0_00), 141 IMX_PINCTRL_PIN(IMX8QXP_MIPI_DSI0_GPIO0_01), 142 IMX_PINCTRL_PIN(IMX8QXP_MIPI_DSI1_I2C0_SCL), 143 IMX_PINCTRL_PIN(IMX8QXP_MIPI_DSI1_I2C0_SDA), 144 IMX_PINCTRL_PIN(IMX8QXP_MIPI_DSI1_GPIO0_00), 145 IMX_PINCTRL_PIN(IMX8QXP_MIPI_DSI1_GPIO0_01), 146 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_MIPIDSIGPIO), 147 IMX_PINCTRL_PIN(IMX8QXP_JTAG_TRST_B), 148 IMX_PINCTRL_PIN(IMX8QXP_PMIC_I2C_SCL), 149 IMX_PINCTRL_PIN(IMX8QXP_PMIC_I2C_SDA), 150 IMX_PINCTRL_PIN(IMX8QXP_PMIC_INT_B), 151 IMX_PINCTRL_PIN(IMX8QXP_SCU_GPIO0_00), 152 IMX_PINCTRL_PIN(IMX8QXP_SCU_GPIO0_01), 153 IMX_PINCTRL_PIN(IMX8QXP_SCU_PMIC_STANDBY), 154 IMX_PINCTRL_PIN(IMX8QXP_SCU_BOOT_MODE0), 155 IMX_PINCTRL_PIN(IMX8QXP_SCU_BOOT_MODE1), 156 IMX_PINCTRL_PIN(IMX8QXP_SCU_BOOT_MODE2), 157 IMX_PINCTRL_PIN(IMX8QXP_SCU_BOOT_MODE3), 158 IMX_PINCTRL_PIN(IMX8QXP_CSI_D00), 159 IMX_PINCTRL_PIN(IMX8QXP_CSI_D01), 160 IMX_PINCTRL_PIN(IMX8QXP_CSI_D02), 161 IMX_PINCTRL_PIN(IMX8QXP_CSI_D03), 162 IMX_PINCTRL_PIN(IMX8QXP_CSI_D04), 163 IMX_PINCTRL_PIN(IMX8QXP_CSI_D05), 164 IMX_PINCTRL_PIN(IMX8QXP_CSI_D06), 165 IMX_PINCTRL_PIN(IMX8QXP_CSI_D07), 166 IMX_PINCTRL_PIN(IMX8QXP_CSI_HSYNC), 167 IMX_PINCTRL_PIN(IMX8QXP_CSI_VSYNC), 168 IMX_PINCTRL_PIN(IMX8QXP_CSI_PCLK), 169 IMX_PINCTRL_PIN(IMX8QXP_CSI_MCLK), 170 IMX_PINCTRL_PIN(IMX8QXP_CSI_EN), 171 IMX_PINCTRL_PIN(IMX8QXP_CSI_RESET), 172 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHD), 173 IMX_PINCTRL_PIN(IMX8QXP_MIPI_CSI0_MCLK_OUT), 174 IMX_PINCTRL_PIN(IMX8QXP_MIPI_CSI0_I2C0_SCL), 175 IMX_PINCTRL_PIN(IMX8QXP_MIPI_CSI0_I2C0_SDA), 176 IMX_PINCTRL_PIN(IMX8QXP_MIPI_CSI0_GPIO0_01), 177 IMX_PINCTRL_PIN(IMX8QXP_MIPI_CSI0_GPIO0_00), 178 IMX_PINCTRL_PIN(IMX8QXP_QSPI0A_DATA0), 179 IMX_PINCTRL_PIN(IMX8QXP_QSPI0A_DATA1), 180 IMX_PINCTRL_PIN(IMX8QXP_QSPI0A_DATA2), 181 IMX_PINCTRL_PIN(IMX8QXP_QSPI0A_DATA3), 182 IMX_PINCTRL_PIN(IMX8QXP_QSPI0A_DQS), 183 IMX_PINCTRL_PIN(IMX8QXP_QSPI0A_SS0_B), 184 IMX_PINCTRL_PIN(IMX8QXP_QSPI0A_SS1_B), 185 IMX_PINCTRL_PIN(IMX8QXP_QSPI0A_SCLK), 186 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_QSPI0A), 187 IMX_PINCTRL_PIN(IMX8QXP_QSPI0B_SCLK), 188 IMX_PINCTRL_PIN(IMX8QXP_QSPI0B_DATA0), 189 IMX_PINCTRL_PIN(IMX8QXP_QSPI0B_DATA1), 190 IMX_PINCTRL_PIN(IMX8QXP_QSPI0B_DATA2), 191 IMX_PINCTRL_PIN(IMX8QXP_QSPI0B_DATA3), 192 IMX_PINCTRL_PIN(IMX8QXP_QSPI0B_DQS), 193 IMX_PINCTRL_PIN(IMX8QXP_QSPI0B_SS0_B), 194 IMX_PINCTRL_PIN(IMX8QXP_QSPI0B_SS1_B), 195 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_QSPI0B), 196}; 197 198static const struct imx_pinctrl_soc_info imx8qxp_pinctrl_info = { 199 .pins = imx8qxp_pinctrl_pads, 200 .npins = ARRAY_SIZE(imx8qxp_pinctrl_pads), 201 .flags = IMX_USE_SCU, 202 .imx_pinconf_get = imx_pinconf_get_scu, 203 .imx_pinconf_set = imx_pinconf_set_scu, 204 .imx_pinctrl_parse_pin = imx_pinctrl_parse_pin_scu, 205}; 206 207static const struct of_device_id imx8qxp_pinctrl_of_match[] = { 208 { .compatible = "fsl,imx8qxp-iomuxc", }, 209 { /* sentinel */ } 210}; 211MODULE_DEVICE_TABLE(of, imx8qxp_pinctrl_of_match); 212 213static int imx8qxp_pinctrl_probe(struct platform_device *pdev) 214{ 215 int ret; 216 217 ret = imx_pinctrl_sc_ipc_init(pdev); 218 if (ret) 219 return ret; 220 221 return imx_pinctrl_probe(pdev, &imx8qxp_pinctrl_info); 222} 223 224static struct platform_driver imx8qxp_pinctrl_driver = { 225 .driver = { 226 .name = "imx8qxp-pinctrl", 227 .of_match_table = imx8qxp_pinctrl_of_match, 228 .suppress_bind_attrs = true, 229 }, 230 .probe = imx8qxp_pinctrl_probe, 231}; 232 233static int __init imx8qxp_pinctrl_init(void) 234{ 235 return platform_driver_register(&imx8qxp_pinctrl_driver); 236} 237arch_initcall(imx8qxp_pinctrl_init); 238 239MODULE_AUTHOR("Aisheng Dong <aisheng.dong@nxp.com>"); 240MODULE_DESCRIPTION("NXP i.MX8QXP pinctrl driver"); 241MODULE_LICENSE("GPL v2"); 242