1// SPDX-License-Identifier: GPL-2.0+
2//
3// Freescale i.MX28 pinctrl driver
4//
5// Author: Shawn Guo <shawn.guo@linaro.org>
6// Copyright 2012 Freescale Semiconductor, Inc.
7
8#include <linux/init.h>
9#include <linux/mod_devicetable.h>
10#include <linux/platform_device.h>
11#include <linux/pinctrl/pinctrl.h>
12#include "pinctrl-mxs.h"
13
14enum imx28_pin_enum {
15	GPMI_D00	= PINID(0, 0),
16	GPMI_D01	= PINID(0, 1),
17	GPMI_D02	= PINID(0, 2),
18	GPMI_D03	= PINID(0, 3),
19	GPMI_D04	= PINID(0, 4),
20	GPMI_D05	= PINID(0, 5),
21	GPMI_D06	= PINID(0, 6),
22	GPMI_D07	= PINID(0, 7),
23	GPMI_CE0N	= PINID(0, 16),
24	GPMI_CE1N	= PINID(0, 17),
25	GPMI_CE2N	= PINID(0, 18),
26	GPMI_CE3N	= PINID(0, 19),
27	GPMI_RDY0	= PINID(0, 20),
28	GPMI_RDY1	= PINID(0, 21),
29	GPMI_RDY2	= PINID(0, 22),
30	GPMI_RDY3	= PINID(0, 23),
31	GPMI_RDN	= PINID(0, 24),
32	GPMI_WRN	= PINID(0, 25),
33	GPMI_ALE	= PINID(0, 26),
34	GPMI_CLE	= PINID(0, 27),
35	GPMI_RESETN	= PINID(0, 28),
36	LCD_D00		= PINID(1, 0),
37	LCD_D01		= PINID(1, 1),
38	LCD_D02		= PINID(1, 2),
39	LCD_D03		= PINID(1, 3),
40	LCD_D04		= PINID(1, 4),
41	LCD_D05		= PINID(1, 5),
42	LCD_D06		= PINID(1, 6),
43	LCD_D07		= PINID(1, 7),
44	LCD_D08		= PINID(1, 8),
45	LCD_D09		= PINID(1, 9),
46	LCD_D10		= PINID(1, 10),
47	LCD_D11		= PINID(1, 11),
48	LCD_D12		= PINID(1, 12),
49	LCD_D13		= PINID(1, 13),
50	LCD_D14		= PINID(1, 14),
51	LCD_D15		= PINID(1, 15),
52	LCD_D16		= PINID(1, 16),
53	LCD_D17		= PINID(1, 17),
54	LCD_D18		= PINID(1, 18),
55	LCD_D19		= PINID(1, 19),
56	LCD_D20		= PINID(1, 20),
57	LCD_D21		= PINID(1, 21),
58	LCD_D22		= PINID(1, 22),
59	LCD_D23		= PINID(1, 23),
60	LCD_RD_E	= PINID(1, 24),
61	LCD_WR_RWN	= PINID(1, 25),
62	LCD_RS		= PINID(1, 26),
63	LCD_CS		= PINID(1, 27),
64	LCD_VSYNC	= PINID(1, 28),
65	LCD_HSYNC	= PINID(1, 29),
66	LCD_DOTCLK	= PINID(1, 30),
67	LCD_ENABLE	= PINID(1, 31),
68	SSP0_DATA0	= PINID(2, 0),
69	SSP0_DATA1	= PINID(2, 1),
70	SSP0_DATA2	= PINID(2, 2),
71	SSP0_DATA3	= PINID(2, 3),
72	SSP0_DATA4	= PINID(2, 4),
73	SSP0_DATA5	= PINID(2, 5),
74	SSP0_DATA6	= PINID(2, 6),
75	SSP0_DATA7	= PINID(2, 7),
76	SSP0_CMD	= PINID(2, 8),
77	SSP0_DETECT	= PINID(2, 9),
78	SSP0_SCK	= PINID(2, 10),
79	SSP1_SCK	= PINID(2, 12),
80	SSP1_CMD	= PINID(2, 13),
81	SSP1_DATA0	= PINID(2, 14),
82	SSP1_DATA3	= PINID(2, 15),
83	SSP2_SCK	= PINID(2, 16),
84	SSP2_MOSI	= PINID(2, 17),
85	SSP2_MISO	= PINID(2, 18),
86	SSP2_SS0	= PINID(2, 19),
87	SSP2_SS1	= PINID(2, 20),
88	SSP2_SS2	= PINID(2, 21),
89	SSP3_SCK	= PINID(2, 24),
90	SSP3_MOSI	= PINID(2, 25),
91	SSP3_MISO	= PINID(2, 26),
92	SSP3_SS0	= PINID(2, 27),
93	AUART0_RX	= PINID(3, 0),
94	AUART0_TX	= PINID(3, 1),
95	AUART0_CTS	= PINID(3, 2),
96	AUART0_RTS	= PINID(3, 3),
97	AUART1_RX	= PINID(3, 4),
98	AUART1_TX	= PINID(3, 5),
99	AUART1_CTS	= PINID(3, 6),
100	AUART1_RTS	= PINID(3, 7),
101	AUART2_RX	= PINID(3, 8),
102	AUART2_TX	= PINID(3, 9),
103	AUART2_CTS	= PINID(3, 10),
104	AUART2_RTS	= PINID(3, 11),
105	AUART3_RX	= PINID(3, 12),
106	AUART3_TX	= PINID(3, 13),
107	AUART3_CTS	= PINID(3, 14),
108	AUART3_RTS	= PINID(3, 15),
109	PWM0		= PINID(3, 16),
110	PWM1		= PINID(3, 17),
111	PWM2		= PINID(3, 18),
112	SAIF0_MCLK	= PINID(3, 20),
113	SAIF0_LRCLK	= PINID(3, 21),
114	SAIF0_BITCLK	= PINID(3, 22),
115	SAIF0_SDATA0	= PINID(3, 23),
116	I2C0_SCL	= PINID(3, 24),
117	I2C0_SDA	= PINID(3, 25),
118	SAIF1_SDATA0	= PINID(3, 26),
119	SPDIF		= PINID(3, 27),
120	PWM3		= PINID(3, 28),
121	PWM4		= PINID(3, 29),
122	LCD_RESET	= PINID(3, 30),
123	ENET0_MDC	= PINID(4, 0),
124	ENET0_MDIO	= PINID(4, 1),
125	ENET0_RX_EN	= PINID(4, 2),
126	ENET0_RXD0	= PINID(4, 3),
127	ENET0_RXD1	= PINID(4, 4),
128	ENET0_TX_CLK	= PINID(4, 5),
129	ENET0_TX_EN	= PINID(4, 6),
130	ENET0_TXD0	= PINID(4, 7),
131	ENET0_TXD1	= PINID(4, 8),
132	ENET0_RXD2	= PINID(4, 9),
133	ENET0_RXD3	= PINID(4, 10),
134	ENET0_TXD2	= PINID(4, 11),
135	ENET0_TXD3	= PINID(4, 12),
136	ENET0_RX_CLK	= PINID(4, 13),
137	ENET0_COL	= PINID(4, 14),
138	ENET0_CRS	= PINID(4, 15),
139	ENET_CLK	= PINID(4, 16),
140	JTAG_RTCK	= PINID(4, 20),
141	EMI_D00		= PINID(5, 0),
142	EMI_D01		= PINID(5, 1),
143	EMI_D02		= PINID(5, 2),
144	EMI_D03		= PINID(5, 3),
145	EMI_D04		= PINID(5, 4),
146	EMI_D05		= PINID(5, 5),
147	EMI_D06		= PINID(5, 6),
148	EMI_D07		= PINID(5, 7),
149	EMI_D08		= PINID(5, 8),
150	EMI_D09		= PINID(5, 9),
151	EMI_D10		= PINID(5, 10),
152	EMI_D11		= PINID(5, 11),
153	EMI_D12		= PINID(5, 12),
154	EMI_D13		= PINID(5, 13),
155	EMI_D14		= PINID(5, 14),
156	EMI_D15		= PINID(5, 15),
157	EMI_ODT0	= PINID(5, 16),
158	EMI_DQM0	= PINID(5, 17),
159	EMI_ODT1	= PINID(5, 18),
160	EMI_DQM1	= PINID(5, 19),
161	EMI_DDR_OPEN_FB	= PINID(5, 20),
162	EMI_CLK		= PINID(5, 21),
163	EMI_DQS0	= PINID(5, 22),
164	EMI_DQS1	= PINID(5, 23),
165	EMI_DDR_OPEN	= PINID(5, 26),
166	EMI_A00		= PINID(6, 0),
167	EMI_A01		= PINID(6, 1),
168	EMI_A02		= PINID(6, 2),
169	EMI_A03		= PINID(6, 3),
170	EMI_A04		= PINID(6, 4),
171	EMI_A05		= PINID(6, 5),
172	EMI_A06		= PINID(6, 6),
173	EMI_A07		= PINID(6, 7),
174	EMI_A08		= PINID(6, 8),
175	EMI_A09		= PINID(6, 9),
176	EMI_A10		= PINID(6, 10),
177	EMI_A11		= PINID(6, 11),
178	EMI_A12		= PINID(6, 12),
179	EMI_A13		= PINID(6, 13),
180	EMI_A14		= PINID(6, 14),
181	EMI_BA0		= PINID(6, 16),
182	EMI_BA1		= PINID(6, 17),
183	EMI_BA2		= PINID(6, 18),
184	EMI_CASN	= PINID(6, 19),
185	EMI_RASN	= PINID(6, 20),
186	EMI_WEN		= PINID(6, 21),
187	EMI_CE0N	= PINID(6, 22),
188	EMI_CE1N	= PINID(6, 23),
189	EMI_CKE		= PINID(6, 24),
190};
191
192static const struct pinctrl_pin_desc imx28_pins[] = {
193	MXS_PINCTRL_PIN(GPMI_D00),
194	MXS_PINCTRL_PIN(GPMI_D01),
195	MXS_PINCTRL_PIN(GPMI_D02),
196	MXS_PINCTRL_PIN(GPMI_D03),
197	MXS_PINCTRL_PIN(GPMI_D04),
198	MXS_PINCTRL_PIN(GPMI_D05),
199	MXS_PINCTRL_PIN(GPMI_D06),
200	MXS_PINCTRL_PIN(GPMI_D07),
201	MXS_PINCTRL_PIN(GPMI_CE0N),
202	MXS_PINCTRL_PIN(GPMI_CE1N),
203	MXS_PINCTRL_PIN(GPMI_CE2N),
204	MXS_PINCTRL_PIN(GPMI_CE3N),
205	MXS_PINCTRL_PIN(GPMI_RDY0),
206	MXS_PINCTRL_PIN(GPMI_RDY1),
207	MXS_PINCTRL_PIN(GPMI_RDY2),
208	MXS_PINCTRL_PIN(GPMI_RDY3),
209	MXS_PINCTRL_PIN(GPMI_RDN),
210	MXS_PINCTRL_PIN(GPMI_WRN),
211	MXS_PINCTRL_PIN(GPMI_ALE),
212	MXS_PINCTRL_PIN(GPMI_CLE),
213	MXS_PINCTRL_PIN(GPMI_RESETN),
214	MXS_PINCTRL_PIN(LCD_D00),
215	MXS_PINCTRL_PIN(LCD_D01),
216	MXS_PINCTRL_PIN(LCD_D02),
217	MXS_PINCTRL_PIN(LCD_D03),
218	MXS_PINCTRL_PIN(LCD_D04),
219	MXS_PINCTRL_PIN(LCD_D05),
220	MXS_PINCTRL_PIN(LCD_D06),
221	MXS_PINCTRL_PIN(LCD_D07),
222	MXS_PINCTRL_PIN(LCD_D08),
223	MXS_PINCTRL_PIN(LCD_D09),
224	MXS_PINCTRL_PIN(LCD_D10),
225	MXS_PINCTRL_PIN(LCD_D11),
226	MXS_PINCTRL_PIN(LCD_D12),
227	MXS_PINCTRL_PIN(LCD_D13),
228	MXS_PINCTRL_PIN(LCD_D14),
229	MXS_PINCTRL_PIN(LCD_D15),
230	MXS_PINCTRL_PIN(LCD_D16),
231	MXS_PINCTRL_PIN(LCD_D17),
232	MXS_PINCTRL_PIN(LCD_D18),
233	MXS_PINCTRL_PIN(LCD_D19),
234	MXS_PINCTRL_PIN(LCD_D20),
235	MXS_PINCTRL_PIN(LCD_D21),
236	MXS_PINCTRL_PIN(LCD_D22),
237	MXS_PINCTRL_PIN(LCD_D23),
238	MXS_PINCTRL_PIN(LCD_RD_E),
239	MXS_PINCTRL_PIN(LCD_WR_RWN),
240	MXS_PINCTRL_PIN(LCD_RS),
241	MXS_PINCTRL_PIN(LCD_CS),
242	MXS_PINCTRL_PIN(LCD_VSYNC),
243	MXS_PINCTRL_PIN(LCD_HSYNC),
244	MXS_PINCTRL_PIN(LCD_DOTCLK),
245	MXS_PINCTRL_PIN(LCD_ENABLE),
246	MXS_PINCTRL_PIN(SSP0_DATA0),
247	MXS_PINCTRL_PIN(SSP0_DATA1),
248	MXS_PINCTRL_PIN(SSP0_DATA2),
249	MXS_PINCTRL_PIN(SSP0_DATA3),
250	MXS_PINCTRL_PIN(SSP0_DATA4),
251	MXS_PINCTRL_PIN(SSP0_DATA5),
252	MXS_PINCTRL_PIN(SSP0_DATA6),
253	MXS_PINCTRL_PIN(SSP0_DATA7),
254	MXS_PINCTRL_PIN(SSP0_CMD),
255	MXS_PINCTRL_PIN(SSP0_DETECT),
256	MXS_PINCTRL_PIN(SSP0_SCK),
257	MXS_PINCTRL_PIN(SSP1_SCK),
258	MXS_PINCTRL_PIN(SSP1_CMD),
259	MXS_PINCTRL_PIN(SSP1_DATA0),
260	MXS_PINCTRL_PIN(SSP1_DATA3),
261	MXS_PINCTRL_PIN(SSP2_SCK),
262	MXS_PINCTRL_PIN(SSP2_MOSI),
263	MXS_PINCTRL_PIN(SSP2_MISO),
264	MXS_PINCTRL_PIN(SSP2_SS0),
265	MXS_PINCTRL_PIN(SSP2_SS1),
266	MXS_PINCTRL_PIN(SSP2_SS2),
267	MXS_PINCTRL_PIN(SSP3_SCK),
268	MXS_PINCTRL_PIN(SSP3_MOSI),
269	MXS_PINCTRL_PIN(SSP3_MISO),
270	MXS_PINCTRL_PIN(SSP3_SS0),
271	MXS_PINCTRL_PIN(AUART0_RX),
272	MXS_PINCTRL_PIN(AUART0_TX),
273	MXS_PINCTRL_PIN(AUART0_CTS),
274	MXS_PINCTRL_PIN(AUART0_RTS),
275	MXS_PINCTRL_PIN(AUART1_RX),
276	MXS_PINCTRL_PIN(AUART1_TX),
277	MXS_PINCTRL_PIN(AUART1_CTS),
278	MXS_PINCTRL_PIN(AUART1_RTS),
279	MXS_PINCTRL_PIN(AUART2_RX),
280	MXS_PINCTRL_PIN(AUART2_TX),
281	MXS_PINCTRL_PIN(AUART2_CTS),
282	MXS_PINCTRL_PIN(AUART2_RTS),
283	MXS_PINCTRL_PIN(AUART3_RX),
284	MXS_PINCTRL_PIN(AUART3_TX),
285	MXS_PINCTRL_PIN(AUART3_CTS),
286	MXS_PINCTRL_PIN(AUART3_RTS),
287	MXS_PINCTRL_PIN(PWM0),
288	MXS_PINCTRL_PIN(PWM1),
289	MXS_PINCTRL_PIN(PWM2),
290	MXS_PINCTRL_PIN(SAIF0_MCLK),
291	MXS_PINCTRL_PIN(SAIF0_LRCLK),
292	MXS_PINCTRL_PIN(SAIF0_BITCLK),
293	MXS_PINCTRL_PIN(SAIF0_SDATA0),
294	MXS_PINCTRL_PIN(I2C0_SCL),
295	MXS_PINCTRL_PIN(I2C0_SDA),
296	MXS_PINCTRL_PIN(SAIF1_SDATA0),
297	MXS_PINCTRL_PIN(SPDIF),
298	MXS_PINCTRL_PIN(PWM3),
299	MXS_PINCTRL_PIN(PWM4),
300	MXS_PINCTRL_PIN(LCD_RESET),
301	MXS_PINCTRL_PIN(ENET0_MDC),
302	MXS_PINCTRL_PIN(ENET0_MDIO),
303	MXS_PINCTRL_PIN(ENET0_RX_EN),
304	MXS_PINCTRL_PIN(ENET0_RXD0),
305	MXS_PINCTRL_PIN(ENET0_RXD1),
306	MXS_PINCTRL_PIN(ENET0_TX_CLK),
307	MXS_PINCTRL_PIN(ENET0_TX_EN),
308	MXS_PINCTRL_PIN(ENET0_TXD0),
309	MXS_PINCTRL_PIN(ENET0_TXD1),
310	MXS_PINCTRL_PIN(ENET0_RXD2),
311	MXS_PINCTRL_PIN(ENET0_RXD3),
312	MXS_PINCTRL_PIN(ENET0_TXD2),
313	MXS_PINCTRL_PIN(ENET0_TXD3),
314	MXS_PINCTRL_PIN(ENET0_RX_CLK),
315	MXS_PINCTRL_PIN(ENET0_COL),
316	MXS_PINCTRL_PIN(ENET0_CRS),
317	MXS_PINCTRL_PIN(ENET_CLK),
318	MXS_PINCTRL_PIN(JTAG_RTCK),
319	MXS_PINCTRL_PIN(EMI_D00),
320	MXS_PINCTRL_PIN(EMI_D01),
321	MXS_PINCTRL_PIN(EMI_D02),
322	MXS_PINCTRL_PIN(EMI_D03),
323	MXS_PINCTRL_PIN(EMI_D04),
324	MXS_PINCTRL_PIN(EMI_D05),
325	MXS_PINCTRL_PIN(EMI_D06),
326	MXS_PINCTRL_PIN(EMI_D07),
327	MXS_PINCTRL_PIN(EMI_D08),
328	MXS_PINCTRL_PIN(EMI_D09),
329	MXS_PINCTRL_PIN(EMI_D10),
330	MXS_PINCTRL_PIN(EMI_D11),
331	MXS_PINCTRL_PIN(EMI_D12),
332	MXS_PINCTRL_PIN(EMI_D13),
333	MXS_PINCTRL_PIN(EMI_D14),
334	MXS_PINCTRL_PIN(EMI_D15),
335	MXS_PINCTRL_PIN(EMI_ODT0),
336	MXS_PINCTRL_PIN(EMI_DQM0),
337	MXS_PINCTRL_PIN(EMI_ODT1),
338	MXS_PINCTRL_PIN(EMI_DQM1),
339	MXS_PINCTRL_PIN(EMI_DDR_OPEN_FB),
340	MXS_PINCTRL_PIN(EMI_CLK),
341	MXS_PINCTRL_PIN(EMI_DQS0),
342	MXS_PINCTRL_PIN(EMI_DQS1),
343	MXS_PINCTRL_PIN(EMI_DDR_OPEN),
344	MXS_PINCTRL_PIN(EMI_A00),
345	MXS_PINCTRL_PIN(EMI_A01),
346	MXS_PINCTRL_PIN(EMI_A02),
347	MXS_PINCTRL_PIN(EMI_A03),
348	MXS_PINCTRL_PIN(EMI_A04),
349	MXS_PINCTRL_PIN(EMI_A05),
350	MXS_PINCTRL_PIN(EMI_A06),
351	MXS_PINCTRL_PIN(EMI_A07),
352	MXS_PINCTRL_PIN(EMI_A08),
353	MXS_PINCTRL_PIN(EMI_A09),
354	MXS_PINCTRL_PIN(EMI_A10),
355	MXS_PINCTRL_PIN(EMI_A11),
356	MXS_PINCTRL_PIN(EMI_A12),
357	MXS_PINCTRL_PIN(EMI_A13),
358	MXS_PINCTRL_PIN(EMI_A14),
359	MXS_PINCTRL_PIN(EMI_BA0),
360	MXS_PINCTRL_PIN(EMI_BA1),
361	MXS_PINCTRL_PIN(EMI_BA2),
362	MXS_PINCTRL_PIN(EMI_CASN),
363	MXS_PINCTRL_PIN(EMI_RASN),
364	MXS_PINCTRL_PIN(EMI_WEN),
365	MXS_PINCTRL_PIN(EMI_CE0N),
366	MXS_PINCTRL_PIN(EMI_CE1N),
367	MXS_PINCTRL_PIN(EMI_CKE),
368};
369
370static const struct mxs_regs imx28_regs = {
371	.muxsel = 0x100,
372	.drive = 0x300,
373	.pull = 0x600,
374};
375
376static struct mxs_pinctrl_soc_data imx28_pinctrl_data = {
377	.regs = &imx28_regs,
378	.pins = imx28_pins,
379	.npins = ARRAY_SIZE(imx28_pins),
380};
381
382static int imx28_pinctrl_probe(struct platform_device *pdev)
383{
384	return mxs_pinctrl_probe(pdev, &imx28_pinctrl_data);
385}
386
387static const struct of_device_id imx28_pinctrl_of_match[] = {
388	{ .compatible = "fsl,imx28-pinctrl", },
389	{ /* sentinel */ }
390};
391
392static struct platform_driver imx28_pinctrl_driver = {
393	.driver = {
394		.name = "imx28-pinctrl",
395		.suppress_bind_attrs = true,
396		.of_match_table = imx28_pinctrl_of_match,
397	},
398	.probe = imx28_pinctrl_probe,
399};
400
401static int __init imx28_pinctrl_init(void)
402{
403	return platform_driver_register(&imx28_pinctrl_driver);
404}
405postcore_initcall(imx28_pinctrl_init);
406