1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6#ifndef _NVME_H 7#define _NVME_H 8 9#include <linux/nvme.h> 10#include <linux/cdev.h> 11#include <linux/pci.h> 12#include <linux/kref.h> 13#include <linux/blk-mq.h> 14#include <linux/sed-opal.h> 15#include <linux/fault-inject.h> 16#include <linux/rcupdate.h> 17#include <linux/wait.h> 18#include <linux/t10-pi.h> 19#include <linux/ratelimit_types.h> 20 21#include <trace/events/block.h> 22 23extern const struct pr_ops nvme_pr_ops; 24 25extern unsigned int nvme_io_timeout; 26#define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 27 28extern unsigned int admin_timeout; 29#define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 30 31#define NVME_DEFAULT_KATO 5 32 33#ifdef CONFIG_ARCH_NO_SG_CHAIN 34#define NVME_INLINE_SG_CNT 0 35#define NVME_INLINE_METADATA_SG_CNT 0 36#else 37#define NVME_INLINE_SG_CNT 2 38#define NVME_INLINE_METADATA_SG_CNT 1 39#endif 40 41/* 42 * Default to a 4K page size, with the intention to update this 43 * path in the future to accommodate architectures with differing 44 * kernel and IO page sizes. 45 */ 46#define NVME_CTRL_PAGE_SHIFT 12 47#define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 48 49extern struct workqueue_struct *nvme_wq; 50extern struct workqueue_struct *nvme_reset_wq; 51extern struct workqueue_struct *nvme_delete_wq; 52 53/* 54 * List of workarounds for devices that required behavior not specified in 55 * the standard. 56 */ 57enum nvme_quirks { 58 /* 59 * Prefers I/O aligned to a stripe size specified in a vendor 60 * specific Identify field. 61 */ 62 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 63 64 /* 65 * The controller doesn't handle Identify value others than 0 or 1 66 * correctly. 67 */ 68 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 69 70 /* 71 * The controller deterministically returns O's on reads to 72 * logical blocks that deallocate was called on. 73 */ 74 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 75 76 /* 77 * The controller needs a delay before starts checking the device 78 * readiness, which is done by reading the NVME_CSTS_RDY bit. 79 */ 80 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 81 82 /* 83 * APST should not be used. 84 */ 85 NVME_QUIRK_NO_APST = (1 << 4), 86 87 /* 88 * The deepest sleep state should not be used. 89 */ 90 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 91 92 /* 93 * Set MEDIUM priority on SQ creation 94 */ 95 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 96 97 /* 98 * Ignore device provided subnqn. 99 */ 100 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 101 102 /* 103 * Broken Write Zeroes. 104 */ 105 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 106 107 /* 108 * Force simple suspend/resume path. 109 */ 110 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 111 112 /* 113 * Use only one interrupt vector for all queues 114 */ 115 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 116 117 /* 118 * Use non-standard 128 bytes SQEs. 119 */ 120 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 121 122 /* 123 * Prevent tag overlap between queues 124 */ 125 NVME_QUIRK_SHARED_TAGS = (1 << 13), 126 127 /* 128 * Don't change the value of the temperature threshold feature 129 */ 130 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 131 132 /* 133 * The controller doesn't handle the Identify Namespace 134 * Identification Descriptor list subcommand despite claiming 135 * NVMe 1.3 compliance. 136 */ 137 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 138 139 /* 140 * The controller does not properly handle DMA addresses over 141 * 48 bits. 142 */ 143 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 144 145 /* 146 * The controller requires the command_id value be limited, so skip 147 * encoding the generation sequence number. 148 */ 149 NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 150 151 /* 152 * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 153 */ 154 NVME_QUIRK_BOGUS_NID = (1 << 18), 155 156 /* 157 * No temperature thresholds for channels other than 0 (Composite). 158 */ 159 NVME_QUIRK_NO_SECONDARY_TEMP_THRESH = (1 << 19), 160 161 /* 162 * Disables simple suspend/resume path. 163 */ 164 NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND = (1 << 20), 165}; 166 167/* 168 * Common request structure for NVMe passthrough. All drivers must have 169 * this structure as the first member of their request-private data. 170 */ 171struct nvme_request { 172 struct nvme_command *cmd; 173 union nvme_result result; 174 u8 genctr; 175 u8 retries; 176 u8 flags; 177 u16 status; 178#ifdef CONFIG_NVME_MULTIPATH 179 unsigned long start_time; 180#endif 181 struct nvme_ctrl *ctrl; 182}; 183 184/* 185 * Mark a bio as coming in through the mpath node. 186 */ 187#define REQ_NVME_MPATH REQ_DRV 188 189enum { 190 NVME_REQ_CANCELLED = (1 << 0), 191 NVME_REQ_USERCMD = (1 << 1), 192 NVME_MPATH_IO_STATS = (1 << 2), 193}; 194 195static inline struct nvme_request *nvme_req(struct request *req) 196{ 197 return blk_mq_rq_to_pdu(req); 198} 199 200static inline u16 nvme_req_qid(struct request *req) 201{ 202 if (!req->q->queuedata) 203 return 0; 204 205 return req->mq_hctx->queue_num + 1; 206} 207 208/* The below value is the specific amount of delay needed before checking 209 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 210 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 211 * found empirically. 212 */ 213#define NVME_QUIRK_DELAY_AMOUNT 2300 214 215/* 216 * enum nvme_ctrl_state: Controller state 217 * 218 * @NVME_CTRL_NEW: New controller just allocated, initial state 219 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 220 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 221 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 222 * transport 223 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 224 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 225 * disabled/failed immediately. This state comes 226 * after all async event processing took place and 227 * before ns removal and the controller deletion 228 * progress 229 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 230 * shutdown or removal. In this case we forcibly 231 * kill all inflight I/O as they have no chance to 232 * complete 233 */ 234enum nvme_ctrl_state { 235 NVME_CTRL_NEW, 236 NVME_CTRL_LIVE, 237 NVME_CTRL_RESETTING, 238 NVME_CTRL_CONNECTING, 239 NVME_CTRL_DELETING, 240 NVME_CTRL_DELETING_NOIO, 241 NVME_CTRL_DEAD, 242}; 243 244struct nvme_fault_inject { 245#ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 246 struct fault_attr attr; 247 struct dentry *parent; 248 bool dont_retry; /* DNR, do not retry */ 249 u16 status; /* status code */ 250#endif 251}; 252 253enum nvme_ctrl_flags { 254 NVME_CTRL_FAILFAST_EXPIRED = 0, 255 NVME_CTRL_ADMIN_Q_STOPPED = 1, 256 NVME_CTRL_STARTED_ONCE = 2, 257 NVME_CTRL_STOPPED = 3, 258 NVME_CTRL_SKIP_ID_CNS_CS = 4, 259 NVME_CTRL_DIRTY_CAPABILITY = 5, 260 NVME_CTRL_FROZEN = 6, 261}; 262 263struct nvme_ctrl { 264 bool comp_seen; 265 bool identified; 266 bool passthru_err_log_enabled; 267 enum nvme_ctrl_state state; 268 spinlock_t lock; 269 struct mutex scan_lock; 270 const struct nvme_ctrl_ops *ops; 271 struct request_queue *admin_q; 272 struct request_queue *connect_q; 273 struct request_queue *fabrics_q; 274 struct device *dev; 275 int instance; 276 int numa_node; 277 struct blk_mq_tag_set *tagset; 278 struct blk_mq_tag_set *admin_tagset; 279 struct list_head namespaces; 280 struct rw_semaphore namespaces_rwsem; 281 struct device ctrl_device; 282 struct device *device; /* char device */ 283#ifdef CONFIG_NVME_HWMON 284 struct device *hwmon_device; 285#endif 286 struct cdev cdev; 287 struct work_struct reset_work; 288 struct work_struct delete_work; 289 wait_queue_head_t state_wq; 290 291 struct nvme_subsystem *subsys; 292 struct list_head subsys_entry; 293 294 struct opal_dev *opal_dev; 295 296 char name[12]; 297 u16 cntlid; 298 299 u16 mtfa; 300 u32 ctrl_config; 301 u32 queue_count; 302 303 u64 cap; 304 u32 max_hw_sectors; 305 u32 max_segments; 306 u32 max_integrity_segments; 307 u32 max_zeroes_sectors; 308#ifdef CONFIG_BLK_DEV_ZONED 309 u32 max_zone_append; 310#endif 311 u16 crdt[3]; 312 u16 oncs; 313 u8 dmrl; 314 u32 dmrsl; 315 u16 oacs; 316 u16 sqsize; 317 u32 max_namespaces; 318 atomic_t abort_limit; 319 u8 vwc; 320 u32 vs; 321 u32 sgls; 322 u16 kas; 323 u8 npss; 324 u8 apsta; 325 u16 wctemp; 326 u16 cctemp; 327 u32 oaes; 328 u32 aen_result; 329 u32 ctratt; 330 unsigned int shutdown_timeout; 331 unsigned int kato; 332 bool subsystem; 333 unsigned long quirks; 334 struct nvme_id_power_state psd[32]; 335 struct nvme_effects_log *effects; 336 struct xarray cels; 337 struct work_struct scan_work; 338 struct work_struct async_event_work; 339 struct delayed_work ka_work; 340 struct delayed_work failfast_work; 341 struct nvme_command ka_cmd; 342 unsigned long ka_last_check_time; 343 struct work_struct fw_act_work; 344 unsigned long events; 345 346#ifdef CONFIG_NVME_MULTIPATH 347 /* asymmetric namespace access: */ 348 u8 anacap; 349 u8 anatt; 350 u32 anagrpmax; 351 u32 nanagrpid; 352 struct mutex ana_lock; 353 struct nvme_ana_rsp_hdr *ana_log_buf; 354 size_t ana_log_size; 355 struct timer_list anatt_timer; 356 struct work_struct ana_work; 357#endif 358 359#ifdef CONFIG_NVME_HOST_AUTH 360 struct work_struct dhchap_auth_work; 361 struct mutex dhchap_auth_mutex; 362 struct nvme_dhchap_queue_context *dhchap_ctxs; 363 struct nvme_dhchap_key *host_key; 364 struct nvme_dhchap_key *ctrl_key; 365 u16 transaction; 366#endif 367 struct key *tls_key; 368 369 /* Power saving configuration */ 370 u64 ps_max_latency_us; 371 bool apst_enabled; 372 373 /* PCIe only: */ 374 u16 hmmaxd; 375 u32 hmpre; 376 u32 hmmin; 377 u32 hmminds; 378 379 /* Fabrics only */ 380 u32 ioccsz; 381 u32 iorcsz; 382 u16 icdoff; 383 u16 maxcmd; 384 int nr_reconnects; 385 unsigned long flags; 386 struct nvmf_ctrl_options *opts; 387 388 struct page *discard_page; 389 unsigned long discard_page_busy; 390 391 struct nvme_fault_inject fault_inject; 392 393 enum nvme_ctrl_type cntrltype; 394 enum nvme_dctype dctype; 395}; 396 397static inline enum nvme_ctrl_state nvme_ctrl_state(struct nvme_ctrl *ctrl) 398{ 399 return READ_ONCE(ctrl->state); 400} 401 402enum nvme_iopolicy { 403 NVME_IOPOLICY_NUMA, 404 NVME_IOPOLICY_RR, 405}; 406 407struct nvme_subsystem { 408 int instance; 409 struct device dev; 410 /* 411 * Because we unregister the device on the last put we need 412 * a separate refcount. 413 */ 414 struct kref ref; 415 struct list_head entry; 416 struct mutex lock; 417 struct list_head ctrls; 418 struct list_head nsheads; 419 char subnqn[NVMF_NQN_SIZE]; 420 char serial[20]; 421 char model[40]; 422 char firmware_rev[8]; 423 u8 cmic; 424 enum nvme_subsys_type subtype; 425 u16 vendor_id; 426 u16 awupf; /* 0's based awupf value. */ 427 struct ida ns_ida; 428#ifdef CONFIG_NVME_MULTIPATH 429 enum nvme_iopolicy iopolicy; 430#endif 431}; 432 433/* 434 * Container structure for uniqueue namespace identifiers. 435 */ 436struct nvme_ns_ids { 437 u8 eui64[8]; 438 u8 nguid[16]; 439 uuid_t uuid; 440 u8 csi; 441}; 442 443/* 444 * Anchor structure for namespaces. There is one for each namespace in a 445 * NVMe subsystem that any of our controllers can see, and the namespace 446 * structure for each controller is chained of it. For private namespaces 447 * there is a 1:1 relation to our namespace structures, that is ->list 448 * only ever has a single entry for private namespaces. 449 */ 450struct nvme_ns_head { 451 struct list_head list; 452 struct srcu_struct srcu; 453 struct nvme_subsystem *subsys; 454 struct nvme_ns_ids ids; 455 struct list_head entry; 456 struct kref ref; 457 bool shared; 458 bool passthru_err_log_enabled; 459 int instance; 460 struct nvme_effects_log *effects; 461 u64 nuse; 462 unsigned ns_id; 463 int lba_shift; 464 u16 ms; 465 u16 pi_size; 466 u8 pi_type; 467 u8 pi_offset; 468 u8 guard_type; 469 u16 sgs; 470 u32 sws; 471#ifdef CONFIG_BLK_DEV_ZONED 472 u64 zsze; 473#endif 474 unsigned long features; 475 476 struct ratelimit_state rs_nuse; 477 478 struct cdev cdev; 479 struct device cdev_device; 480 481 struct gendisk *disk; 482#ifdef CONFIG_NVME_MULTIPATH 483 struct bio_list requeue_list; 484 spinlock_t requeue_lock; 485 struct work_struct requeue_work; 486 struct mutex lock; 487 unsigned long flags; 488#define NVME_NSHEAD_DISK_LIVE 0 489 struct nvme_ns __rcu *current_path[]; 490#endif 491}; 492 493static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 494{ 495 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 496} 497 498enum nvme_ns_features { 499 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 500 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 501 NVME_NS_DEAC, /* DEAC bit in Write Zeores supported */ 502}; 503 504struct nvme_ns { 505 struct list_head list; 506 507 struct nvme_ctrl *ctrl; 508 struct request_queue *queue; 509 struct gendisk *disk; 510#ifdef CONFIG_NVME_MULTIPATH 511 enum nvme_ana_state ana_state; 512 u32 ana_grpid; 513#endif 514 struct list_head siblings; 515 struct kref kref; 516 struct nvme_ns_head *head; 517 518 unsigned long flags; 519#define NVME_NS_REMOVING 0 520#define NVME_NS_ANA_PENDING 2 521#define NVME_NS_FORCE_RO 3 522#define NVME_NS_READY 4 523 524 struct cdev cdev; 525 struct device cdev_device; 526 527 struct nvme_fault_inject fault_inject; 528}; 529 530/* NVMe ns supports metadata actions by the controller (generate/strip) */ 531static inline bool nvme_ns_has_pi(struct nvme_ns_head *head) 532{ 533 return head->pi_type && head->ms == head->pi_size; 534} 535 536struct nvme_ctrl_ops { 537 const char *name; 538 struct module *module; 539 unsigned int flags; 540#define NVME_F_FABRICS (1 << 0) 541#define NVME_F_METADATA_SUPPORTED (1 << 1) 542#define NVME_F_BLOCKING (1 << 2) 543 544 const struct attribute_group **dev_attr_groups; 545 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 546 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 547 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 548 void (*free_ctrl)(struct nvme_ctrl *ctrl); 549 void (*submit_async_event)(struct nvme_ctrl *ctrl); 550 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 551 void (*stop_ctrl)(struct nvme_ctrl *ctrl); 552 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 553 void (*print_device_info)(struct nvme_ctrl *ctrl); 554 bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl); 555}; 556 557/* 558 * nvme command_id is constructed as such: 559 * | xxxx | xxxxxxxxxxxx | 560 * gen request tag 561 */ 562#define nvme_genctr_mask(gen) (gen & 0xf) 563#define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 564#define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 565#define nvme_tag_from_cid(cid) (cid & 0xfff) 566 567static inline u16 nvme_cid(struct request *rq) 568{ 569 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 570} 571 572static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 573 u16 command_id) 574{ 575 u8 genctr = nvme_genctr_from_cid(command_id); 576 u16 tag = nvme_tag_from_cid(command_id); 577 struct request *rq; 578 579 rq = blk_mq_tag_to_rq(tags, tag); 580 if (unlikely(!rq)) { 581 pr_err("could not locate request for tag %#x\n", 582 tag); 583 return NULL; 584 } 585 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 586 dev_err(nvme_req(rq)->ctrl->device, 587 "request %#x genctr mismatch (got %#x expected %#x)\n", 588 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 589 return NULL; 590 } 591 return rq; 592} 593 594static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 595 u16 command_id) 596{ 597 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 598} 599 600/* 601 * Return the length of the string without the space padding 602 */ 603static inline int nvme_strlen(char *s, int len) 604{ 605 while (s[len - 1] == ' ') 606 len--; 607 return len; 608} 609 610static inline void nvme_print_device_info(struct nvme_ctrl *ctrl) 611{ 612 struct nvme_subsystem *subsys = ctrl->subsys; 613 614 if (ctrl->ops->print_device_info) { 615 ctrl->ops->print_device_info(ctrl); 616 return; 617 } 618 619 dev_err(ctrl->device, 620 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id, 621 nvme_strlen(subsys->model, sizeof(subsys->model)), 622 subsys->model, nvme_strlen(subsys->firmware_rev, 623 sizeof(subsys->firmware_rev)), 624 subsys->firmware_rev); 625} 626 627#ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 628void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 629 const char *dev_name); 630void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 631void nvme_should_fail(struct request *req); 632#else 633static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 634 const char *dev_name) 635{ 636} 637static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 638{ 639} 640static inline void nvme_should_fail(struct request *req) {} 641#endif 642 643bool nvme_wait_reset(struct nvme_ctrl *ctrl); 644int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 645 646static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 647{ 648 int ret; 649 650 if (!ctrl->subsystem) 651 return -ENOTTY; 652 if (!nvme_wait_reset(ctrl)) 653 return -EBUSY; 654 655 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 656 if (ret) 657 return ret; 658 659 return nvme_try_sched_reset(ctrl); 660} 661 662/* 663 * Convert a 512B sector number to a device logical block number. 664 */ 665static inline u64 nvme_sect_to_lba(struct nvme_ns_head *head, sector_t sector) 666{ 667 return sector >> (head->lba_shift - SECTOR_SHIFT); 668} 669 670/* 671 * Convert a device logical block number to a 512B sector number. 672 */ 673static inline sector_t nvme_lba_to_sect(struct nvme_ns_head *head, u64 lba) 674{ 675 return lba << (head->lba_shift - SECTOR_SHIFT); 676} 677 678/* 679 * Convert byte length to nvme's 0-based num dwords 680 */ 681static inline u32 nvme_bytes_to_numd(size_t len) 682{ 683 return (len >> 2) - 1; 684} 685 686static inline bool nvme_is_ana_error(u16 status) 687{ 688 switch (status & 0x7ff) { 689 case NVME_SC_ANA_TRANSITION: 690 case NVME_SC_ANA_INACCESSIBLE: 691 case NVME_SC_ANA_PERSISTENT_LOSS: 692 return true; 693 default: 694 return false; 695 } 696} 697 698static inline bool nvme_is_path_error(u16 status) 699{ 700 /* check for a status code type of 'path related status' */ 701 return (status & 0x700) == 0x300; 702} 703 704/* 705 * Fill in the status and result information from the CQE, and then figure out 706 * if blk-mq will need to use IPI magic to complete the request, and if yes do 707 * so. If not let the caller complete the request without an indirect function 708 * call. 709 */ 710static inline bool nvme_try_complete_req(struct request *req, __le16 status, 711 union nvme_result result) 712{ 713 struct nvme_request *rq = nvme_req(req); 714 struct nvme_ctrl *ctrl = rq->ctrl; 715 716 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 717 rq->genctr++; 718 719 rq->status = le16_to_cpu(status) >> 1; 720 rq->result = result; 721 /* inject error when permitted by fault injection framework */ 722 nvme_should_fail(req); 723 if (unlikely(blk_should_fake_timeout(req->q))) 724 return true; 725 return blk_mq_complete_request_remote(req); 726} 727 728static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 729{ 730 get_device(ctrl->device); 731} 732 733static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 734{ 735 put_device(ctrl->device); 736} 737 738static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 739{ 740 return !qid && 741 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 742} 743 744void nvme_complete_rq(struct request *req); 745void nvme_complete_batch_req(struct request *req); 746 747static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 748 void (*fn)(struct request *rq)) 749{ 750 struct request *req; 751 752 rq_list_for_each(&iob->req_list, req) { 753 fn(req); 754 nvme_complete_batch_req(req); 755 } 756 blk_mq_end_request_batch(iob); 757} 758 759blk_status_t nvme_host_path_error(struct request *req); 760bool nvme_cancel_request(struct request *req, void *data); 761void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 762void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 763bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 764 enum nvme_ctrl_state new_state); 765int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown); 766int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 767int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 768 const struct nvme_ctrl_ops *ops, unsigned long quirks); 769void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 770void nvme_start_ctrl(struct nvme_ctrl *ctrl); 771void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 772int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended); 773int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 774 const struct blk_mq_ops *ops, unsigned int cmd_size); 775void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl); 776int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 777 const struct blk_mq_ops *ops, unsigned int nr_maps, 778 unsigned int cmd_size); 779void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl); 780 781void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 782 783void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 784 volatile union nvme_result *res); 785 786void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl); 787void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl); 788void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl); 789void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl); 790void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl); 791void nvme_sync_queues(struct nvme_ctrl *ctrl); 792void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 793void nvme_unfreeze(struct nvme_ctrl *ctrl); 794void nvme_wait_freeze(struct nvme_ctrl *ctrl); 795int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 796void nvme_start_freeze(struct nvme_ctrl *ctrl); 797 798static inline enum req_op nvme_req_op(struct nvme_command *cmd) 799{ 800 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 801} 802 803#define NVME_QID_ANY -1 804void nvme_init_request(struct request *req, struct nvme_command *cmd); 805void nvme_cleanup_cmd(struct request *req); 806blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 807blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 808 struct request *req); 809bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 810 bool queue_live, enum nvme_ctrl_state state); 811 812static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 813 bool queue_live) 814{ 815 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 816 817 if (likely(state == NVME_CTRL_LIVE)) 818 return true; 819 if (ctrl->ops->flags & NVME_F_FABRICS && state == NVME_CTRL_DELETING) 820 return queue_live; 821 return __nvme_check_ready(ctrl, rq, queue_live, state); 822} 823 824/* 825 * NSID shall be unique for all shared namespaces, or if at least one of the 826 * following conditions is met: 827 * 1. Namespace Management is supported by the controller 828 * 2. ANA is supported by the controller 829 * 3. NVM Set are supported by the controller 830 * 831 * In other case, private namespace are not required to report a unique NSID. 832 */ 833static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 834 struct nvme_ns_head *head) 835{ 836 return head->shared || 837 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 838 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 839 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 840} 841 842/* 843 * Flags for __nvme_submit_sync_cmd() 844 */ 845typedef __u32 __bitwise nvme_submit_flags_t; 846 847enum { 848 /* Insert request at the head of the queue */ 849 NVME_SUBMIT_AT_HEAD = (__force nvme_submit_flags_t)(1 << 0), 850 /* Set BLK_MQ_REQ_NOWAIT when allocating request */ 851 NVME_SUBMIT_NOWAIT = (__force nvme_submit_flags_t)(1 << 1), 852 /* Set BLK_MQ_REQ_RESERVED when allocating request */ 853 NVME_SUBMIT_RESERVED = (__force nvme_submit_flags_t)(1 << 2), 854 /* Retry command when NVME_SC_DNR is not set in the result */ 855 NVME_SUBMIT_RETRY = (__force nvme_submit_flags_t)(1 << 3), 856}; 857 858int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 859 void *buf, unsigned bufflen); 860int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 861 union nvme_result *result, void *buffer, unsigned bufflen, 862 int qid, nvme_submit_flags_t flags); 863int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 864 unsigned int dword11, void *buffer, size_t buflen, 865 u32 *result); 866int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 867 unsigned int dword11, void *buffer, size_t buflen, 868 u32 *result); 869int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 870void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 871int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 872int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 873int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 874void nvme_queue_scan(struct nvme_ctrl *ctrl); 875int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 876 void *log, size_t size, u64 offset); 877bool nvme_tryget_ns_head(struct nvme_ns_head *head); 878void nvme_put_ns_head(struct nvme_ns_head *head); 879int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 880 const struct file_operations *fops, struct module *owner); 881void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 882int nvme_ioctl(struct block_device *bdev, blk_mode_t mode, 883 unsigned int cmd, unsigned long arg); 884long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 885int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode, 886 unsigned int cmd, unsigned long arg); 887long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 888 unsigned long arg); 889long nvme_dev_ioctl(struct file *file, unsigned int cmd, 890 unsigned long arg); 891int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 892 struct io_comp_batch *iob, unsigned int poll_flags); 893int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd, 894 unsigned int issue_flags); 895int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd, 896 unsigned int issue_flags); 897int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 898 struct nvme_id_ns **id); 899int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo); 900int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags); 901 902extern const struct attribute_group *nvme_ns_attr_groups[]; 903extern const struct pr_ops nvme_pr_ops; 904extern const struct block_device_operations nvme_ns_head_ops; 905extern const struct attribute_group nvme_dev_attrs_group; 906extern const struct attribute_group *nvme_subsys_attrs_groups[]; 907extern const struct attribute_group *nvme_dev_attr_groups[]; 908extern const struct block_device_operations nvme_bdev_ops; 909 910void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 911struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 912#ifdef CONFIG_NVME_MULTIPATH 913static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 914{ 915 return ctrl->ana_log_buf != NULL; 916} 917 918void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 919void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 920void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 921void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 922void nvme_failover_req(struct request *req); 923void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 924int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 925void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid); 926void nvme_mpath_remove_disk(struct nvme_ns_head *head); 927int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 928void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 929void nvme_mpath_update(struct nvme_ctrl *ctrl); 930void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 931void nvme_mpath_stop(struct nvme_ctrl *ctrl); 932bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 933void nvme_mpath_revalidate_paths(struct nvme_ns *ns); 934void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 935void nvme_mpath_shutdown_disk(struct nvme_ns_head *head); 936void nvme_mpath_start_request(struct request *rq); 937void nvme_mpath_end_request(struct request *rq); 938 939static inline void nvme_trace_bio_complete(struct request *req) 940{ 941 struct nvme_ns *ns = req->q->queuedata; 942 943 if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio) 944 trace_block_bio_complete(ns->head->disk->queue, req->bio); 945} 946 947extern bool multipath; 948extern struct device_attribute dev_attr_ana_grpid; 949extern struct device_attribute dev_attr_ana_state; 950extern struct device_attribute subsys_attr_iopolicy; 951 952static inline bool nvme_disk_is_ns_head(struct gendisk *disk) 953{ 954 return disk->fops == &nvme_ns_head_ops; 955} 956#else 957#define multipath false 958static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 959{ 960 return false; 961} 962static inline void nvme_failover_req(struct request *req) 963{ 964} 965static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 966{ 967} 968static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 969 struct nvme_ns_head *head) 970{ 971 return 0; 972} 973static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid) 974{ 975} 976static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 977{ 978} 979static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 980{ 981 return false; 982} 983static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns) 984{ 985} 986static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 987{ 988} 989static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head) 990{ 991} 992static inline void nvme_trace_bio_complete(struct request *req) 993{ 994} 995static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 996{ 997} 998static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 999 struct nvme_id_ctrl *id) 1000{ 1001 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 1002 dev_warn(ctrl->device, 1003"Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 1004 return 0; 1005} 1006static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 1007{ 1008} 1009static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 1010{ 1011} 1012static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 1013{ 1014} 1015static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 1016{ 1017} 1018static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 1019{ 1020} 1021static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 1022{ 1023} 1024static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 1025{ 1026} 1027static inline void nvme_mpath_start_request(struct request *rq) 1028{ 1029} 1030static inline void nvme_mpath_end_request(struct request *rq) 1031{ 1032} 1033static inline bool nvme_disk_is_ns_head(struct gendisk *disk) 1034{ 1035 return false; 1036} 1037#endif /* CONFIG_NVME_MULTIPATH */ 1038 1039struct nvme_zone_info { 1040 u64 zone_size; 1041 unsigned int max_open_zones; 1042 unsigned int max_active_zones; 1043}; 1044 1045int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 1046 unsigned int nr_zones, report_zones_cb cb, void *data); 1047int nvme_query_zone_info(struct nvme_ns *ns, unsigned lbaf, 1048 struct nvme_zone_info *zi); 1049void nvme_update_zone_info(struct nvme_ns *ns, struct queue_limits *lim, 1050 struct nvme_zone_info *zi); 1051#ifdef CONFIG_BLK_DEV_ZONED 1052blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 1053 struct nvme_command *cmnd, 1054 enum nvme_zone_mgmt_action action); 1055#else 1056static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 1057 struct request *req, struct nvme_command *cmnd, 1058 enum nvme_zone_mgmt_action action) 1059{ 1060 return BLK_STS_NOTSUPP; 1061} 1062#endif 1063 1064static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 1065{ 1066 struct gendisk *disk = dev_to_disk(dev); 1067 1068 WARN_ON(nvme_disk_is_ns_head(disk)); 1069 return disk->private_data; 1070} 1071 1072#ifdef CONFIG_NVME_HWMON 1073int nvme_hwmon_init(struct nvme_ctrl *ctrl); 1074void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 1075#else 1076static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 1077{ 1078 return 0; 1079} 1080 1081static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 1082{ 1083} 1084#endif 1085 1086static inline void nvme_start_request(struct request *rq) 1087{ 1088 if (rq->cmd_flags & REQ_NVME_MPATH) 1089 nvme_mpath_start_request(rq); 1090 blk_mq_start_request(rq); 1091} 1092 1093static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 1094{ 1095 return ctrl->sgls & ((1 << 0) | (1 << 1)); 1096} 1097 1098#ifdef CONFIG_NVME_HOST_AUTH 1099int __init nvme_init_auth(void); 1100void __exit nvme_exit_auth(void); 1101int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl); 1102void nvme_auth_stop(struct nvme_ctrl *ctrl); 1103int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid); 1104int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid); 1105void nvme_auth_free(struct nvme_ctrl *ctrl); 1106#else 1107static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl) 1108{ 1109 return 0; 1110} 1111static inline int __init nvme_init_auth(void) 1112{ 1113 return 0; 1114} 1115static inline void __exit nvme_exit_auth(void) 1116{ 1117} 1118static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {}; 1119static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid) 1120{ 1121 return -EPROTONOSUPPORT; 1122} 1123static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid) 1124{ 1125 return NVME_SC_AUTH_REQUIRED; 1126} 1127static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {}; 1128#endif 1129 1130u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1131 u8 opcode); 1132u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode); 1133int nvme_execute_rq(struct request *rq, bool at_head); 1134void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1135 struct nvme_command *cmd, int status); 1136struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 1137struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 1138void nvme_put_ns(struct nvme_ns *ns); 1139 1140static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 1141{ 1142 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 1143} 1144 1145#ifdef CONFIG_NVME_VERBOSE_ERRORS 1146const char *nvme_get_error_status_str(u16 status); 1147const char *nvme_get_opcode_str(u8 opcode); 1148const char *nvme_get_admin_opcode_str(u8 opcode); 1149const char *nvme_get_fabrics_opcode_str(u8 opcode); 1150#else /* CONFIG_NVME_VERBOSE_ERRORS */ 1151static inline const char *nvme_get_error_status_str(u16 status) 1152{ 1153 return "I/O Error"; 1154} 1155static inline const char *nvme_get_opcode_str(u8 opcode) 1156{ 1157 return "I/O Cmd"; 1158} 1159static inline const char *nvme_get_admin_opcode_str(u8 opcode) 1160{ 1161 return "Admin Cmd"; 1162} 1163 1164static inline const char *nvme_get_fabrics_opcode_str(u8 opcode) 1165{ 1166 return "Fabrics Cmd"; 1167} 1168#endif /* CONFIG_NVME_VERBOSE_ERRORS */ 1169 1170static inline const char *nvme_opcode_str(int qid, u8 opcode) 1171{ 1172 return qid ? nvme_get_opcode_str(opcode) : 1173 nvme_get_admin_opcode_str(opcode); 1174} 1175 1176static inline const char *nvme_fabrics_opcode_str( 1177 int qid, const struct nvme_command *cmd) 1178{ 1179 if (nvme_is_fabrics(cmd)) 1180 return nvme_get_fabrics_opcode_str(cmd->fabrics.fctype); 1181 1182 return nvme_opcode_str(qid, cmd->common.opcode); 1183} 1184#endif /* _NVME_H */ 1185