1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2/* Copyright(c) 2022-2023  Realtek Corporation
3 */
4
5#ifndef __RTW89_8851B_H__
6#define __RTW89_8851B_H__
7
8#include "core.h"
9
10#define RF_PATH_NUM_8851B 1
11#define BB_PATH_NUM_8851B 1
12
13struct rtw8851bu_efuse {
14	u8 rsvd[0x88];
15	u8 mac_addr[ETH_ALEN];
16};
17
18struct rtw8851be_efuse {
19	u8 mac_addr[ETH_ALEN];
20};
21
22struct rtw8851b_tssi_offset {
23	u8 cck_tssi[TSSI_CCK_CH_GROUP_NUM];
24	u8 bw40_tssi[TSSI_MCS_2G_CH_GROUP_NUM];
25	u8 rsvd[7];
26	u8 bw40_1s_tssi_5g[TSSI_MCS_5G_CH_GROUP_NUM];
27} __packed;
28
29struct rtw8851b_efuse {
30	u8 rsvd[0x210];
31	struct rtw8851b_tssi_offset path_a_tssi;
32	u8 rsvd1[136];
33	u8 channel_plan;
34	u8 xtal_k;
35	u8 rsvd2;
36	u8 iqk_lck;
37	u8 rsvd3[8];
38	u8 eeprom_version;
39	u8 customer_id;
40	u8 tx_bb_swing_2g;
41	u8 tx_bb_swing_5g;
42	u8 tx_cali_pwr_trk_mode;
43	u8 trx_path_selection;
44	u8 rfe_type;
45	u8 country_code[2];
46	u8 rsvd4[3];
47	u8 path_a_therm;
48	u8 rsvd5[3];
49	u8 rx_gain_2g_ofdm;
50	u8 rsvd6;
51	u8 rx_gain_2g_cck;
52	u8 rsvd7;
53	u8 rx_gain_5g_low;
54	u8 rsvd8;
55	u8 rx_gain_5g_mid;
56	u8 rsvd9;
57	u8 rx_gain_5g_high;
58	u8 rsvd10[35];
59	u8 path_a_cck_pwr_idx[6];
60	u8 path_a_bw40_1tx_pwr_idx[5];
61	u8 path_a_ofdm_1tx_pwr_idx_diff:4;
62	u8 path_a_bw20_1tx_pwr_idx_diff:4;
63	u8 path_a_bw20_2tx_pwr_idx_diff:4;
64	u8 path_a_bw40_2tx_pwr_idx_diff:4;
65	u8 path_a_cck_2tx_pwr_idx_diff:4;
66	u8 path_a_ofdm_2tx_pwr_idx_diff:4;
67	u8 rsvd11[0xf2];
68	union {
69		struct rtw8851bu_efuse u;
70		struct rtw8851be_efuse e;
71	};
72} __packed;
73
74extern const struct rtw89_chip_info rtw8851b_chip_info;
75
76#endif
77