1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2/* 3 * Copyright (C) 2023 Intel Corporation 4 */ 5 6#ifndef __fw_regulatory_h__ 7#define __fw_regulatory_h__ 8 9#include "fw/img.h" 10#include "fw/api/commands.h" 11#include "fw/api/power.h" 12#include "fw/api/phy.h" 13#include "fw/api/config.h" 14#include "fw/img.h" 15#include "iwl-trans.h" 16 17#define BIOS_SAR_MAX_PROFILE_NUM 4 18/* 19 * Each SAR profile has (up to, depends on the table revision) 4 chains: 20 * chain A, chain B, chain A when in CDB, chain B when in CDB 21 */ 22#define BIOS_SAR_MAX_CHAINS_PER_PROFILE 4 23#define BIOS_SAR_NUM_CHAINS 2 24#define BIOS_SAR_MAX_SUB_BANDS_NUM 11 25 26#define BIOS_GEO_NUM_CHAINS 2 27#define BIOS_GEO_MAX_NUM_BANDS 3 28#define BIOS_GEO_MAX_PROFILE_NUM 8 29#define BIOS_GEO_MIN_PROFILE_NUM 3 30 31#define IWL_SAR_ENABLE_MSK BIT(0) 32 33/* PPAG gain value bounds in 1/8 dBm */ 34#define IWL_PPAG_MIN_LB -16 35#define IWL_PPAG_MAX_LB 24 36#define IWL_PPAG_MIN_HB -16 37#define IWL_PPAG_MAX_HB 40 38 39#define IWL_PPAG_ETSI_CHINA_MASK 3 40#define IWL_PPAG_REV3_MASK 0x7FF 41 42#define IWL_WTAS_BLACK_LIST_MAX 16 43#define IWL_WTAS_ENABLED_MSK 0x1 44#define IWL_WTAS_OVERRIDE_IEC_MSK 0x2 45#define IWL_WTAS_ENABLE_IEC_MSK 0x4 46#define IWL_WTAS_USA_UHB_MSK BIT(16) 47 48/* 49 * The profile for revision 2 is a superset of revision 1, which is in 50 * turn a superset of revision 0. So we can store all revisions 51 * inside revision 2, which is what we represent here. 52 */ 53 54/* 55 * struct iwl_sar_profile_chain - per-chain values of a SAR profile 56 * @subbands: the SAR value for each subband 57 */ 58struct iwl_sar_profile_chain { 59 u8 subbands[BIOS_SAR_MAX_SUB_BANDS_NUM]; 60}; 61 62/* 63 * struct iwl_sar_profile - SAR profile from SAR tables 64 * @enabled: whether the profile is enabled or not 65 * @chains: per-chain SAR values 66 */ 67struct iwl_sar_profile { 68 bool enabled; 69 struct iwl_sar_profile_chain chains[BIOS_SAR_MAX_CHAINS_PER_PROFILE]; 70}; 71 72/* Same thing as with SAR, all revisions fit in revision 2 */ 73 74/* 75 * struct iwl_geo_profile_band - per-band geo SAR offsets 76 * @max: the max tx power allowed for the band 77 * @chains: SAR offsets values for each chain 78 */ 79struct iwl_geo_profile_band { 80 u8 max; 81 u8 chains[BIOS_GEO_NUM_CHAINS]; 82}; 83 84/* 85 * struct iwl_geo_profile - geo profile 86 * @bands: per-band table of the SAR offsets 87 */ 88struct iwl_geo_profile { 89 struct iwl_geo_profile_band bands[BIOS_GEO_MAX_NUM_BANDS]; 90}; 91 92/* Same thing as with SAR, all revisions fit in revision 2 */ 93struct iwl_ppag_chain { 94 s8 subbands[BIOS_SAR_MAX_SUB_BANDS_NUM]; 95}; 96 97struct iwl_tas_data { 98 __le32 block_list_size; 99 __le32 block_list_array[IWL_WTAS_BLACK_LIST_MAX]; 100 u8 override_tas_iec; 101 u8 enable_tas_iec; 102 u8 usa_tas_uhb_allowed; 103}; 104 105/* For DSM revision 0 and 4 */ 106enum iwl_dsm_funcs { 107 DSM_FUNC_QUERY = 0, 108 DSM_FUNC_DISABLE_SRD = 1, 109 DSM_FUNC_ENABLE_INDONESIA_5G2 = 2, 110 DSM_FUNC_ENABLE_6E = 3, 111 DSM_FUNC_REGULATORY_CONFIG = 4, 112 DSM_FUNC_11AX_ENABLEMENT = 6, 113 DSM_FUNC_ENABLE_UNII4_CHAN = 7, 114 DSM_FUNC_ACTIVATE_CHANNEL = 8, 115 DSM_FUNC_FORCE_DISABLE_CHANNELS = 9, 116 DSM_FUNC_ENERGY_DETECTION_THRESHOLD = 10, 117 DSM_FUNC_RFI_CONFIG = 11, 118 DSM_FUNC_NUM_FUNCS = 12, 119}; 120 121enum iwl_dsm_values_srd { 122 DSM_VALUE_SRD_ACTIVE, 123 DSM_VALUE_SRD_PASSIVE, 124 DSM_VALUE_SRD_DISABLE, 125 DSM_VALUE_SRD_MAX 126}; 127 128enum iwl_dsm_values_indonesia { 129 DSM_VALUE_INDONESIA_DISABLE, 130 DSM_VALUE_INDONESIA_ENABLE, 131 DSM_VALUE_INDONESIA_RESERVED, 132 DSM_VALUE_INDONESIA_MAX 133}; 134 135enum iwl_dsm_values_rfi { 136 DSM_VALUE_RFI_DLVR_DISABLE = BIT(0), 137 DSM_VALUE_RFI_DDR_DISABLE = BIT(1), 138}; 139 140#define DSM_VALUE_RFI_DISABLE (DSM_VALUE_RFI_DLVR_DISABLE |\ 141 DSM_VALUE_RFI_DDR_DISABLE) 142 143enum iwl_dsm_masks_reg { 144 DSM_MASK_CHINA_22_REG = BIT(2) 145}; 146 147struct iwl_fw_runtime; 148 149bool iwl_sar_geo_support(struct iwl_fw_runtime *fwrt); 150 151int iwl_sar_geo_fill_table(struct iwl_fw_runtime *fwrt, 152 struct iwl_per_chain_offset *table, 153 u32 n_bands, u32 n_profiles); 154 155int iwl_sar_fill_profile(struct iwl_fw_runtime *fwrt, 156 __le16 *per_chain, u32 n_tables, u32 n_subbands, 157 int prof_a, int prof_b); 158 159int iwl_fill_ppag_table(struct iwl_fw_runtime *fwrt, 160 union iwl_ppag_table_cmd *cmd, 161 int *cmd_size); 162 163bool iwl_is_ppag_approved(struct iwl_fw_runtime *fwrt); 164 165bool iwl_is_tas_approved(void); 166 167int iwl_parse_tas_selection(struct iwl_fw_runtime *fwrt, 168 struct iwl_tas_data *tas_data, 169 const u32 tas_selection); 170 171int iwl_bios_get_wrds_table(struct iwl_fw_runtime *fwrt); 172 173int iwl_bios_get_ewrd_table(struct iwl_fw_runtime *fwrt); 174 175int iwl_bios_get_wgds_table(struct iwl_fw_runtime *fwrt); 176 177int iwl_bios_get_ppag_table(struct iwl_fw_runtime *fwrt); 178 179int iwl_bios_get_tas_table(struct iwl_fw_runtime *fwrt, 180 struct iwl_tas_data *data); 181 182int iwl_bios_get_pwr_limit(struct iwl_fw_runtime *fwrt, 183 u64 *dflt_pwr_limit); 184 185int iwl_bios_get_mcc(struct iwl_fw_runtime *fwrt, char *mcc); 186int iwl_bios_get_eckv(struct iwl_fw_runtime *fwrt, u32 *ext_clk); 187 188__le32 iwl_get_lari_config_bitmap(struct iwl_fw_runtime *fwrt); 189 190int iwl_bios_get_dsm(struct iwl_fw_runtime *fwrt, enum iwl_dsm_funcs func, 191 u32 *value); 192 193static inline u32 iwl_bios_get_ppag_flags(const u32 ppag_modes, 194 const u8 ppag_ver) 195{ 196 return ppag_modes & (ppag_ver < 3 ? IWL_PPAG_ETSI_CHINA_MASK : 197 IWL_PPAG_REV3_MASK); 198} 199#endif /* __fw_regulatory_h__ */ 200