1// SPDX-License-Identifier: ISC
2/*
3 * Copyright (c) 2010 Broadcom Corporation
4 */
5
6#ifndef _BRCM_PHY_LCN_H_
7#define _BRCM_PHY_LCN_H_
8
9#include <types.h>
10
11struct brcms_phy_lcnphy {
12	int lcnphy_txrf_sp_9_override;
13	u8 lcnphy_full_cal_channel;
14	u8 lcnphy_cal_counter;
15	u16 lcnphy_cal_temper;
16	bool lcnphy_recal;
17
18	u8 lcnphy_rc_cap;
19	u32 lcnphy_mcs20_po;
20
21	u8 lcnphy_tr_isolation_mid;
22	u8 lcnphy_tr_isolation_low;
23	u8 lcnphy_tr_isolation_hi;
24
25	u8 lcnphy_bx_arch;
26	u8 lcnphy_rx_power_offset;
27	u8 lcnphy_rssi_vf;
28	u8 lcnphy_rssi_vc;
29	u8 lcnphy_rssi_gs;
30	u8 lcnphy_tssi_val;
31	u8 lcnphy_rssi_vf_lowtemp;
32	u8 lcnphy_rssi_vc_lowtemp;
33	u8 lcnphy_rssi_gs_lowtemp;
34
35	u8 lcnphy_rssi_vf_hightemp;
36	u8 lcnphy_rssi_vc_hightemp;
37	u8 lcnphy_rssi_gs_hightemp;
38
39	s16 lcnphy_pa0b0;
40	s16 lcnphy_pa0b1;
41	s16 lcnphy_pa0b2;
42
43	u16 lcnphy_rawtempsense;
44	u8 lcnphy_measPower;
45	u8 lcnphy_tempsense_slope;
46	u8 lcnphy_freqoffset_corr;
47	u8 lcnphy_tempsense_option;
48	u8 lcnphy_tempcorrx;
49	bool lcnphy_iqcal_swp_dis;
50	bool lcnphy_hw_iqcal_en;
51	uint lcnphy_bandedge_corr;
52	bool lcnphy_spurmod;
53	u16 lcnphy_tssi_tx_cnt;
54	u16 lcnphy_tssi_idx;
55	u16 lcnphy_tssi_npt;
56
57	u16 lcnphy_target_tx_freq;
58	s8 lcnphy_tx_power_idx_override;
59	u16 lcnphy_noise_samples;
60
61	u32 lcnphy_papdRxGnIdx;
62	u32 lcnphy_papd_rxGnCtrl_init;
63
64	u32 lcnphy_gain_idx_14_lowword;
65	u32 lcnphy_gain_idx_14_hiword;
66	u32 lcnphy_gain_idx_27_lowword;
67	u32 lcnphy_gain_idx_27_hiword;
68	s16 lcnphy_ofdmgainidxtableoffset;
69	s16 lcnphy_dsssgainidxtableoffset;
70	u32 lcnphy_tr_R_gain_val;
71	u32 lcnphy_tr_T_gain_val;
72	s8 lcnphy_input_pwr_offset_db;
73	u16 lcnphy_Med_Low_Gain_db;
74	u16 lcnphy_Very_Low_Gain_db;
75	s8 lcnphy_lastsensed_temperature;
76	s8 lcnphy_pkteng_rssi_slope;
77	u8 lcnphy_saved_tx_user_target[TXP_NUM_RATES];
78	u8 lcnphy_volt_winner;
79	u8 lcnphy_volt_low;
80	u8 lcnphy_54_48_36_24mbps_backoff;
81	u8 lcnphy_11n_backoff;
82	u8 lcnphy_lowerofdm;
83	u8 lcnphy_cck;
84	u8 lcnphy_psat_2pt3_detected;
85	s32 lcnphy_lowest_Re_div_Im;
86	s8 lcnphy_final_papd_cal_idx;
87	u16 lcnphy_extstxctrl4;
88	u16 lcnphy_extstxctrl0;
89	u16 lcnphy_extstxctrl1;
90	s16 lcnphy_cck_dig_filt_type;
91	s16 lcnphy_ofdm_dig_filt_type;
92	struct lcnphy_cal_results lcnphy_cal_results;
93
94	u8 lcnphy_psat_pwr;
95	u8 lcnphy_psat_indx;
96	s32 lcnphy_min_phase;
97	u8 lcnphy_final_idx;
98	u8 lcnphy_start_idx;
99	u8 lcnphy_current_index;
100	u16 lcnphy_logen_buf_1;
101	u16 lcnphy_local_ovr_2;
102	u16 lcnphy_local_oval_6;
103	u16 lcnphy_local_oval_5;
104	u16 lcnphy_logen_mixer_1;
105
106	u8 lcnphy_aci_stat;
107	uint lcnphy_aci_start_time;
108	s8 lcnphy_tx_power_offset[TXP_NUM_RATES];
109};
110#endif				/* _BRCM_PHY_LCN_H_ */
111