11541Srgrimes/*
21541Srgrimes * Copyright (c) 2010 Broadcom Corporation
31541Srgrimes *
41541Srgrimes * Permission to use, copy, modify, and/or distribute this software for any
51541Srgrimes * purpose with or without fee is hereby granted, provided that the above
61541Srgrimes * copyright notice and this permission notice appear in all copies.
71541Srgrimes *
81541Srgrimes * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
91541Srgrimes * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
101541Srgrimes * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
111541Srgrimes * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
121541Srgrimes * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
131541Srgrimes * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
141541Srgrimes * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
151541Srgrimes */
161541Srgrimes
171541Srgrimes#ifndef _BRCM_MAIN_H_
181541Srgrimes#define _BRCM_MAIN_H_
191541Srgrimes
201541Srgrimes#include <linux/etherdevice.h>
211541Srgrimes
221541Srgrimes#include <brcmu_utils.h>
231541Srgrimes#include "types.h"
241541Srgrimes#include "d11.h"
251541Srgrimes#include "scb.h"
261541Srgrimes
271541Srgrimes#define	INVCHANNEL		255	/* invalid channel */
281541Srgrimes
291541Srgrimes/* max # brcms_c_module_register() calls */
301541Srgrimes#define BRCMS_MAXMODULES	22
311541Srgrimes
321541Srgrimes#define SEQNUM_SHIFT		4
331541Srgrimes#define SEQNUM_MAX		0x1000
3450477Speter
351541Srgrimes#define NTXRATE			64	/* # tx MPDUs rate is reported for */
361541Srgrimes
3768924Salfred/* Maximum wait time for a MAC suspend */
3868924Salfred/* uS: 83mS is max packet time (64KB ampdu @ 6Mbps) */
391541Srgrimes#define	BRCMS_MAX_MAC_SUSPEND	83000
401541Srgrimes
4124131Sbde/* responses for probe requests older that this are tossed, zero to disable */
421541Srgrimes#define BRCMS_PRB_RESP_TIMEOUT	0	/* Disable probe response timeout */
431541Srgrimes
441541Srgrimes/* transmit buffer max headroom for protocol headers */
4559288Sjlemon#define TXOFF (D11_TXH_LEN + D11_PHY_HDR_LEN)
461541Srgrimes
4747992Sgreen/* Macros for doing definition and get/set of bitfields
4859288Sjlemon * Usage example, e.g. a three-bit field (bits 4-6):
4929352Speter *    #define <NAME>_M	BITFIELD_MASK(3)
5047992Sgreen *    #define <NAME>_S	4
511541Srgrimes * ...
521541Srgrimes *    regval = R_REG(osh, &regs->regfoo);
531541Srgrimes *    field = GFIELD(regval, <NAME>);
541541Srgrimes *    regval = SFIELD(regval, <NAME>, 1);
553308Sphk *    W_REG(osh, &regs->regfoo, regval);
5612041Swollman */
5734924Sbde#define BITFIELD_MASK(width) \
5861235Srwatson		(((unsigned)1 << (width)) - 1)
5936079Swollman#define GFIELD(val, field) \
601541Srgrimes		(((val) >> field ## _S) & field ## _M)
6128551Sbde#define SFIELD(val, field, bits) \
6228551Sbde		(((val) & (~(field ## _M << field ## _S))) | \
6368924Salfred		 ((unsigned)(bits) << field ## _S))
6461837Salfred
6568924Salfred#define	SW_TIMER_MAC_STAT_UPD		30	/* periodic MAC stats update */
6661837Salfred
6759288Sjlemon/* max # supported core revisions (0 .. MAXCOREREV - 1) */
6859288Sjlemon#define	MAXCOREREV		28
6959288Sjlemon
7059288Sjlemon/* Double check that unsupported cores are not enabled */
7159288Sjlemon#if CONF_MSK(D11CONF, 0x4f) || CONF_GE(D11CONF, MAXCOREREV)
7259288Sjlemon#error "Configuration for D11CONF includes unsupported versions."
7359288Sjlemon#endif				/* Bad versions */
7459288Sjlemon
7559288Sjlemon/* values for shortslot_override */
7659288Sjlemon#define BRCMS_SHORTSLOT_AUTO	-1 /* Driver will manage Shortslot setting */
7759288Sjlemon#define BRCMS_SHORTSLOT_OFF	0  /* Turn off short slot */
7859288Sjlemon#define BRCMS_SHORTSLOT_ON	1  /* Turn on short slot */
7959288Sjlemon
8059288Sjlemon/* value for short/long and mixmode/greenfield preamble */
8159288Sjlemon#define BRCMS_LONG_PREAMBLE	(0)
8259288Sjlemon#define BRCMS_SHORT_PREAMBLE	(1 << 0)
8336079Swollman#define BRCMS_GF_PREAMBLE		(1 << 1)
8436079Swollman#define BRCMS_MM_PREAMBLE		(1 << 2)
8536079Swollman#define BRCMS_IS_MIMO_PREAMBLE(_pre) (((_pre) == BRCMS_GF_PREAMBLE) || \
8630354Sphk				      ((_pre) == BRCMS_MM_PREAMBLE))
8730354Sphk
8830354Sphk/* TxFrameID */
8944078Sdfr/* seq and frag bits: SEQNUM_SHIFT, FRAGNUM_MASK (802.11.h) */
9044078Sdfr/* rate epoch bits: TXFID_RATE_SHIFT, TXFID_RATE_MASK ((wlc_rate.c) */
9112041Swollman#define TXFID_QUEUE_MASK	0x0007	/* Bits 0-2 */
9253541Sshin#define TXFID_SEQ_MASK		0x7FE0	/* Bits 5-15 */
9346381Sbillf#define TXFID_SEQ_SHIFT		5	/* Number of bit shifts */
9412041Swollman#define	TXFID_RATE_PROBE_MASK	0x8000	/* Bit 15 for rate probe */
951541Srgrimes#define TXFID_RATE_MASK		0x0018	/* Mask for bits 3 and 4 */
961541Srgrimes#define TXFID_RATE_SHIFT	3	/* Shift 3 bits for rate mask */
971541Srgrimes
981541Srgrimes/* promote boardrev */
991541Srgrimes#define BOARDREV_PROMOTABLE	0xFF	/* from */
1001541Srgrimes#define BOARDREV_PROMOTED	1	/* to */
1011541Srgrimes
10236079Swollman#define DATA_BLOCK_TX_SUPR	(1 << 4)
10336079Swollman
10436079Swollman/* Ucode MCTL_WAKE override bits */
10536079Swollman#define BRCMS_WAKE_OVERRIDE_CLKCTL	0x01
10636079Swollman#define BRCMS_WAKE_OVERRIDE_PHYREG	0x02
10736079Swollman#define BRCMS_WAKE_OVERRIDE_MACSUSPEND	0x04
10836079Swollman#define BRCMS_WAKE_OVERRIDE_TXFIFO	0x08
10936079Swollman#define BRCMS_WAKE_OVERRIDE_FORCEFAST	0x10
11036079Swollman
11136079Swollman/* stuff pulled in from wlc.c */
11236079Swollman
11336079Swollman/* Interrupt bit error summary.  Don't include I_RU: we refill DMA at other
11436079Swollman * times; and if we run out, constant I_RU interrupts may cause lockup.  We
11536079Swollman * will still get error counts from rx0ovfl.
11636079Swollman */
11736079Swollman#define	I_ERRORS	(I_PC | I_PD | I_DE | I_RO | I_XU)
11836079Swollman/* default software intmasks */
11936079Swollman#define	DEF_RXINTMASK	(I_RI)	/* enable rx int on rxfifo only */
12036079Swollman#define	DEF_MACINTMASK	(MI_TXSTOP | MI_TBTT | MI_ATIMWINEND | MI_PMQ | \
12136079Swollman			 MI_PHYTXERR | MI_DMAINT | MI_TFS | MI_BG_NOISE | \
12255943Sjasone			 MI_CCA | MI_TO | MI_GP0 | MI_RFDISABLE | MI_PWRUP)
12336079Swollman
12436079Swollman#define	MAXTXPKTS		6	/* max # pkts pending */
12536079Swollman
12636079Swollman/* frameburst */
1271549Srgrimes#define	MAXTXFRAMEBURST		8 /* vanilla xpress mode: max frames/burst */
12814093Swollman#define	MAXFRAMEBURST_TXOP	10000	/* Frameburst TXOP in usec */
1291541Srgrimes
1301541Srgrimes#define	NFIFO			6	/* # tx/rx fifopairs */
1311541Srgrimes
1321541Srgrimes/* PLL requests */
13314093Swollman
1341541Srgrimes/* pll is shared on old chips */
1351541Srgrimes#define BRCMS_PLLREQ_SHARED	0x1
1361541Srgrimes/* hold pll for radio monitor register checking */
1371541Srgrimes#define BRCMS_PLLREQ_RADIO_MON	0x2
1381541Srgrimes/* hold/release pll for some short operation */
1391541Srgrimes#define BRCMS_PLLREQ_FLIP		0x4
1401541Srgrimes
1411541Srgrimes#define	CHANNEL_BANDUNIT(wlc, ch) \
1421541Srgrimes	(((ch) <= CH_MAX_2G_CHANNEL) ? BAND_2G_INDEX : BAND_5G_INDEX)
14361235Srwatson
14461633Sasmodai#define	OTHERBANDUNIT(wlc) \
14561633Sasmodai	((uint)((wlc)->band->bandunit ? BAND_2G_INDEX : BAND_5G_INDEX))
14661633Sasmodai
14761235Srwatson/*
14861235Srwatson * 802.11 protection information
14961235Srwatson *
15061235Srwatson * _g: use g spec protection, driver internal.
15161235Srwatson * g_override: override for use of g spec protection.
15261235Srwatson * gmode_user: user config gmode, operating band->gmode is different.
15361235Srwatson * overlap: Overlap BSS/IBSS protection for both 11g and 11n.
1541541Srgrimes * nmode_user: user config nmode, operating pub->nmode is different.
1551541Srgrimes * n_cfg: use OFDM protection on MIMO frames.
15636079Swollman * n_cfg_override: override for use of N protection.
15736079Swollman * nongf: non-GF present protection.
15836079Swollman * nongf_override: override for use of GF protection.
15936079Swollman * n_pam_override: override for preamble: MM or GF.
16014547Sdg * n_obss: indicated OBSS Non-HT STA present.
16114547Sdg*/
1621541Srgrimesstruct brcms_protection {
16351381Sgreen	bool _g;
16451381Sgreen	s8 g_override;
1651541Srgrimes	u8 gmode_user;
16625201Swollman	s8 overlap;
1671541Srgrimes	s8 nmode_user;
1681541Srgrimes	s8 n_cfg;
1691541Srgrimes	s8 n_cfg_override;
1701541Srgrimes	bool nongf;
1711541Srgrimes	s8 nongf_override;
1721541Srgrimes	s8 n_pam_override;
1731541Srgrimes	bool n_obss;
1741541Srgrimes};
1751541Srgrimes
1761549Srgrimes/*
17725201Swollman * anything affecting the single/dual streams/antenna operation
1781541Srgrimes *
17928270Swollman * hw_txchain: HW txchain bitmap cfg.
18025201Swollman * txchain: txchain bitmap being used.
1811541Srgrimes * txstreams: number of txchains being used.
1821541Srgrimes * hw_rxchain: HW rxchain bitmap cfg.
1831541Srgrimes * rxchain: rxchain bitmap being used.
1841541Srgrimes * rxstreams: number of rxchains being used.
18525201Swollman * ant_rx_ovr: rx antenna override.
1861541Srgrimes * txant: userTx antenna setting.
1871541Srgrimes * phytxant: phyTx antenna setting in txheader.
1881541Srgrimes * ss_opmode: singlestream Operational mode, 0:siso; 1:cdd.
1891541Srgrimes * ss_algosel_auto: if true, use wlc->stf->ss_algo_channel;
19036079Swollman *			else use wlc->band->stf->ss_mode_band.
19136079Swollman * ss_algo_channel: ss based on per-channel algo: 0: SISO, 1: CDD 2: STBC.
19236079Swollman * rxchain_restore_delay: delay time to restore default rxchain.
19336079Swollman * ldpc: AUTO/ON/OFF ldpc cap supported.
19451381Sgreen * txcore[MAX_STREAMS_SUPPORTED + 1]: bitmap of selected core for each Nsts.
19536079Swollman * spatial_policy:
19652070Sgreen */
19765495Struckmanstruct brcms_stf {
19865198Sgreen	u8 hw_txchain;
19952070Sgreen	u8 txchain;
20065495Struckman	u8 txstreams;
20165198Sgreen	u8 hw_rxchain;
20268924Salfred	u8 rxchain;
20361837Salfred	u8 rxstreams;
20461837Salfred	u8 ant_rx_ovr;
20561837Salfred	s8 txant;
20661837Salfred	u16 phytxant;
20761837Salfred	u8 ss_opmode;
20861837Salfred	bool ss_algosel_auto;
20961837Salfred	u16 ss_algo_channel;
21061837Salfred	u8 rxchain_restore_delay;
21161837Salfred	s8 ldpc;
21268924Salfred	u8 txcore[MAX_STREAMS_SUPPORTED + 1];
21351381Sgreen	s8 spatial_policy;
21436079Swollman};
21536079Swollman
21636079Swollman#define BRCMS_STF_SS_STBC_TX(wlc, scb) \
2171549Srgrimes	(((wlc)->stf->txstreams > 1) && (((wlc)->band->band_stf_stbc_tx == ON) \
21825201Swollman	 || (((scb)->flags & SCB_STBCCAP) && \
2191541Srgrimes	     (wlc)->band->band_stf_stbc_tx == AUTO && \
2201541Srgrimes	     isset(&((wlc)->stf->ss_algo_channel), PHY_TXC1_MODE_STBC))))
22125201Swollman
2221541Srgrimes#define BRCMS_STBC_CAP_PHY(wlc) (BRCMS_ISNPHY(wlc->band) && \
22336079Swollman				 NREV_GE(wlc->band->phyrev, 3))
2241541Srgrimes
22536079Swollman#define BRCMS_SGI_CAP_PHY(wlc) ((BRCMS_ISNPHY(wlc->band) && \
22625201Swollman				 NREV_GE(wlc->band->phyrev, 3)) || \
2271541Srgrimes				BRCMS_ISLCNPHY(wlc->band))
2281541Srgrimes
2291541Srgrimes#define BRCMS_CHAN_PHYTYPE(x)     (((x) & RXS_CHAN_PHYTYPE_MASK) \
2301541Srgrimes				   >> RXS_CHAN_PHYTYPE_SHIFT)
23153212Sphk#define BRCMS_CHAN_CHANNEL(x)     (((x) & RXS_CHAN_ID_MASK) \
2321541Srgrimes				   >> RXS_CHAN_ID_SHIFT)
23312041Swollman
23412041Swollman/*
23512041Swollman * core state (mac)
2361541Srgrimes */
2371541Srgrimesstruct brcms_core {
2381541Srgrimes	uint coreidx;		/* # sb enumerated core */
2391541Srgrimes
2401549Srgrimes	/* fifo */
2411541Srgrimes	uint *txavail[NFIFO];	/* # tx descriptors available */
2421541Srgrimes
2431541Srgrimes	struct macstat *macstat_snapshot;	/* mac hw prev read values */
24414547Sdg};
2451541Srgrimes
2461541Srgrimes/*
2471541Srgrimes * band state (phy+ana+radio)
24814547Sdg */
24914547Sdgstruct brcms_band {
25014547Sdg	int bandtype;		/* BRCM_BAND_2G, BRCM_BAND_5G */
25118787Spst	uint bandunit;		/* bandstate[] index */
25214547Sdg
25343196Sfenner	u16 phytype;		/* phytype */
25443196Sfenner	u16 phyrev;
25543196Sfenner	u16 radioid;
25643196Sfenner	u16 radiorev;
25743196Sfenner	struct brcms_phy_pub *pi; /* pointer to phy specific information */
25843196Sfenner	bool abgphy_encore;
25943523Sfenner
26014547Sdg	u8 gmode;		/* currently active gmode */
26114547Sdg
26214547Sdg	struct scb *hwrs_scb;	/* permanent scb for hw rateset */
26314547Sdg
26443523Sfenner	/* band-specific copy of default_bss.rateset */
26514547Sdg	struct brcms_c_rateset defrateset;
2661541Srgrimes
26752070Sgreen	u8 band_stf_ss_mode;	/* Configured STF type, 0:siso; 1:cdd */
2681541Srgrimes	s8 band_stf_stbc_tx;	/* STBC TX 0:off; 1:force on; -1:auto */
26936079Swollman	/* rates supported by chip (phy-specific) */
2701541Srgrimes	struct brcms_c_rateset hw_rateset;
2711541Srgrimes	u8 basic_rate[BRCM_MAXRATE + 1]; /* basic rates indexed by rate */
2721541Srgrimes	bool mimo_cap_40;	/* 40 MHz cap enabled on this band */
2731541Srgrimes	s8 antgain;		/* antenna gain from srom */
2741541Srgrimes
2751541Srgrimes	u16 CWmin; /* minimum size of contention window, in unit of aSlotTime */
2761541Srgrimes	u16 CWmax; /* maximum size of contention window, in unit of aSlotTime */
2771549Srgrimes	struct ieee80211_supported_band band;
2781541Srgrimes};
2791541Srgrimes
2801541Srgrimes/* module control blocks */
2811541Srgrimesstruct modulecb {
2821541Srgrimes	/* module name : NULL indicates empty array member */
2831541Srgrimes	char name[32];
28441086Struckman	/* handle passed when handler 'doiovar' is called */
2851541Srgrimes	struct brcms_info *hdl;
28615269Sdg
28714547Sdg	int (*down_fn)(void *handle); /* down handler. Note: the int returned
28853212Sphk				       * by the down function is a count of the
28953212Sphk				       * number of timers that could not be
29053212Sphk				       * freed.
29114547Sdg				       */
29215269Sdg
29353212Sphk};
29453212Sphk
29543523Sfennerstruct brcms_hw_band {
29643196Sfenner	int bandtype;		/* BRCM_BAND_2G, BRCM_BAND_5G */
29743523Sfenner	uint bandunit;		/* bandstate[] index */
29843523Sfenner	u16 mhfs[MHFMAX];	/* MHF array shadow */
29943523Sfenner	u8 bandhw_stf_ss_mode;	/* HW configured STF type, 0:siso; 1:cdd */
30014547Sdg	u16 CWmin;
30115269Sdg	u16 CWmax;
3021541Srgrimes	u32 core_flags;
3031541Srgrimes
3041541Srgrimes	u16 phytype;		/* phytype */
3051541Srgrimes	u16 phyrev;
3061541Srgrimes	u16 radioid;
3071541Srgrimes	u16 radiorev;
3081541Srgrimes	struct brcms_phy_pub *pi; /* pointer to phy specific information */
3091541Srgrimes	bool abgphy_encore;
3101541Srgrimes};
3111541Srgrimes
3121541Srgrimesstruct brcms_hardware {
3131541Srgrimes	bool _piomode;		/* true if pio mode */
3141541Srgrimes	struct brcms_c_info *wlc;
3153308Sphk
3163308Sphk	/* fifo */
31746014Sache	struct dma_pub *di[NFIFO];	/* dma handles, per fifo */
3183308Sphk
3191541Srgrimes	uint unit;		/* device instance number */
3203308Sphk
3211541Srgrimes	/* version info */
3221541Srgrimes	u16 vendorid;	/* PCI vendor id */
3231541Srgrimes	u16 deviceid;	/* PCI device id */
3241541Srgrimes	uint corerev;		/* core revision */
32517096Swollman	u8 sromrev;		/* version # of the srom */
3261541Srgrimes	u16 boardrev;	/* version # of particular board */
3271541Srgrimes	u32 boardflags;	/* Board specific flags from srom */
3281541Srgrimes	u32 boardflags2;	/* More board flags if sromrev >= 4 */
3291541Srgrimes	u32 machwcap;	/* MAC capabilities */
3301541Srgrimes	u32 machwcap_backup;	/* backup of machwcap */
3311541Srgrimes
3321541Srgrimes	struct si_pub *sih;	/* SI handle (cookie for siutils calls) */
3331541Srgrimes	struct bcma_device *d11core;	/* pointer to 802.11 core */
3341541Srgrimes	struct phy_shim_info *physhim; /* phy shim layer handler */
3351541Srgrimes	struct shared_phy *phy_sh;	/* pointer to shared phy state */
3361541Srgrimes	struct brcms_hw_band *band;/* pointer to active per-band state */
3371541Srgrimes	/* band state per phy/radio */
3381541Srgrimes	struct brcms_hw_band *bandstate[MAXBANDS];
3391541Srgrimes	u16 bmac_phytxant;	/* cache of high phytxant state */
3401541Srgrimes	bool shortslot;		/* currently using 11g ShortSlot timing */
3411549Srgrimes	u16 SRL;		/* 802.11 dot11ShortRetryLimit */
3421541Srgrimes	u16 LRL;		/* 802.11 dot11LongRetryLimit */
3431541Srgrimes	u16 SFBL;		/* Short Frame Rate Fallback Limit */
3441541Srgrimes	u16 LFBL;		/* Long Frame Rate Fallback Limit */
34558225Sfenner
3461541Srgrimes	bool up;		/* d11 hardware up and running */
34758225Sfenner	uint now;		/* # elapsed seconds */
34858225Sfenner	uint _nbands;		/* # bands supported */
34958225Sfenner	u16 chanspec;	/* bmac chanspec shadow */
35058225Sfenner
35158225Sfenner	uint *txavail[NFIFO];	/* # tx descriptors available */
35258225Sfenner	const u16 *xmtfifo_sz;	/* fifo size in 256B for each xmt fifo */
3531541Srgrimes
3541541Srgrimes	u32 pllreq;		/* pll requests to keep PLL on */
3551549Srgrimes
3561541Srgrimes	u8 suspended_fifos;	/* Which TX fifo to remain awake for */
3571541Srgrimes	u32 maccontrol;	/* Cached value of maccontrol */
35828270Swollman	uint mac_suspend_depth;	/* current depth of mac_suspend levels */
3591541Srgrimes	u32 wake_override;	/* bit flags to force MAC to WAKE mode */
3601541Srgrimes	u32 mute_override;	/* Prevent ucode from sending beacons */
3611541Srgrimes	u8 etheraddr[ETH_ALEN];	/* currently configured ethernet address */
3621541Srgrimes	bool noreset;		/* true= do not reset hw, used by WLC_OUT */
3631541Srgrimes	bool forcefastclk;	/* true if h/w is forcing to use fast clk */
3641541Srgrimes	bool clk;		/* core is out of reset and has clock */
3651541Srgrimes	bool sbclk;		/* sb has clock */
36643196Sfenner	bool phyclk;		/* phy is out of reset and has clock */
36743196Sfenner
36843196Sfenner	bool ucode_loaded;	/* true after ucode downloaded */
36943196Sfenner
37043196Sfenner
37143196Sfenner	u8 hw_stf_ss_opmode;	/* STF single stream operation mode */
37243196Sfenner	u8 antsel_type;	/* Type of boardlevel mimo antenna switch-logic
3731541Srgrimes				 * 0 = N/A, 1 = 2x4 board, 2 = 2x3 CB2 board
3741541Srgrimes				 */
3751541Srgrimes	u32 antsel_avail;	/*
3761541Srgrimes				 * put struct antsel_info here if more info is
3771549Srgrimes				 * needed
37825201Swollman				 */
3791541Srgrimes};
38028270Swollman
38125201Swollman/*
3821541Srgrimes * Principal common driver data structure.
3831541Srgrimes *
3841541Srgrimes * pub: pointer to driver public state.
3851541Srgrimes * wl: pointer to specific private state.
3861541Srgrimes * hw: HW related state.
3871541Srgrimes * clkreq_override: setting for clkreq for PCIE : Auto, 0, 1.
3881541Srgrimes * fastpwrup_dly: time in us needed to bring up d11 fast clock.
3891541Srgrimes * macintstatus: bit channel between isr and dpc.
3901541Srgrimes * macintmask: sw runtime master macintmask value.
3911541Srgrimes * defmacintmask: default "on" macintmask value.
3921541Srgrimes * clk: core is out of reset and has clock.
3931541Srgrimes * core: pointer to active io core.
3941541Srgrimes * band: pointer to active per-band state.
3951541Srgrimes * corestate: per-core state (one per hw core).
3961541Srgrimes * bandstate: per-band state (one per phy/radio).
3971541Srgrimes * qvalid: DirFrmQValid and BcMcFrmQValid.
3981541Srgrimes * ampdu: ampdu module handler.
3991541Srgrimes * asi: antsel module handler.
40025201Swollman * cmi: channel manager module handler.
4011541Srgrimes * vendorid: PCI vendor id.
4021541Srgrimes * deviceid: PCI device id.
4031541Srgrimes * ucode_rev: microcode revision.
4041541Srgrimes * machwcap: MAC capabilities, BMAC shadow.
4051549Srgrimes * perm_etheraddr: original sprom local ethernet address.
4061541Srgrimes * bandlocked: disable auto multi-band switching.
4071541Srgrimes * bandinit_pending: track band init in auto band.
4081541Srgrimes * radio_monitor: radio timer is running.
4091541Srgrimes * going_down: down path intermediate variable.
4101541Srgrimes * wdtimer: timer for watchdog routine.
4111541Srgrimes * radio_timer: timer for hw radio button monitor routine.
4121541Srgrimes * monitor: monitor (MPDU sniffing) mode.
41317096Swollman * bcnmisc_monitor: bcns promisc mode override for monitor.
4141541Srgrimes * _rifs: enable per-packet rifs.
4151541Srgrimes * bcn_li_bcn: beacon listen interval in # beacons.
4161541Srgrimes * bcn_li_dtim: beacon listen interval in # dtims.
4171541Srgrimes * WDarmed: watchdog timer is armed.
4181549Srgrimes * WDlast: last time wlc_watchdog() was called.
4191541Srgrimes * edcf_txop[IEEE80211_NUM_ACS]: current txop for each ac.
4201541Srgrimes * wme_retries: per-AC retry limits.
4211541Srgrimes * bsscfg: set of BSS configurations, idx 0 is default and always valid.
4221541Srgrimes * cfg: the primary bsscfg (can be AP or STA).
4231541Srgrimes * modulecb:
4241541Srgrimes * mimoft: SIGN or 11N.
4251541Srgrimes * cck_40txbw: 11N, cck tx b/w override when in 40MHZ mode.
4261541Srgrimes * ofdm_40txbw: 11N, ofdm tx b/w override when in 40MHZ mode.
4271541Srgrimes * mimo_40txbw: 11N, mimo tx b/w override when in 40MHZ mode.
4281541Srgrimes * default_bss: configured BSS parameters.
4291541Srgrimes * mc_fid_counter: BC/MC FIFO frame ID counter.
4301541Srgrimes * country_default: saved country for leaving 802.11d auto-country mode.
4311541Srgrimes * autocountry_default: initial country for 802.11d auto-country mode.
4321541Srgrimes * prb_resp_timeout: do not send prb resp if request older
43317096Swollman *		     than this, 0 = disable.
4341541Srgrimes * home_chanspec: shared home chanspec.
4351541Srgrimes * chanspec: target operational channel.
4361541Srgrimes * usr_fragthresh: user configured fragmentation threshold.
4371541Srgrimes * fragthresh[NFIFO]: per-fifo fragmentation thresholds.
4381541Srgrimes * RTSThresh: 802.11 dot11RTSThreshold.
4396211Sdg * SRL: 802.11 dot11ShortRetryLimit.
4401541Srgrimes * LRL: 802.11 dot11LongRetryLimit.
4411541Srgrimes * SFBL: Short Frame Rate Fallback Limit.
4421541Srgrimes * LFBL: Long Frame Rate Fallback Limit.
4431541Srgrimes * shortslot: currently using 11g ShortSlot timing.
4441541Srgrimes * shortslot_override: 11g ShortSlot override.
4451541Srgrimes * include_legacy_erp: include Legacy ERP info elt ID 47 as well as g ID 42.
4461541Srgrimes * PLCPHdr_override: 802.11b Preamble Type override.
4471541Srgrimes * stf:
4481541Srgrimes * bcn_rspec: save bcn ratespec purpose.
4491541Srgrimes * tempsense_lasttime;
4501541Srgrimes * tx_duty_cycle_ofdm: maximum allowed duty cycle for OFDM.
4511541Srgrimes * tx_duty_cycle_cck: maximum allowed duty cycle for CCK.
4521541Srgrimes * wiphy:
4531541Srgrimes * pri_scb: primary Station Control Block
4541541Srgrimes */
4551541Srgrimesstruct brcms_c_info {
4561541Srgrimes	struct brcms_pub *pub;
4571549Srgrimes	struct brcms_info *wl;
45828270Swollman	struct brcms_hardware *hw;
4591541Srgrimes
46028270Swollman	/* clock */
4611541Srgrimes	u16 fastpwrup_dly;
4621541Srgrimes
4631541Srgrimes	/* interrupt */
4641541Srgrimes	u32 macintstatus;
46528270Swollman	u32 macintmask;
4661541Srgrimes	u32 defmacintmask;
4671541Srgrimes
4681541Srgrimes	bool clk;
4691541Srgrimes
4701541Srgrimes	/* multiband */
4711541Srgrimes	struct brcms_core *core;
4721541Srgrimes	struct brcms_band *band;
4731541Srgrimes	struct brcms_core *corestate;
4741541Srgrimes	struct brcms_band *bandstate[MAXBANDS];
4751541Srgrimes
4761541Srgrimes	/* packet queue */
4771541Srgrimes	uint qvalid;
4781541Srgrimes
4791541Srgrimes	struct ampdu_info *ampdu;
4801541Srgrimes	struct antsel_info *asi;
4811541Srgrimes	struct brcms_cm_info *cmi;
4821541Srgrimes
48331053Sjkh	u16 vendorid;
48431053Sjkh	u16 deviceid;
48531053Sjkh	uint ucode_rev;
4861541Srgrimes
48743301Sdillon	u8 perm_etheraddr[ETH_ALEN];
48831053Sjkh
48931053Sjkh	bool bandlocked;
49031053Sjkh	bool bandinit_pending;
49131053Sjkh
4921541Srgrimes	bool radio_monitor;
4931541Srgrimes	bool going_down;
4941541Srgrimes
49530108Sphk	bool beacon_template_virgin;
49630108Sphk
4971541Srgrimes	struct brcms_timer *wdtimer;
4981541Srgrimes	struct brcms_timer *radio_timer;
4991541Srgrimes
5001541Srgrimes	/* promiscuous */
5011541Srgrimes	uint filter_flags;
5023308Sphk
5033308Sphk	/* driver feature */
5041541Srgrimes	bool _rifs;
5051541Srgrimes
5061541Srgrimes	/* AP-STA synchronization, power save */
5071541Srgrimes	u8 bcn_li_bcn;
5081541Srgrimes	u8 bcn_li_dtim;
50933628Sfenner
51033628Sfenner	bool WDarmed;
51133628Sfenner	u32 WDlast;
51233628Sfenner
51333628Sfenner	/* WME */
51433628Sfenner	u16 edcf_txop[IEEE80211_NUM_ACS];
5151541Srgrimes
5166222Swollman	u16 wme_retries[IEEE80211_NUM_ACS];
5176222Swollman
5186222Swollman	struct brcms_bss_cfg *bsscfg;
5196222Swollman
5206222Swollman	struct modulecb *modulecb;
5216222Swollman
5226222Swollman	u8 mimoft;
5236222Swollman	s8 cck_40txbw;
5241541Srgrimes	s8 ofdm_40txbw;
5251541Srgrimes	s8 mimo_40txbw;
5261541Srgrimes
5271541Srgrimes	struct brcms_bss_info *default_bss;
5286222Swollman
5296222Swollman	u16 mc_fid_counter;
5301541Srgrimes
5311541Srgrimes	char country_default[BRCM_CNTRY_BUF_SZ];
5321541Srgrimes	char autocountry_default[BRCM_CNTRY_BUF_SZ];
5331541Srgrimes	u16 prb_resp_timeout;
5343308Sphk
5351541Srgrimes	u16 home_chanspec;
5361541Srgrimes
5371541Srgrimes	/* PHY parameters */
5381541Srgrimes	u16 chanspec;
5391541Srgrimes	u16 usr_fragthresh;
5401541Srgrimes	u16 fragthresh[NFIFO];
5411541Srgrimes	u16 RTSThresh;
5421541Srgrimes	u16 SRL;
5431541Srgrimes	u16 LRL;
5441541Srgrimes	u16 SFBL;
5451541Srgrimes	u16 LFBL;
5461541Srgrimes
5471541Srgrimes	/* network config */
5481541Srgrimes	bool shortslot;
5491541Srgrimes	s8 shortslot_override;
5501541Srgrimes	bool include_legacy_erp;
5511541Srgrimes
5521541Srgrimes	struct brcms_protection *protection;
5531541Srgrimes	s8 PLCPHdr_override;
5541541Srgrimes
5551541Srgrimes	struct brcms_stf *stf;
5561541Srgrimes
5571541Srgrimes	u32 bcn_rspec;
5581541Srgrimes
5591541Srgrimes	uint tempsense_lasttime;
5601541Srgrimes
5611541Srgrimes	u16 tx_duty_cycle_ofdm;
56254478Sgreen	u16 tx_duty_cycle_cck;
56354478Sgreen
56454478Sgreen	struct wiphy *wiphy;
56554478Sgreen	struct scb pri_scb;
5661541Srgrimes	struct ieee80211_vif *vif;
5671541Srgrimes
5681541Srgrimes	struct sk_buff *beacon;
5691541Srgrimes	u16 beacon_tim_offset;
5701541Srgrimes	u16 beacon_dtim_period;
57154478Sgreen	struct sk_buff *probe_resp;
57254478Sgreen};
57354478Sgreen
57454478Sgreen/* antsel module specific state */
5751541Srgrimesstruct antsel_info {
5761541Srgrimes	struct brcms_c_info *wlc;	/* pointer to main wlc structure */
5771623Sdg	struct brcms_pub *pub;		/* pointer to public fn */
5781541Srgrimes	u8 antsel_type;	/* Type of boardlevel mimo antenna switch-logic
5791541Srgrimes				 * 0 = N/A, 1 = 2x4 board, 2 = 2x3 CB2 board
5801541Srgrimes				 */
5811541Srgrimes	u8 antsel_antswitch;	/* board level antenna switch type */
5821623Sdg	bool antsel_avail;	/* Ant selection availability (SROM based) */
5831541Srgrimes	struct brcms_antselcfg antcfg_11n; /* antenna configuration */
5841541Srgrimes	struct brcms_antselcfg antcfg_cur; /* current antenna config (auto) */
5851541Srgrimes};
5861541Srgrimes
5871541Srgrimesenum brcms_bss_type {
5881541Srgrimes	BRCMS_TYPE_STATION,
5891541Srgrimes	BRCMS_TYPE_AP,
5901541Srgrimes	BRCMS_TYPE_ADHOC,
5911541Srgrimes};
5921541Srgrimes
5931623Sdg/*
5941541Srgrimes * BSS configuration state
5951541Srgrimes *
5961541Srgrimes * wlc: wlc to which this bsscfg belongs to.
5971541Srgrimes * type: interface type
5981541Srgrimes * SSID_len: the length of SSID
5991541Srgrimes * SSID: SSID string
6001541Srgrimes *
6011541Srgrimes *
6021541Srgrimes * BSSID: BSSID (associated)
6031541Srgrimes * cur_etheraddr: h/w address
6041541Srgrimes * flags: BSSCFG flags; see below
6051541Srgrimes *
6061541Srgrimes * current_bss: BSS parms in ASSOCIATED state
6071541Srgrimes *
6081541Srgrimes *
6091541Srgrimes * ID: 'unique' ID of this bsscfg, assigned at bsscfg allocation
6101541Srgrimes */
61147720Speterstruct brcms_bss_cfg {
61247720Speter	struct brcms_c_info *wlc;
61347720Speter	enum brcms_bss_type type;
61447720Speter	u8 SSID_len;
61547720Speter	u8 SSID[IEEE80211_MAX_SSID_LEN];
61647720Speter	u8 BSSID[ETH_ALEN];
61747720Speter	struct brcms_bss_info *current_bss;
61847720Speter};
61947720Speter
62017096Swollmanint brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p);
62117096Swollmanint brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo,
6226222Swollman			   uint *blocks);
6236222Swollman
6246222Swollmanint brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config);
6256222Swollmanvoid brcms_c_mac_promisc(struct brcms_c_info *wlc, uint filter_flags);
6266222Swollmanu16 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec, uint mac_len);
6276222Swollmanu32 brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec,
6286222Swollman			       bool use_rspec, u16 mimo_ctlchbw);
6296222Swollmanu16 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only,
63042902Sfenner			       u32 rts_rate, u32 frame_rate,
63142902Sfenner			       u8 rts_preamble_type, u8 frame_preamble_type,
63242903Sfenner			       uint frame_len, bool ba);
63325201Swollmanvoid brcms_c_inval_dma_pkts(struct brcms_hardware *hw,
6341541Srgrimes			    struct ieee80211_sta *sta, void (*dma_callback_fn));
6351541Srgrimesvoid brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend);
6361541Srgrimesint brcms_c_set_nmode(struct brcms_c_info *wlc);
6371541Srgrimesvoid brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc, u32 bcn_rate);
6381541Srgrimesvoid brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type);
6391541Srgrimesvoid brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec,
6401541Srgrimes			  bool mute, struct txpwr_limits *txpwr);
6411541Srgrimesvoid brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v);
6421541Srgrimesu16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset);
6431541Srgrimesvoid brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val,
6441541Srgrimes		 int bands);
6451541Srgrimesvoid brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags);
6461541Srgrimesvoid brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val);
6471541Srgrimesvoid brcms_b_phy_reset(struct brcms_hardware *wlc_hw);
6481541Srgrimesvoid brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw);
6491541Srgrimesvoid brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw);
6501541Srgrimesvoid brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw,
6511541Srgrimes				     u32 override_bit);
6521541Srgrimesvoid brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw,
6531541Srgrimes				       u32 override_bit);
6541541Srgrimesvoid brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset,
6551541Srgrimes				int len, void *buf);
6561541Srgrimesu16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate);
6571541Srgrimesvoid brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset,
6581541Srgrimes			   const void *buf, int len, u32 sel);
6591541Srgrimesvoid brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset,
6601541Srgrimes			     void *buf, int len, u32 sel);
6611541Srgrimesvoid brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode);
6621541Srgrimesu16 brcms_b_get_txant(struct brcms_hardware *wlc_hw);
6631541Srgrimesvoid brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk);
6641541Srgrimesvoid brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk);
6651541Srgrimesvoid brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on);
6661541Srgrimesvoid brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant);
6671541Srgrimesvoid brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode);
6681541Srgrimesvoid brcms_c_init_scb(struct scb *scb);
6691541Srgrimes
6701541Srgrimes#endif				/* _BRCM_MAIN_H_ */
6711541Srgrimes