1/* SPDX-License-Identifier: ISC */
2/*
3 * Copyright (c) 2004-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
5 * Copyright (c) 2016-2017 Erik Stromdahl <erik.stromdahl@gmail.com>
6 */
7
8#ifndef _SDIO_H_
9#define _SDIO_H_
10
11#define ATH10K_HIF_MBOX_BLOCK_SIZE              256
12
13#define ATH10K_SDIO_MAX_BUFFER_SIZE             4096 /*Unsure of this constant*/
14
15/* Mailbox address in SDIO address space */
16#define ATH10K_HIF_MBOX_BASE_ADDR               0x1000
17#define ATH10K_HIF_MBOX_WIDTH                   0x800
18
19#define ATH10K_HIF_MBOX_TOT_WIDTH \
20	(ATH10K_HIF_MBOX_NUM_MAX * ATH10K_HIF_MBOX_WIDTH)
21
22#define ATH10K_HIF_MBOX0_EXT_BASE_ADDR          0x5000
23#define ATH10K_HIF_MBOX0_EXT_WIDTH              (36 * 1024)
24#define ATH10K_HIF_MBOX0_EXT_WIDTH_ROME_2_0     (56 * 1024)
25#define ATH10K_HIF_MBOX1_EXT_WIDTH              (36 * 1024)
26#define ATH10K_HIF_MBOX_DUMMY_SPACE_SIZE        (2 * 1024)
27
28#define ATH10K_HTC_MBOX_MAX_PAYLOAD_LENGTH \
29	(ATH10K_SDIO_MAX_BUFFER_SIZE - sizeof(struct ath10k_htc_hdr))
30
31#define ATH10K_HIF_MBOX_NUM_MAX                 4
32#define ATH10K_SDIO_BUS_REQUEST_MAX_NUM         1024
33
34#define ATH10K_SDIO_HIF_COMMUNICATION_TIMEOUT_HZ (100 * HZ)
35
36/* HTC runs over mailbox 0 */
37#define ATH10K_HTC_MAILBOX                      0
38#define ATH10K_HTC_MAILBOX_MASK                 BIT(ATH10K_HTC_MAILBOX)
39
40/* GMBOX addresses */
41#define ATH10K_HIF_GMBOX_BASE_ADDR              0x7000
42#define ATH10K_HIF_GMBOX_WIDTH                  0x4000
43
44/* Modified versions of the sdio.h macros.
45 * The macros in sdio.h can't be used easily with the FIELD_{PREP|GET}
46 * macros in bitfield.h, so we define our own macros here.
47 */
48#define ATH10K_SDIO_DRIVE_DTSX_MASK \
49	(SDIO_DRIVE_DTSx_MASK << SDIO_DRIVE_DTSx_SHIFT)
50
51#define ATH10K_SDIO_DRIVE_DTSX_TYPE_B           0
52#define ATH10K_SDIO_DRIVE_DTSX_TYPE_A           1
53#define ATH10K_SDIO_DRIVE_DTSX_TYPE_C           2
54#define ATH10K_SDIO_DRIVE_DTSX_TYPE_D           3
55
56/* SDIO CCCR register definitions */
57#define CCCR_SDIO_IRQ_MODE_REG                  0xF0
58#define CCCR_SDIO_IRQ_MODE_REG_SDIO3            0x16
59
60#define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_ADDR   0xF2
61
62#define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_A      0x02
63#define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_C      0x04
64#define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_D      0x08
65
66#define CCCR_SDIO_ASYNC_INT_DELAY_ADDRESS       0xF0
67#define CCCR_SDIO_ASYNC_INT_DELAY_MASK          0xC0
68
69/* mode to enable special 4-bit interrupt assertion without clock */
70#define SDIO_IRQ_MODE_ASYNC_4BIT_IRQ            BIT(0)
71#define SDIO_IRQ_MODE_ASYNC_4BIT_IRQ_SDIO3      BIT(1)
72
73#define ATH10K_SDIO_TARGET_DEBUG_INTR_MASK      0x01
74
75/* The theoretical maximum number of RX messages that can be fetched
76 * from the mbox interrupt handler in one loop is derived in the following
77 * way:
78 *
79 * Let's assume that each packet in a bundle of the maximum bundle size
80 * (HTC_HOST_MAX_MSG_PER_RX_BUNDLE) has the HTC header bundle count set
81 * to the maximum value (HTC_HOST_MAX_MSG_PER_RX_BUNDLE).
82 *
83 * in this case the driver must allocate
84 * (HTC_HOST_MAX_MSG_PER_RX_BUNDLE * 2) skb's.
85 */
86#define ATH10K_SDIO_MAX_RX_MSGS \
87	(HTC_HOST_MAX_MSG_PER_RX_BUNDLE * 2)
88
89#define ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL   0x00000868u
90#define ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL_DISABLE_SLEEP_OFF 0xFFFEFFFF
91#define ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL_DISABLE_SLEEP_ON 0x10000
92
93enum sdio_mbox_state {
94	SDIO_MBOX_UNKNOWN_STATE = 0,
95	SDIO_MBOX_REQUEST_TO_SLEEP_STATE = 1,
96	SDIO_MBOX_SLEEP_STATE = 2,
97	SDIO_MBOX_AWAKE_STATE = 3,
98};
99
100#define ATH10K_CIS_READ_WAIT_4_RTC_CYCLE_IN_US	125
101#define ATH10K_CIS_RTC_STATE_ADDR		0x1138
102#define ATH10K_CIS_RTC_STATE_ON			0x01
103#define ATH10K_CIS_XTAL_SETTLE_DURATION_IN_US	1500
104#define ATH10K_CIS_READ_RETRY			10
105#define ATH10K_MIN_SLEEP_INACTIVITY_TIME_MS	50
106
107/* TODO: remove this and use skb->cb instead, much cleaner approach */
108struct ath10k_sdio_bus_request {
109	struct list_head list;
110
111	/* sdio address */
112	u32 address;
113
114	struct sk_buff *skb;
115	enum ath10k_htc_ep_id eid;
116	int status;
117	/* Specifies if the current request is an HTC message.
118	 * If not, the eid is not applicable an the TX completion handler
119	 * associated with the endpoint will not be invoked.
120	 */
121	bool htc_msg;
122	/* Completion that (if set) will be invoked for non HTC requests
123	 * (htc_msg == false) when the request has been processed.
124	 */
125	struct completion *comp;
126};
127
128struct ath10k_sdio_rx_data {
129	struct sk_buff *skb;
130	size_t alloc_len;
131	size_t act_len;
132	enum ath10k_htc_ep_id eid;
133	bool part_of_bundle;
134	bool last_in_bundle;
135	bool trailer_only;
136};
137
138struct ath10k_sdio_irq_proc_regs {
139	u8 host_int_status;
140	u8 cpu_int_status;
141	u8 error_int_status;
142	u8 counter_int_status;
143	u8 mbox_frame;
144	u8 rx_lookahead_valid;
145	u8 host_int_status2;
146	u8 gmbox_rx_avail;
147	__le32 rx_lookahead[2 * ATH10K_HIF_MBOX_NUM_MAX];
148	__le32 int_status_enable;
149};
150
151struct ath10k_sdio_irq_enable_regs {
152	u8 int_status_en;
153	u8 cpu_int_status_en;
154	u8 err_int_status_en;
155	u8 cntr_int_status_en;
156};
157
158struct ath10k_sdio_irq_data {
159	/* protects irq_proc_reg and irq_en_reg below.
160	 * We use a mutex here and not a spinlock since we will have the
161	 * mutex locked while calling the sdio_memcpy_ functions.
162	 * These function require non atomic context, and hence, spinlocks
163	 * can be held while calling these functions.
164	 */
165	struct mutex mtx;
166	struct ath10k_sdio_irq_proc_regs *irq_proc_reg;
167	struct ath10k_sdio_irq_enable_regs *irq_en_reg;
168};
169
170struct ath10k_mbox_ext_info {
171	u32 htc_ext_addr;
172	u32 htc_ext_sz;
173};
174
175struct ath10k_mbox_info {
176	u32 htc_addr;
177	struct ath10k_mbox_ext_info ext_info[2];
178	u32 block_size;
179	u32 block_mask;
180	u32 gmbox_addr;
181	u32 gmbox_sz;
182};
183
184struct ath10k_sdio {
185	struct sdio_func *func;
186
187	struct ath10k_mbox_info mbox_info;
188	bool swap_mbox;
189	u32 mbox_addr[ATH10K_HTC_EP_COUNT];
190	u32 mbox_size[ATH10K_HTC_EP_COUNT];
191
192	/* available bus requests */
193	struct ath10k_sdio_bus_request bus_req[ATH10K_SDIO_BUS_REQUEST_MAX_NUM];
194	/* free list of bus requests */
195	struct list_head bus_req_freeq;
196
197	struct sk_buff_head rx_head;
198
199	/* protects access to bus_req_freeq */
200	spinlock_t lock;
201
202	struct ath10k_sdio_rx_data rx_pkts[ATH10K_SDIO_MAX_RX_MSGS];
203	size_t n_rx_pkts;
204
205	struct ath10k *ar;
206	struct ath10k_sdio_irq_data irq_data;
207
208	/* temporary buffer for sdio read.
209	 * It is allocated when probe, and used for receive bundled packets,
210	 * the read for bundled packets is not parallel, so it does not need
211	 * protected.
212	 */
213	u8 *vsg_buffer;
214
215	/* temporary buffer for BMI requests */
216	u8 *bmi_buf;
217
218	bool is_disabled;
219
220	struct workqueue_struct *workqueue;
221	struct work_struct wr_async_work;
222	struct list_head wr_asyncq;
223	/* protects access to wr_asyncq */
224	spinlock_t wr_async_lock;
225
226	struct work_struct async_work_rx;
227	struct timer_list sleep_timer;
228	enum sdio_mbox_state mbox_state;
229};
230
231static inline struct ath10k_sdio *ath10k_sdio_priv(struct ath10k *ar)
232{
233	return (struct ath10k_sdio *)ar->drv_priv;
234}
235
236#endif
237