1/* 2 * Linux driver for VMware's vmxnet3 ethernet NIC. 3 * 4 * Copyright (C) 2008-2022, VMware, Inc. All Rights Reserved. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; version 2 of the License and no later version. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 13 * NON INFRINGEMENT. See the GNU General Public License for more 14 * details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * The full GNU General Public License is included in this distribution in 21 * the file called "COPYING". 22 * 23 * Maintained by: pv-drivers@vmware.com 24 * 25 */ 26 27#ifndef _VMXNET3_INT_H 28#define _VMXNET3_INT_H 29 30#include <linux/bitops.h> 31#include <linux/ethtool.h> 32#include <linux/delay.h> 33#include <linux/netdevice.h> 34#include <linux/pci.h> 35#include <linux/compiler.h> 36#include <linux/slab.h> 37#include <linux/spinlock.h> 38#include <linux/ioport.h> 39#include <linux/highmem.h> 40#include <linux/timer.h> 41#include <linux/skbuff.h> 42#include <linux/interrupt.h> 43#include <linux/workqueue.h> 44#include <linux/uaccess.h> 45#include <asm/dma.h> 46#include <asm/page.h> 47 48#include <linux/tcp.h> 49#include <linux/udp.h> 50#include <linux/ip.h> 51#include <linux/ipv6.h> 52#include <linux/in.h> 53#include <linux/etherdevice.h> 54#include <asm/checksum.h> 55#include <linux/if_vlan.h> 56#include <linux/if_arp.h> 57#include <linux/inetdevice.h> 58#include <linux/log2.h> 59#include <linux/bpf.h> 60#include <net/page_pool/helpers.h> 61#include <net/xdp.h> 62 63#include "vmxnet3_defs.h" 64 65#ifdef DEBUG 66# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI(debug)" 67#else 68# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI" 69#endif 70 71 72/* 73 * Version numbers 74 */ 75#define VMXNET3_DRIVER_VERSION_STRING "1.7.0.0-k" 76 77/* Each byte of this 32-bit integer encodes a version number in 78 * VMXNET3_DRIVER_VERSION_STRING. 79 */ 80#define VMXNET3_DRIVER_VERSION_NUM 0x01070000 81 82#if defined(CONFIG_PCI_MSI) 83 /* RSS only makes sense if MSI-X is supported. */ 84 #define VMXNET3_RSS 85#endif 86 87#define VMXNET3_REV_7 6 /* Vmxnet3 Rev. 7 */ 88#define VMXNET3_REV_6 5 /* Vmxnet3 Rev. 6 */ 89#define VMXNET3_REV_5 4 /* Vmxnet3 Rev. 5 */ 90#define VMXNET3_REV_4 3 /* Vmxnet3 Rev. 4 */ 91#define VMXNET3_REV_3 2 /* Vmxnet3 Rev. 3 */ 92#define VMXNET3_REV_2 1 /* Vmxnet3 Rev. 2 */ 93#define VMXNET3_REV_1 0 /* Vmxnet3 Rev. 1 */ 94 95/* 96 * Capabilities 97 */ 98 99enum { 100 VMNET_CAP_SG = 0x0001, /* Can do scatter-gather transmits. */ 101 VMNET_CAP_IP4_CSUM = 0x0002, /* Can checksum only TCP/UDP over 102 * IPv4 */ 103 VMNET_CAP_HW_CSUM = 0x0004, /* Can checksum all packets. */ 104 VMNET_CAP_HIGH_DMA = 0x0008, /* Can DMA to high memory. */ 105 VMNET_CAP_TOE = 0x0010, /* Supports TCP/IP offload. */ 106 VMNET_CAP_TSO = 0x0020, /* Supports TCP Segmentation 107 * offload */ 108 VMNET_CAP_SW_TSO = 0x0040, /* Supports SW TCP Segmentation */ 109 VMNET_CAP_VMXNET_APROM = 0x0080, /* Vmxnet APROM support */ 110 VMNET_CAP_HW_TX_VLAN = 0x0100, /* Can we do VLAN tagging in HW */ 111 VMNET_CAP_HW_RX_VLAN = 0x0200, /* Can we do VLAN untagging in HW */ 112 VMNET_CAP_SW_VLAN = 0x0400, /* VLAN tagging/untagging in SW */ 113 VMNET_CAP_WAKE_PCKT_RCV = 0x0800, /* Can wake on network packet recv? */ 114 VMNET_CAP_ENABLE_INT_INLINE = 0x1000, /* Enable Interrupt Inline */ 115 VMNET_CAP_ENABLE_HEADER_COPY = 0x2000, /* copy header for vmkernel */ 116 VMNET_CAP_TX_CHAIN = 0x4000, /* Guest can use multiple tx entries 117 * for a pkt */ 118 VMNET_CAP_RX_CHAIN = 0x8000, /* pkt can span multiple rx entries */ 119 VMNET_CAP_LPD = 0x10000, /* large pkt delivery */ 120 VMNET_CAP_BPF = 0x20000, /* BPF Support in VMXNET Virtual HW*/ 121 VMNET_CAP_SG_SPAN_PAGES = 0x40000, /* Scatter-gather can span multiple*/ 122 /* pages transmits */ 123 VMNET_CAP_IP6_CSUM = 0x80000, /* Can do IPv6 csum offload. */ 124 VMNET_CAP_TSO6 = 0x100000, /* TSO seg. offload for IPv6 pkts. */ 125 VMNET_CAP_TSO256k = 0x200000, /* Can do TSO seg offload for */ 126 /* pkts up to 256kB. */ 127 VMNET_CAP_UPT = 0x400000 /* Support UPT */ 128}; 129 130/* 131 * Maximum devices supported. 132 */ 133#define MAX_ETHERNET_CARDS 10 134#define MAX_PCI_PASSTHRU_DEVICE 6 135 136struct vmxnet3_cmd_ring { 137 union Vmxnet3_GenericDesc *base; 138 u32 size; 139 u32 next2fill; 140 u32 next2comp; 141 u8 gen; 142 u8 isOutOfOrder; 143 dma_addr_t basePA; 144}; 145 146static inline void 147vmxnet3_cmd_ring_adv_next2fill(struct vmxnet3_cmd_ring *ring) 148{ 149 ring->next2fill++; 150 if (unlikely(ring->next2fill == ring->size)) { 151 ring->next2fill = 0; 152 VMXNET3_FLIP_RING_GEN(ring->gen); 153 } 154} 155 156static inline void 157vmxnet3_cmd_ring_adv_next2comp(struct vmxnet3_cmd_ring *ring) 158{ 159 VMXNET3_INC_RING_IDX_ONLY(ring->next2comp, ring->size); 160} 161 162static inline int 163vmxnet3_cmd_ring_desc_avail(struct vmxnet3_cmd_ring *ring) 164{ 165 return (ring->next2comp > ring->next2fill ? 0 : ring->size) + 166 ring->next2comp - ring->next2fill - 1; 167} 168 169struct vmxnet3_comp_ring { 170 union Vmxnet3_GenericDesc *base; 171 u32 size; 172 u32 next2proc; 173 u8 gen; 174 u8 intr_idx; 175 dma_addr_t basePA; 176}; 177 178static inline void 179vmxnet3_comp_ring_adv_next2proc(struct vmxnet3_comp_ring *ring) 180{ 181 ring->next2proc++; 182 if (unlikely(ring->next2proc == ring->size)) { 183 ring->next2proc = 0; 184 VMXNET3_FLIP_RING_GEN(ring->gen); 185 } 186} 187 188struct vmxnet3_tx_data_ring { 189 struct Vmxnet3_TxDataDesc *base; 190 u32 size; 191 dma_addr_t basePA; 192}; 193 194#define VMXNET3_MAP_NONE 0 195#define VMXNET3_MAP_SINGLE BIT(0) 196#define VMXNET3_MAP_PAGE BIT(1) 197#define VMXNET3_MAP_XDP BIT(2) 198 199struct vmxnet3_tx_buf_info { 200 u32 map_type; 201 u16 len; 202 u16 sop_idx; 203 dma_addr_t dma_addr; 204 union { 205 struct sk_buff *skb; 206 struct xdp_frame *xdpf; 207 }; 208}; 209 210struct vmxnet3_tq_driver_stats { 211 u64 drop_total; /* # of pkts dropped by the driver, the 212 * counters below track droppings due to 213 * different reasons 214 */ 215 u64 drop_too_many_frags; 216 u64 drop_oversized_hdr; 217 u64 drop_hdr_inspect_err; 218 u64 drop_tso; 219 220 u64 tx_ring_full; 221 u64 linearized; /* # of pkts linearized */ 222 u64 copy_skb_header; /* # of times we have to copy skb header */ 223 u64 oversized_hdr; 224 225 u64 xdp_xmit; 226 u64 xdp_xmit_err; 227}; 228 229struct vmxnet3_tx_ctx { 230 bool ipv4; 231 bool ipv6; 232 u16 mss; 233 u32 l4_offset; /* only valid for pkts requesting tso or csum 234 * offloading. For encap offload, it refers to 235 * inner L4 offset i.e. it includes outer header 236 * encap header and inner eth and ip header size 237 */ 238 239 u32 l4_hdr_size; /* only valid if mss != 0 240 * Refers to inner L4 hdr size for encap 241 * offload 242 */ 243 u32 copy_size; /* # of bytes copied into the data ring */ 244 union Vmxnet3_GenericDesc *sop_txd; 245 union Vmxnet3_GenericDesc *eop_txd; 246}; 247 248struct vmxnet3_tx_queue { 249 char name[IFNAMSIZ+8]; /* To identify interrupt */ 250 struct vmxnet3_adapter *adapter; 251 spinlock_t tx_lock; 252 struct vmxnet3_cmd_ring tx_ring; 253 struct vmxnet3_tx_buf_info *buf_info; 254 struct vmxnet3_tx_data_ring data_ring; 255 struct vmxnet3_comp_ring comp_ring; 256 struct Vmxnet3_TxQueueCtrl *shared; 257 struct vmxnet3_tq_driver_stats stats; 258 bool stopped; 259 int num_stop; /* # of times the queue is 260 * stopped */ 261 int qid; 262 u16 txdata_desc_size; 263} ____cacheline_aligned; 264 265enum vmxnet3_rx_buf_type { 266 VMXNET3_RX_BUF_NONE = 0, 267 VMXNET3_RX_BUF_SKB = 1, 268 VMXNET3_RX_BUF_PAGE = 2, 269 VMXNET3_RX_BUF_XDP = 3, 270}; 271 272#define VMXNET3_RXD_COMP_PENDING 0 273#define VMXNET3_RXD_COMP_DONE 1 274 275struct vmxnet3_rx_buf_info { 276 enum vmxnet3_rx_buf_type buf_type; 277 u16 len; 278 u8 comp_state; 279 union { 280 struct sk_buff *skb; 281 struct page *page; 282 }; 283 dma_addr_t dma_addr; 284}; 285 286struct vmxnet3_rx_ctx { 287 struct sk_buff *skb; 288 u32 sop_idx; 289}; 290 291struct vmxnet3_rq_driver_stats { 292 u64 drop_total; 293 u64 drop_err; 294 u64 drop_fcs; 295 u64 rx_buf_alloc_failure; 296 297 u64 xdp_packets; /* Total packets processed by XDP. */ 298 u64 xdp_tx; 299 u64 xdp_redirects; 300 u64 xdp_drops; 301 u64 xdp_aborted; 302}; 303 304struct vmxnet3_rx_data_ring { 305 Vmxnet3_RxDataDesc *base; 306 dma_addr_t basePA; 307 u16 desc_size; 308}; 309 310struct vmxnet3_rx_queue { 311 char name[IFNAMSIZ + 8]; /* To identify interrupt */ 312 struct vmxnet3_adapter *adapter; 313 struct napi_struct napi; 314 struct vmxnet3_cmd_ring rx_ring[2]; 315 struct vmxnet3_rx_data_ring data_ring; 316 struct vmxnet3_comp_ring comp_ring; 317 struct vmxnet3_rx_ctx rx_ctx; 318 u32 qid; /* rqID in RCD for buffer from 1st ring */ 319 u32 qid2; /* rqID in RCD for buffer from 2nd ring */ 320 u32 dataRingQid; /* rqID in RCD for buffer from data ring */ 321 struct vmxnet3_rx_buf_info *buf_info[2]; 322 struct Vmxnet3_RxQueueCtrl *shared; 323 struct vmxnet3_rq_driver_stats stats; 324 struct page_pool *page_pool; 325 struct xdp_rxq_info xdp_rxq; 326} ____cacheline_aligned; 327 328#define VMXNET3_DEVICE_MAX_TX_QUEUES 32 329#define VMXNET3_DEVICE_MAX_RX_QUEUES 32 /* Keep this value as a power of 2 */ 330 331#define VMXNET3_DEVICE_DEFAULT_TX_QUEUES 8 332#define VMXNET3_DEVICE_DEFAULT_RX_QUEUES 8 /* Keep this value as a power of 2 */ 333 334/* Should be less than UPT1_RSS_MAX_IND_TABLE_SIZE */ 335#define VMXNET3_RSS_IND_TABLE_SIZE (VMXNET3_DEVICE_MAX_RX_QUEUES * 4) 336 337#define VMXNET3_LINUX_MAX_MSIX_VECT (VMXNET3_DEVICE_MAX_TX_QUEUES + \ 338 VMXNET3_DEVICE_MAX_RX_QUEUES + 1) 339#define VMXNET3_LINUX_MIN_MSIX_VECT 3 /* 1 for tx, 1 for rx pair and 1 for event */ 340 341 342struct vmxnet3_intr { 343 enum vmxnet3_intr_mask_mode mask_mode; 344 enum vmxnet3_intr_type type; /* MSI-X, MSI, or INTx? */ 345 u8 num_intrs; /* # of intr vectors */ 346 u8 event_intr_idx; /* idx of the intr vector for event */ 347 u8 mod_levels[VMXNET3_LINUX_MAX_MSIX_VECT]; /* moderation level */ 348 char event_msi_vector_name[IFNAMSIZ+17]; 349#ifdef CONFIG_PCI_MSI 350 struct msix_entry msix_entries[VMXNET3_LINUX_MAX_MSIX_VECT]; 351#endif 352}; 353 354/* Interrupt sharing schemes, share_intr */ 355#define VMXNET3_INTR_BUDDYSHARE 0 /* Corresponding tx,rx queues share irq */ 356#define VMXNET3_INTR_TXSHARE 1 /* All tx queues share one irq */ 357#define VMXNET3_INTR_DONTSHARE 2 /* each queue has its own irq */ 358 359 360#define VMXNET3_STATE_BIT_RESETTING 0 361#define VMXNET3_STATE_BIT_QUIESCED 1 362struct vmxnet3_adapter { 363 struct vmxnet3_tx_queue tx_queue[VMXNET3_DEVICE_MAX_TX_QUEUES]; 364 struct vmxnet3_rx_queue rx_queue[VMXNET3_DEVICE_MAX_RX_QUEUES]; 365 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 366 struct vmxnet3_intr intr; 367 spinlock_t cmd_lock; 368 struct Vmxnet3_DriverShared *shared; 369 struct Vmxnet3_PMConf *pm_conf; 370 struct Vmxnet3_TxQueueDesc *tqd_start; /* all tx queue desc */ 371 struct Vmxnet3_RxQueueDesc *rqd_start; /* all rx queue desc */ 372 struct net_device *netdev; 373 struct pci_dev *pdev; 374 375 u8 __iomem *hw_addr0; /* for BAR 0 */ 376 u8 __iomem *hw_addr1; /* for BAR 1 */ 377 u8 version; 378 379#ifdef VMXNET3_RSS 380 struct UPT1_RSSConf *rss_conf; 381 bool rss; 382#endif 383 u32 num_rx_queues; 384 u32 num_tx_queues; 385 386 /* rx buffer related */ 387 unsigned skb_buf_size; 388 int rx_buf_per_pkt; /* only apply to the 1st ring */ 389 dma_addr_t shared_pa; 390 dma_addr_t queue_desc_pa; 391 dma_addr_t coal_conf_pa; 392 393 /* Wake-on-LAN */ 394 u32 wol; 395 396 /* Link speed */ 397 u32 link_speed; /* in mbps */ 398 399 u64 tx_timeout_count; 400 401 /* Ring sizes */ 402 u32 tx_ring_size; 403 u32 rx_ring_size; 404 u32 rx_ring2_size; 405 406 /* Size of buffer in the data ring */ 407 u16 txdata_desc_size; 408 u16 rxdata_desc_size; 409 410 bool rxdataring_enabled; 411 bool default_rss_fields; 412 enum Vmxnet3_RSSField rss_fields; 413 414 struct work_struct work; 415 416 unsigned long state; /* VMXNET3_STATE_BIT_xxx */ 417 418 int share_intr; 419 420 struct Vmxnet3_CoalesceScheme *coal_conf; 421 bool default_coal_mode; 422 423 dma_addr_t adapter_pa; 424 dma_addr_t pm_conf_pa; 425 dma_addr_t rss_conf_pa; 426 bool queuesExtEnabled; 427 struct Vmxnet3_RingBufferSize ringBufSize; 428 u32 devcap_supported[8]; 429 u32 ptcap_supported[8]; 430 u32 dev_caps[8]; 431 u16 tx_prod_offset; 432 u16 rx_prod_offset; 433 u16 rx_prod2_offset; 434 struct bpf_prog __rcu *xdp_bpf_prog; 435}; 436 437#define VMXNET3_WRITE_BAR0_REG(adapter, reg, val) \ 438 writel((val), (adapter)->hw_addr0 + (reg)) 439#define VMXNET3_READ_BAR0_REG(adapter, reg) \ 440 readl((adapter)->hw_addr0 + (reg)) 441 442#define VMXNET3_WRITE_BAR1_REG(adapter, reg, val) \ 443 writel((val), (adapter)->hw_addr1 + (reg)) 444#define VMXNET3_READ_BAR1_REG(adapter, reg) \ 445 readl((adapter)->hw_addr1 + (reg)) 446 447#define VMXNET3_WAKE_QUEUE_THRESHOLD(tq) (5) 448#define VMXNET3_RX_ALLOC_THRESHOLD(rq, ring_idx, adapter) \ 449 ((rq)->rx_ring[ring_idx].size >> 3) 450 451#define VMXNET3_GET_ADDR_LO(dma) ((u32)(dma)) 452#define VMXNET3_GET_ADDR_HI(dma) ((u32)(((u64)(dma)) >> 32)) 453 454#define VMXNET3_VERSION_GE_2(adapter) \ 455 (adapter->version >= VMXNET3_REV_2 + 1) 456#define VMXNET3_VERSION_GE_3(adapter) \ 457 (adapter->version >= VMXNET3_REV_3 + 1) 458#define VMXNET3_VERSION_GE_4(adapter) \ 459 (adapter->version >= VMXNET3_REV_4 + 1) 460#define VMXNET3_VERSION_GE_5(adapter) \ 461 (adapter->version >= VMXNET3_REV_5 + 1) 462#define VMXNET3_VERSION_GE_6(adapter) \ 463 (adapter->version >= VMXNET3_REV_6 + 1) 464#define VMXNET3_VERSION_GE_7(adapter) \ 465 (adapter->version >= VMXNET3_REV_7 + 1) 466 467/* must be a multiple of VMXNET3_RING_SIZE_ALIGN */ 468#define VMXNET3_DEF_TX_RING_SIZE 512 469#define VMXNET3_DEF_RX_RING_SIZE 1024 470#define VMXNET3_DEF_RX_RING2_SIZE 512 471 472#define VMXNET3_DEF_RXDATA_DESC_SIZE 128 473 474#define VMXNET3_MAX_ETH_HDR_SIZE 22 475#define VMXNET3_MAX_SKB_BUF_SIZE (3*1024) 476 477#define VMXNET3_GET_RING_IDX(adapter, rqID) \ 478 ((rqID >= adapter->num_rx_queues && \ 479 rqID < 2 * adapter->num_rx_queues) ? 1 : 0) \ 480 481#define VMXNET3_RX_DATA_RING(adapter, rqID) \ 482 (rqID >= 2 * adapter->num_rx_queues && \ 483 rqID < 3 * adapter->num_rx_queues) \ 484 485#define VMXNET3_COAL_STATIC_DEFAULT_DEPTH 64 486 487#define VMXNET3_COAL_RBC_RATE(usecs) (1000000 / usecs) 488#define VMXNET3_COAL_RBC_USECS(rbc_rate) (1000000 / rbc_rate) 489#define VMXNET3_RSS_FIELDS_DEFAULT (VMXNET3_RSS_FIELDS_TCPIP4 | \ 490 VMXNET3_RSS_FIELDS_TCPIP6) 491 492int 493vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter); 494 495int 496vmxnet3_activate_dev(struct vmxnet3_adapter *adapter); 497 498void 499vmxnet3_force_close(struct vmxnet3_adapter *adapter); 500 501void 502vmxnet3_reset_dev(struct vmxnet3_adapter *adapter); 503 504void 505vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter); 506 507void 508vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter); 509 510int 511vmxnet3_rq_create_all(struct vmxnet3_adapter *adapter); 512 513void 514vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter); 515 516netdev_features_t 517vmxnet3_fix_features(struct net_device *netdev, netdev_features_t features); 518 519netdev_features_t 520vmxnet3_features_check(struct sk_buff *skb, 521 struct net_device *netdev, netdev_features_t features); 522 523int 524vmxnet3_set_features(struct net_device *netdev, netdev_features_t features); 525 526int 527vmxnet3_create_queues(struct vmxnet3_adapter *adapter, 528 u32 tx_ring_size, u32 rx_ring_size, u32 rx_ring2_size, 529 u16 txdata_desc_size, u16 rxdata_desc_size); 530 531void vmxnet3_set_ethtool_ops(struct net_device *netdev); 532 533void vmxnet3_get_stats64(struct net_device *dev, 534 struct rtnl_link_stats64 *stats); 535bool vmxnet3_check_ptcapability(u32 cap_supported, u32 cap); 536 537extern char vmxnet3_driver_name[]; 538#endif 539