1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * linux/drivers/acorn/net/ether3.c 4 * 5 * Copyright (C) 1995-2000 Russell King 6 * 7 * SEEQ nq8005 ethernet driver for Acorn/ANT Ether3 card 8 * for Acorn machines 9 * 10 * By Russell King, with some suggestions from borris@ant.co.uk 11 * 12 * Changelog: 13 * 1.04 RMK 29/02/1996 Won't pass packets that are from our ethernet 14 * address up to the higher levels - they're 15 * silently ignored. I/F can now be put into 16 * multicast mode. Receiver routine optimised. 17 * 1.05 RMK 30/02/1996 Now claims interrupt at open when part of 18 * the kernel rather than when a module. 19 * 1.06 RMK 02/03/1996 Various code cleanups 20 * 1.07 RMK 13/10/1996 Optimised interrupt routine and transmit 21 * routines. 22 * 1.08 RMK 14/10/1996 Fixed problem with too many packets, 23 * prevented the kernel message about dropped 24 * packets appearing too many times a second. 25 * Now does not disable all IRQs, only the IRQ 26 * used by this card. 27 * 1.09 RMK 10/11/1996 Only enables TX irq when buffer space is low, 28 * but we still service the TX queue if we get a 29 * RX interrupt. 30 * 1.10 RMK 15/07/1997 Fixed autoprobing of NQ8004. 31 * 1.11 RMK 16/11/1997 Fixed autoprobing of NQ8005A. 32 * 1.12 RMK 31/12/1997 Removed reference to dev_tint for Linux 2.1. 33 * RMK 27/06/1998 Changed asm/delay.h to linux/delay.h. 34 * 1.13 RMK 29/06/1998 Fixed problem with transmission of packets. 35 * Chip seems to have a bug in, whereby if the 36 * packet starts two bytes from the end of the 37 * buffer, it corrupts the receiver chain, and 38 * never updates the transmit status correctly. 39 * 1.14 RMK 07/01/1998 Added initial code for ETHERB addressing. 40 * 1.15 RMK 30/04/1999 More fixes to the transmit routine for buggy 41 * hardware. 42 * 1.16 RMK 10/02/2000 Updated for 2.3.43 43 * 1.17 RMK 13/05/2000 Updated for 2.3.99-pre8 44 */ 45 46#include <linux/module.h> 47#include <linux/kernel.h> 48#include <linux/types.h> 49#include <linux/fcntl.h> 50#include <linux/interrupt.h> 51#include <linux/ioport.h> 52#include <linux/in.h> 53#include <linux/slab.h> 54#include <linux/string.h> 55#include <linux/errno.h> 56#include <linux/netdevice.h> 57#include <linux/etherdevice.h> 58#include <linux/skbuff.h> 59#include <linux/device.h> 60#include <linux/init.h> 61#include <linux/delay.h> 62#include <linux/bitops.h> 63 64#include <asm/ecard.h> 65#include <asm/io.h> 66 67static char version[] = "ether3 ethernet driver (c) 1995-2000 R.M.King v1.17\n"; 68 69#include "ether3.h" 70 71static unsigned int net_debug = NET_DEBUG; 72 73static void ether3_setmulticastlist(struct net_device *dev); 74static int ether3_rx(struct net_device *dev, unsigned int maxcnt); 75static void ether3_tx(struct net_device *dev); 76static int ether3_open (struct net_device *dev); 77static netdev_tx_t ether3_sendpacket(struct sk_buff *skb, 78 struct net_device *dev); 79static irqreturn_t ether3_interrupt (int irq, void *dev_id); 80static int ether3_close (struct net_device *dev); 81static void ether3_setmulticastlist (struct net_device *dev); 82static void ether3_timeout(struct net_device *dev, unsigned int txqueue); 83 84#define BUS_16 2 85#define BUS_8 1 86#define BUS_UNKNOWN 0 87 88/* --------------------------------------------------------------------------- */ 89 90typedef enum { 91 buffer_write, 92 buffer_read 93} buffer_rw_t; 94 95/* 96 * ether3 read/write. Slow things down a bit... 97 * The SEEQ8005 doesn't like us writing to its registers 98 * too quickly. 99 */ 100static inline void ether3_outb(int v, void __iomem *r) 101{ 102 writeb(v, r); 103 udelay(1); 104} 105 106static inline void ether3_outw(int v, void __iomem *r) 107{ 108 writew(v, r); 109 udelay(1); 110} 111#define ether3_inb(r) ({ unsigned int __v = readb((r)); udelay(1); __v; }) 112#define ether3_inw(r) ({ unsigned int __v = readw((r)); udelay(1); __v; }) 113 114static int 115ether3_setbuffer(struct net_device *dev, buffer_rw_t read, int start) 116{ 117 int timeout = 1000; 118 119 ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1); 120 ether3_outw(priv(dev)->regs.command | CMD_FIFOWRITE, REG_COMMAND); 121 122 while ((ether3_inw(REG_STATUS) & STAT_FIFOEMPTY) == 0) { 123 if (!timeout--) { 124 printk("%s: setbuffer broken\n", dev->name); 125 priv(dev)->broken = 1; 126 return 1; 127 } 128 udelay(1); 129 } 130 131 if (read == buffer_read) { 132 ether3_outw(start, REG_DMAADDR); 133 ether3_outw(priv(dev)->regs.command | CMD_FIFOREAD, REG_COMMAND); 134 } else { 135 ether3_outw(priv(dev)->regs.command | CMD_FIFOWRITE, REG_COMMAND); 136 ether3_outw(start, REG_DMAADDR); 137 } 138 return 0; 139} 140 141/* 142 * write data to the buffer memory 143 */ 144#define ether3_writebuffer(dev,data,length) \ 145 writesw(REG_BUFWIN, (data), (length) >> 1) 146 147#define ether3_writeword(dev,data) \ 148 writew((data), REG_BUFWIN) 149 150#define ether3_writelong(dev,data) { \ 151 void __iomem *reg_bufwin = REG_BUFWIN; \ 152 writew((data), reg_bufwin); \ 153 writew((data) >> 16, reg_bufwin); \ 154} 155 156/* 157 * read data from the buffer memory 158 */ 159#define ether3_readbuffer(dev,data,length) \ 160 readsw(REG_BUFWIN, (data), (length) >> 1) 161 162#define ether3_readword(dev) \ 163 readw(REG_BUFWIN) 164 165#define ether3_readlong(dev) \ 166 readw(REG_BUFWIN) | (readw(REG_BUFWIN) << 16) 167 168/* 169 * Switch LED off... 170 */ 171static void ether3_ledoff(struct timer_list *t) 172{ 173 struct dev_priv *private = from_timer(private, t, timer); 174 struct net_device *dev = private->dev; 175 176 ether3_outw(priv(dev)->regs.config2 |= CFG2_CTRLO, REG_CONFIG2); 177} 178 179/* 180 * switch LED on... 181 */ 182static inline void ether3_ledon(struct net_device *dev) 183{ 184 del_timer(&priv(dev)->timer); 185 priv(dev)->timer.expires = jiffies + HZ / 50; /* leave on for 1/50th second */ 186 add_timer(&priv(dev)->timer); 187 if (priv(dev)->regs.config2 & CFG2_CTRLO) 188 ether3_outw(priv(dev)->regs.config2 &= ~CFG2_CTRLO, REG_CONFIG2); 189} 190 191/* 192 * Read the ethernet address string from the on board rom. 193 * This is an ascii string!!! 194 */ 195static int 196ether3_addr(char *addr, struct expansion_card *ec) 197{ 198 struct in_chunk_dir cd; 199 char *s; 200 201 if (ecard_readchunk(&cd, ec, 0xf5, 0) && (s = strchr(cd.d.string, '('))) { 202 int i; 203 for (i = 0; i<6; i++) { 204 addr[i] = simple_strtoul(s + 1, &s, 0x10); 205 if (*s != (i==5?')' : ':' )) 206 break; 207 } 208 if (i == 6) 209 return 0; 210 } 211 /* I wonder if we should even let the user continue in this case 212 * - no, it would be better to disable the device 213 */ 214 printk(KERN_ERR "ether3: Couldn't read a valid MAC address from card.\n"); 215 return -ENODEV; 216} 217 218/* --------------------------------------------------------------------------- */ 219 220static int 221ether3_ramtest(struct net_device *dev, unsigned char byte) 222{ 223 unsigned char *buffer = kmalloc(RX_END, GFP_KERNEL); 224 int i,ret = 0; 225 int max_errors = 4; 226 int bad = -1; 227 228 if (!buffer) 229 return 1; 230 231 memset(buffer, byte, RX_END); 232 ether3_setbuffer(dev, buffer_write, 0); 233 ether3_writebuffer(dev, buffer, TX_END); 234 ether3_setbuffer(dev, buffer_write, RX_START); 235 ether3_writebuffer(dev, buffer + RX_START, RX_LEN); 236 memset(buffer, byte ^ 0xff, RX_END); 237 ether3_setbuffer(dev, buffer_read, 0); 238 ether3_readbuffer(dev, buffer, TX_END); 239 ether3_setbuffer(dev, buffer_read, RX_START); 240 ether3_readbuffer(dev, buffer + RX_START, RX_LEN); 241 242 for (i = 0; i < RX_END; i++) { 243 if (buffer[i] != byte) { 244 if (max_errors > 0 && bad != buffer[i]) { 245 printk("%s: RAM failed with (%02X instead of %02X) at 0x%04X", 246 dev->name, buffer[i], byte, i); 247 ret = 2; 248 max_errors--; 249 bad = i; 250 } 251 } else { 252 if (bad != -1) { 253 if (bad != i - 1) 254 printk(" - 0x%04X\n", i - 1); 255 printk("\n"); 256 bad = -1; 257 } 258 } 259 } 260 if (bad != -1) 261 printk(" - 0xffff\n"); 262 kfree(buffer); 263 264 return ret; 265} 266 267/* ------------------------------------------------------------------------------- */ 268 269static int ether3_init_2(struct net_device *dev) 270{ 271 int i; 272 273 priv(dev)->regs.config1 = CFG1_RECVCOMPSTAT0|CFG1_DMABURST8; 274 priv(dev)->regs.config2 = CFG2_CTRLO|CFG2_RECVCRC|CFG2_ERRENCRC; 275 priv(dev)->regs.command = 0; 276 277 /* 278 * Set up our hardware address 279 */ 280 ether3_outw(priv(dev)->regs.config1 | CFG1_BUFSELSTAT0, REG_CONFIG1); 281 for (i = 0; i < 6; i++) 282 ether3_outb(dev->dev_addr[i], REG_BUFWIN); 283 284 if (dev->flags & IFF_PROMISC) 285 priv(dev)->regs.config1 |= CFG1_RECVPROMISC; 286 else if (dev->flags & IFF_MULTICAST) 287 priv(dev)->regs.config1 |= CFG1_RECVSPECBRMULTI; 288 else 289 priv(dev)->regs.config1 |= CFG1_RECVSPECBROAD; 290 291 /* 292 * There is a problem with the NQ8005 in that it occasionally loses the 293 * last two bytes. To get round this problem, we receive the CRC as 294 * well. That way, if we do lose the last two, then it doesn't matter. 295 */ 296 ether3_outw(priv(dev)->regs.config1 | CFG1_TRANSEND, REG_CONFIG1); 297 ether3_outw((TX_END>>8) - 1, REG_BUFWIN); 298 ether3_outw(priv(dev)->rx_head, REG_RECVPTR); 299 ether3_outw(0, REG_TRANSMITPTR); 300 ether3_outw(priv(dev)->rx_head >> 8, REG_RECVEND); 301 ether3_outw(priv(dev)->regs.config2, REG_CONFIG2); 302 ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1); 303 ether3_outw(priv(dev)->regs.command, REG_COMMAND); 304 305 i = ether3_ramtest(dev, 0x5A); 306 if(i) 307 return i; 308 i = ether3_ramtest(dev, 0x1E); 309 if(i) 310 return i; 311 312 ether3_setbuffer(dev, buffer_write, 0); 313 ether3_writelong(dev, 0); 314 return 0; 315} 316 317static void 318ether3_init_for_open(struct net_device *dev) 319{ 320 int i; 321 322 /* Reset the chip */ 323 ether3_outw(CFG2_RESET, REG_CONFIG2); 324 udelay(4); 325 326 priv(dev)->regs.command = 0; 327 ether3_outw(CMD_RXOFF|CMD_TXOFF, REG_COMMAND); 328 while (ether3_inw(REG_STATUS) & (STAT_RXON|STAT_TXON)) 329 barrier(); 330 331 ether3_outw(priv(dev)->regs.config1 | CFG1_BUFSELSTAT0, REG_CONFIG1); 332 for (i = 0; i < 6; i++) 333 ether3_outb(dev->dev_addr[i], REG_BUFWIN); 334 335 priv(dev)->tx_head = 0; 336 priv(dev)->tx_tail = 0; 337 priv(dev)->regs.config2 |= CFG2_CTRLO; 338 priv(dev)->rx_head = RX_START; 339 340 ether3_outw(priv(dev)->regs.config1 | CFG1_TRANSEND, REG_CONFIG1); 341 ether3_outw((TX_END>>8) - 1, REG_BUFWIN); 342 ether3_outw(priv(dev)->rx_head, REG_RECVPTR); 343 ether3_outw(priv(dev)->rx_head >> 8, REG_RECVEND); 344 ether3_outw(0, REG_TRANSMITPTR); 345 ether3_outw(priv(dev)->regs.config2, REG_CONFIG2); 346 ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1); 347 348 ether3_setbuffer(dev, buffer_write, 0); 349 ether3_writelong(dev, 0); 350 351 priv(dev)->regs.command = CMD_ENINTRX | CMD_ENINTTX; 352 ether3_outw(priv(dev)->regs.command | CMD_RXON, REG_COMMAND); 353} 354 355static inline int 356ether3_probe_bus_8(struct net_device *dev, int val) 357{ 358 int write_low, write_high, read_low, read_high; 359 360 write_low = val & 255; 361 write_high = val >> 8; 362 363 printk(KERN_DEBUG "ether3_probe: write8 [%02X:%02X]", write_high, write_low); 364 365 ether3_outb(write_low, REG_RECVPTR); 366 ether3_outb(write_high, REG_RECVPTR + 4); 367 368 read_low = ether3_inb(REG_RECVPTR); 369 read_high = ether3_inb(REG_RECVPTR + 4); 370 371 printk(", read8 [%02X:%02X]\n", read_high, read_low); 372 373 return read_low == write_low && read_high == write_high; 374} 375 376static inline int 377ether3_probe_bus_16(struct net_device *dev, int val) 378{ 379 int read_val; 380 381 ether3_outw(val, REG_RECVPTR); 382 read_val = ether3_inw(REG_RECVPTR); 383 384 printk(KERN_DEBUG "ether3_probe: write16 [%04X], read16 [%04X]\n", val, read_val); 385 386 return read_val == val; 387} 388 389/* 390 * Open/initialize the board. This is called (in the current kernel) 391 * sometime after booting when the 'ifconfig' program is run. 392 * 393 * This routine should set everything up anew at each open, even 394 * registers that "should" only need to be set once at boot, so that 395 * there is non-reboot way to recover if something goes wrong. 396 */ 397static int 398ether3_open(struct net_device *dev) 399{ 400 if (request_irq(dev->irq, ether3_interrupt, 0, "ether3", dev)) 401 return -EAGAIN; 402 403 ether3_init_for_open(dev); 404 405 netif_start_queue(dev); 406 407 return 0; 408} 409 410/* 411 * The inverse routine to ether3_open(). 412 */ 413static int 414ether3_close(struct net_device *dev) 415{ 416 netif_stop_queue(dev); 417 418 disable_irq(dev->irq); 419 420 ether3_outw(CMD_RXOFF|CMD_TXOFF, REG_COMMAND); 421 priv(dev)->regs.command = 0; 422 while (ether3_inw(REG_STATUS) & (STAT_RXON|STAT_TXON)) 423 barrier(); 424 ether3_outb(0x80, REG_CONFIG2 + 4); 425 ether3_outw(0, REG_COMMAND); 426 427 free_irq(dev->irq, dev); 428 429 return 0; 430} 431 432/* 433 * Set or clear promiscuous/multicast mode filter for this adaptor. 434 * 435 * We don't attempt any packet filtering. The card may have a SEEQ 8004 436 * in which does not have the other ethernet address registers present... 437 */ 438static void ether3_setmulticastlist(struct net_device *dev) 439{ 440 priv(dev)->regs.config1 &= ~CFG1_RECVPROMISC; 441 442 if (dev->flags & IFF_PROMISC) { 443 /* promiscuous mode */ 444 priv(dev)->regs.config1 |= CFG1_RECVPROMISC; 445 } else if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) { 446 priv(dev)->regs.config1 |= CFG1_RECVSPECBRMULTI; 447 } else 448 priv(dev)->regs.config1 |= CFG1_RECVSPECBROAD; 449 450 ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1); 451} 452 453static void ether3_timeout(struct net_device *dev, unsigned int txqueue) 454{ 455 unsigned long flags; 456 457 del_timer(&priv(dev)->timer); 458 459 local_irq_save(flags); 460 printk(KERN_ERR "%s: transmit timed out, network cable problem?\n", dev->name); 461 printk(KERN_ERR "%s: state: { status=%04X cfg1=%04X cfg2=%04X }\n", dev->name, 462 ether3_inw(REG_STATUS), ether3_inw(REG_CONFIG1), ether3_inw(REG_CONFIG2)); 463 printk(KERN_ERR "%s: { rpr=%04X rea=%04X tpr=%04X }\n", dev->name, 464 ether3_inw(REG_RECVPTR), ether3_inw(REG_RECVEND), ether3_inw(REG_TRANSMITPTR)); 465 printk(KERN_ERR "%s: tx head=%X tx tail=%X\n", dev->name, 466 priv(dev)->tx_head, priv(dev)->tx_tail); 467 ether3_setbuffer(dev, buffer_read, priv(dev)->tx_tail); 468 printk(KERN_ERR "%s: packet status = %08X\n", dev->name, ether3_readlong(dev)); 469 local_irq_restore(flags); 470 471 priv(dev)->regs.config2 |= CFG2_CTRLO; 472 dev->stats.tx_errors += 1; 473 ether3_outw(priv(dev)->regs.config2, REG_CONFIG2); 474 priv(dev)->tx_head = priv(dev)->tx_tail = 0; 475 476 netif_wake_queue(dev); 477} 478 479/* 480 * Transmit a packet 481 */ 482static netdev_tx_t 483ether3_sendpacket(struct sk_buff *skb, struct net_device *dev) 484{ 485 unsigned long flags; 486 unsigned int length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN; 487 unsigned int ptr, next_ptr; 488 489 if (priv(dev)->broken) { 490 dev_kfree_skb(skb); 491 dev->stats.tx_dropped++; 492 netif_start_queue(dev); 493 return NETDEV_TX_OK; 494 } 495 496 length = (length + 1) & ~1; 497 if (length != skb->len) { 498 if (skb_padto(skb, length)) 499 goto out; 500 } 501 502 next_ptr = (priv(dev)->tx_head + 1) & 15; 503 504 local_irq_save(flags); 505 506 if (priv(dev)->tx_tail == next_ptr) { 507 local_irq_restore(flags); 508 return NETDEV_TX_BUSY; /* unable to queue */ 509 } 510 511 ptr = 0x600 * priv(dev)->tx_head; 512 priv(dev)->tx_head = next_ptr; 513 next_ptr *= 0x600; 514 515#define TXHDR_FLAGS (TXHDR_TRANSMIT|TXHDR_CHAINCONTINUE|TXHDR_DATAFOLLOWS|TXHDR_ENSUCCESS) 516 517 ether3_setbuffer(dev, buffer_write, next_ptr); 518 ether3_writelong(dev, 0); 519 ether3_setbuffer(dev, buffer_write, ptr); 520 ether3_writelong(dev, 0); 521 ether3_writebuffer(dev, skb->data, length); 522 ether3_writeword(dev, htons(next_ptr)); 523 ether3_writeword(dev, TXHDR_CHAINCONTINUE >> 16); 524 ether3_setbuffer(dev, buffer_write, ptr); 525 ether3_writeword(dev, htons((ptr + length + 4))); 526 ether3_writeword(dev, TXHDR_FLAGS >> 16); 527 ether3_ledon(dev); 528 529 if (!(ether3_inw(REG_STATUS) & STAT_TXON)) { 530 ether3_outw(ptr, REG_TRANSMITPTR); 531 ether3_outw(priv(dev)->regs.command | CMD_TXON, REG_COMMAND); 532 } 533 534 next_ptr = (priv(dev)->tx_head + 1) & 15; 535 local_irq_restore(flags); 536 537 dev_kfree_skb(skb); 538 539 if (priv(dev)->tx_tail == next_ptr) 540 netif_stop_queue(dev); 541 542 out: 543 return NETDEV_TX_OK; 544} 545 546static irqreturn_t 547ether3_interrupt(int irq, void *dev_id) 548{ 549 struct net_device *dev = (struct net_device *)dev_id; 550 unsigned int status, handled = IRQ_NONE; 551 552#if NET_DEBUG > 1 553 if(net_debug & DEBUG_INT) 554 printk("eth3irq: %d ", irq); 555#endif 556 557 status = ether3_inw(REG_STATUS); 558 559 if (status & STAT_INTRX) { 560 ether3_outw(CMD_ACKINTRX | priv(dev)->regs.command, REG_COMMAND); 561 ether3_rx(dev, 12); 562 handled = IRQ_HANDLED; 563 } 564 565 if (status & STAT_INTTX) { 566 ether3_outw(CMD_ACKINTTX | priv(dev)->regs.command, REG_COMMAND); 567 ether3_tx(dev); 568 handled = IRQ_HANDLED; 569 } 570 571#if NET_DEBUG > 1 572 if(net_debug & DEBUG_INT) 573 printk("done\n"); 574#endif 575 return handled; 576} 577 578/* 579 * If we have a good packet(s), get it/them out of the buffers. 580 */ 581static int ether3_rx(struct net_device *dev, unsigned int maxcnt) 582{ 583 unsigned int next_ptr = priv(dev)->rx_head, received = 0; 584 585 ether3_ledon(dev); 586 587 do { 588 unsigned int this_ptr, status; 589 unsigned char addrs[16]; 590 591 /* 592 * read the first 16 bytes from the buffer. 593 * This contains the status bytes etc and ethernet addresses, 594 * and we also check the source ethernet address to see if 595 * it originated from us. 596 */ 597 { 598 unsigned int temp_ptr; 599 ether3_setbuffer(dev, buffer_read, next_ptr); 600 temp_ptr = ether3_readword(dev); 601 status = ether3_readword(dev); 602 if ((status & (RXSTAT_DONE | RXHDR_CHAINCONTINUE | RXHDR_RECEIVE)) != 603 (RXSTAT_DONE | RXHDR_CHAINCONTINUE) || !temp_ptr) 604 break; 605 606 this_ptr = next_ptr + 4; 607 next_ptr = ntohs(temp_ptr); 608 } 609 ether3_setbuffer(dev, buffer_read, this_ptr); 610 ether3_readbuffer(dev, addrs+2, 12); 611 612if (next_ptr < RX_START || next_ptr >= RX_END) { 613 printk("%s: bad next pointer @%04X: ", dev->name, priv(dev)->rx_head); 614 printk("%02X %02X %02X %02X ", next_ptr >> 8, next_ptr & 255, status & 255, status >> 8); 615 printk("%pM %pM\n", addrs + 2, addrs + 8); 616 next_ptr = priv(dev)->rx_head; 617 break; 618} 619 /* 620 * ignore our own packets... 621 */ 622 if (!(*(unsigned long *)&dev->dev_addr[0] ^ *(unsigned long *)&addrs[2+6]) && 623 !(*(unsigned short *)&dev->dev_addr[4] ^ *(unsigned short *)&addrs[2+10])) { 624 maxcnt ++; /* compensate for loopedback packet */ 625 ether3_outw(next_ptr >> 8, REG_RECVEND); 626 } else 627 if (!(status & (RXSTAT_OVERSIZE|RXSTAT_CRCERROR|RXSTAT_DRIBBLEERROR|RXSTAT_SHORTPACKET))) { 628 unsigned int length = next_ptr - this_ptr; 629 struct sk_buff *skb; 630 631 if (next_ptr <= this_ptr) 632 length += RX_END - RX_START; 633 634 skb = netdev_alloc_skb(dev, length + 2); 635 if (skb) { 636 unsigned char *buf; 637 638 skb_reserve(skb, 2); 639 buf = skb_put(skb, length); 640 ether3_readbuffer(dev, buf + 12, length - 12); 641 ether3_outw(next_ptr >> 8, REG_RECVEND); 642 *(unsigned short *)(buf + 0) = *(unsigned short *)(addrs + 2); 643 *(unsigned long *)(buf + 2) = *(unsigned long *)(addrs + 4); 644 *(unsigned long *)(buf + 6) = *(unsigned long *)(addrs + 8); 645 *(unsigned short *)(buf + 10) = *(unsigned short *)(addrs + 12); 646 skb->protocol = eth_type_trans(skb, dev); 647 netif_rx(skb); 648 received ++; 649 } else { 650 ether3_outw(next_ptr >> 8, REG_RECVEND); 651 dev->stats.rx_dropped++; 652 goto done; 653 } 654 } else { 655 struct net_device_stats *stats = &dev->stats; 656 ether3_outw(next_ptr >> 8, REG_RECVEND); 657 if (status & RXSTAT_OVERSIZE) stats->rx_over_errors ++; 658 if (status & RXSTAT_CRCERROR) stats->rx_crc_errors ++; 659 if (status & RXSTAT_DRIBBLEERROR) stats->rx_fifo_errors ++; 660 if (status & RXSTAT_SHORTPACKET) stats->rx_length_errors ++; 661 stats->rx_errors++; 662 } 663 } 664 while (-- maxcnt); 665 666done: 667 dev->stats.rx_packets += received; 668 priv(dev)->rx_head = next_ptr; 669 /* 670 * If rx went off line, then that means that the buffer may be full. We 671 * have dropped at least one packet. 672 */ 673 if (!(ether3_inw(REG_STATUS) & STAT_RXON)) { 674 dev->stats.rx_dropped++; 675 ether3_outw(next_ptr, REG_RECVPTR); 676 ether3_outw(priv(dev)->regs.command | CMD_RXON, REG_COMMAND); 677 } 678 679 return maxcnt; 680} 681 682/* 683 * Update stats for the transmitted packet(s) 684 */ 685static void ether3_tx(struct net_device *dev) 686{ 687 unsigned int tx_tail = priv(dev)->tx_tail; 688 int max_work = 14; 689 690 do { 691 unsigned long status; 692 693 /* 694 * Read the packet header 695 */ 696 ether3_setbuffer(dev, buffer_read, tx_tail * 0x600); 697 status = ether3_readlong(dev); 698 699 /* 700 * Check to see if this packet has been transmitted 701 */ 702 if ((status & (TXSTAT_DONE | TXHDR_TRANSMIT)) != 703 (TXSTAT_DONE | TXHDR_TRANSMIT)) 704 break; 705 706 /* 707 * Update errors 708 */ 709 if (!(status & (TXSTAT_BABBLED | TXSTAT_16COLLISIONS))) 710 dev->stats.tx_packets++; 711 else { 712 dev->stats.tx_errors++; 713 if (status & TXSTAT_16COLLISIONS) 714 dev->stats.collisions += 16; 715 if (status & TXSTAT_BABBLED) 716 dev->stats.tx_fifo_errors++; 717 } 718 719 tx_tail = (tx_tail + 1) & 15; 720 } while (--max_work); 721 722 if (priv(dev)->tx_tail != tx_tail) { 723 priv(dev)->tx_tail = tx_tail; 724 netif_wake_queue(dev); 725 } 726} 727 728static void ether3_banner(void) 729{ 730 static unsigned version_printed = 0; 731 732 if (net_debug && version_printed++ == 0) 733 printk(KERN_INFO "%s", version); 734} 735 736static const struct net_device_ops ether3_netdev_ops = { 737 .ndo_open = ether3_open, 738 .ndo_stop = ether3_close, 739 .ndo_start_xmit = ether3_sendpacket, 740 .ndo_set_rx_mode = ether3_setmulticastlist, 741 .ndo_tx_timeout = ether3_timeout, 742 .ndo_validate_addr = eth_validate_addr, 743 .ndo_set_mac_address = eth_mac_addr, 744}; 745 746static int 747ether3_probe(struct expansion_card *ec, const struct ecard_id *id) 748{ 749 const struct ether3_data *data = id->data; 750 struct net_device *dev; 751 int bus_type, ret; 752 u8 addr[ETH_ALEN]; 753 754 ether3_banner(); 755 756 ret = ecard_request_resources(ec); 757 if (ret) 758 goto out; 759 760 dev = alloc_etherdev(sizeof(struct dev_priv)); 761 if (!dev) { 762 ret = -ENOMEM; 763 goto release; 764 } 765 766 SET_NETDEV_DEV(dev, &ec->dev); 767 768 priv(dev)->base = ecardm_iomap(ec, ECARD_RES_MEMC, 0, 0); 769 if (!priv(dev)->base) { 770 ret = -ENOMEM; 771 goto free; 772 } 773 774 ec->irqaddr = priv(dev)->base + data->base_offset; 775 ec->irqmask = 0xf0; 776 777 priv(dev)->seeq = priv(dev)->base + data->base_offset; 778 dev->irq = ec->irq; 779 780 ether3_addr(addr, ec); 781 eth_hw_addr_set(dev, addr); 782 783 priv(dev)->dev = dev; 784 timer_setup(&priv(dev)->timer, ether3_ledoff, 0); 785 786 /* Reset card... 787 */ 788 ether3_outb(0x80, REG_CONFIG2 + 4); 789 bus_type = BUS_UNKNOWN; 790 udelay(4); 791 792 /* Test using Receive Pointer (16-bit register) to find out 793 * how the ether3 is connected to the bus... 794 */ 795 if (ether3_probe_bus_8(dev, 0x100) && 796 ether3_probe_bus_8(dev, 0x201)) 797 bus_type = BUS_8; 798 799 if (bus_type == BUS_UNKNOWN && 800 ether3_probe_bus_16(dev, 0x101) && 801 ether3_probe_bus_16(dev, 0x201)) 802 bus_type = BUS_16; 803 804 switch (bus_type) { 805 case BUS_UNKNOWN: 806 printk(KERN_ERR "%s: unable to identify bus width\n", dev->name); 807 ret = -ENODEV; 808 goto free; 809 810 case BUS_8: 811 printk(KERN_ERR "%s: %s found, but is an unsupported " 812 "8-bit card\n", dev->name, data->name); 813 ret = -ENODEV; 814 goto free; 815 816 default: 817 break; 818 } 819 820 if (ether3_init_2(dev)) { 821 ret = -ENODEV; 822 goto free; 823 } 824 825 dev->netdev_ops = ðer3_netdev_ops; 826 dev->watchdog_timeo = 5 * HZ / 100; 827 828 ret = register_netdev(dev); 829 if (ret) 830 goto free; 831 832 printk("%s: %s in slot %d, %pM\n", 833 dev->name, data->name, ec->slot_no, dev->dev_addr); 834 835 ecard_set_drvdata(ec, dev); 836 return 0; 837 838 free: 839 free_netdev(dev); 840 release: 841 ecard_release_resources(ec); 842 out: 843 return ret; 844} 845 846static void ether3_remove(struct expansion_card *ec) 847{ 848 struct net_device *dev = ecard_get_drvdata(ec); 849 850 ecard_set_drvdata(ec, NULL); 851 852 unregister_netdev(dev); 853 free_netdev(dev); 854 ecard_release_resources(ec); 855} 856 857static struct ether3_data ether3 = { 858 .name = "ether3", 859 .base_offset = 0, 860}; 861 862static struct ether3_data etherb = { 863 .name = "etherb", 864 .base_offset = 0x800, 865}; 866 867static const struct ecard_id ether3_ids[] = { 868 { MANU_ANT2, PROD_ANT_ETHER3, ðer3 }, 869 { MANU_ANT, PROD_ANT_ETHER3, ðer3 }, 870 { MANU_ANT, PROD_ANT_ETHERB, ðerb }, 871 { 0xffff, 0xffff } 872}; 873 874static struct ecard_driver ether3_driver = { 875 .probe = ether3_probe, 876 .remove = ether3_remove, 877 .id_table = ether3_ids, 878 .drv = { 879 .name = "ether3", 880 }, 881}; 882 883static int __init ether3_init(void) 884{ 885 return ecard_register_driver(ðer3_driver); 886} 887 888static void __exit ether3_exit(void) 889{ 890 ecard_remove_driver(ðer3_driver); 891} 892 893module_init(ether3_init); 894module_exit(ether3_exit); 895 896MODULE_LICENSE("GPL"); 897