1/* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */
2
3/* MDIO support for Mellanox Gigabit Ethernet driver
4 *
5 * Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES, ALL RIGHTS RESERVED.
6 *
7 * This software product is a proprietary product of NVIDIA CORPORATION &
8 * AFFILIATES (the "Company") and all right, title, and interest in and to the
9 * software product, including all associated intellectual property rights, are
10 * and shall remain exclusively with the Company.
11 *
12 * This software product is governed by the End User License Agreement
13 * provided with the software product.
14 */
15
16#ifndef __MLXBF_GIGE_MDIO_BF3_H__
17#define __MLXBF_GIGE_MDIO_BF3_H__
18
19#include <linux/bitfield.h>
20
21#define MLXBF3_GIGE_MDIO_GW_OFFSET	0x80
22#define MLXBF3_GIGE_MDIO_DATA_READ	0x8c
23#define MLXBF3_GIGE_MDIO_CFG_REG0	0x100
24#define MLXBF3_GIGE_MDIO_CFG_REG1	0x104
25#define MLXBF3_GIGE_MDIO_CFG_REG2	0x108
26
27/* MDIO GW register bits */
28#define MLXBF3_GIGE_MDIO_GW_ST1_MASK	GENMASK(1, 1)
29#define MLXBF3_GIGE_MDIO_GW_OPCODE_MASK	GENMASK(3, 2)
30#define MLXBF3_GIGE_MDIO_GW_PARTAD_MASK	GENMASK(8, 4)
31#define MLXBF3_GIGE_MDIO_GW_DEVAD_MASK	GENMASK(13, 9)
32/* For BlueField-3, this field is only used for mdio write */
33#define MLXBF3_GIGE_MDIO_GW_DATA_MASK	GENMASK(29, 14)
34#define MLXBF3_GIGE_MDIO_GW_BUSY_MASK	GENMASK(30, 30)
35
36#define MLXBF3_GIGE_MDIO_GW_DATA_READ_MASK GENMASK(15, 0)
37
38#define MLXBF3_GIGE_MDIO_GW_ST1_SHIFT    1
39#define MLXBF3_GIGE_MDIO_GW_OPCODE_SHIFT 2
40#define MLXBF3_GIGE_MDIO_GW_PARTAD_SHIFT 4
41#define MLXBF3_GIGE_MDIO_GW_DEVAD_SHIFT	 9
42#define MLXBF3_GIGE_MDIO_GW_DATA_SHIFT   14
43#define MLXBF3_GIGE_MDIO_GW_BUSY_SHIFT   30
44
45#define MLXBF3_GIGE_MDIO_GW_DATA_READ_SHIFT 0
46
47/* MDIO config register bits */
48#define MLXBF3_GIGE_MDIO_CFG_MDIO_MODE_MASK		GENMASK(1, 0)
49#define MLXBF3_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK	GENMASK(2, 2)
50#define MLXBF3_GIGE_MDIO_CFG_MDC_PERIOD_MASK		GENMASK(7, 0)
51#define MLXBF3_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK		GENMASK(7, 0)
52#define MLXBF3_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK		GENMASK(15, 8)
53
54#endif /* __MLXBF_GIGE_MDIO_BF3_H__ */
55