1/*
2 * This file is part of the Chelsio T4 Ethernet driver for Linux.
3 *
4 * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses.  You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 *     Redistribution and use in source and binary forms, with or
13 *     without modification, are permitted provided that the following
14 *     conditions are met:
15 *
16 *      - Redistributions of source code must retain the above
17 *        copyright notice, this list of conditions and the following
18 *        disclaimer.
19 *
20 *      - Redistributions in binary form must reproduce the above
21 *        copyright notice, this list of conditions and the following
22 *        disclaimer in the documentation and/or other materials
23 *        provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 */
34
35#ifndef __T4_VALUES_H__
36#define __T4_VALUES_H__
37
38/* This file contains definitions for various T4 register value hardware
39 * constants.  The types of values encoded here are predominantly those for
40 * register fields which control "modal" behavior.  For the most part, we do
41 * not include definitions for register fields which are simple numeric
42 * metrics, etc.
43 */
44
45/* SGE register field values.
46 */
47
48/* CONTROL1 register */
49#define RXPKTCPLMODE_SPLIT_X		1
50
51#define INGPCIEBOUNDARY_SHIFT_X		5
52#define INGPCIEBOUNDARY_32B_X		0
53
54#define INGPADBOUNDARY_SHIFT_X		5
55
56#define T6_INGPADBOUNDARY_SHIFT_X	3
57#define T6_INGPADBOUNDARY_8B_X		0
58#define T6_INGPADBOUNDARY_32B_X		2
59
60#define INGPADBOUNDARY_32B_X		0
61
62/* CONTROL2 register */
63#define INGPACKBOUNDARY_SHIFT_X		5
64#define INGPACKBOUNDARY_16B_X		0
65#define INGPACKBOUNDARY_64B_X		1
66
67/* GTS register */
68#define SGE_TIMERREGS			6
69#define TIMERREG_COUNTER0_X		0
70
71#define FETCHBURSTMIN_64B_X		2
72#define FETCHBURSTMIN_128B_X		3
73
74/* T6 and later use a single-bit encoding for FetchBurstMin */
75#define FETCHBURSTMIN_64B_T6_X		0
76#define FETCHBURSTMIN_128B_T6_X		1
77
78#define FETCHBURSTMAX_256B_X		2
79#define FETCHBURSTMAX_512B_X		3
80
81#define HOSTFCMODE_INGRESS_QUEUE_X	1
82#define HOSTFCMODE_STATUS_PAGE_X	2
83
84#define CIDXFLUSHTHRESH_32_X		5
85#define CIDXFLUSHTHRESH_128_X		7
86
87#define UPDATEDELIVERY_INTERRUPT_X	1
88
89#define RSPD_TYPE_FLBUF_X		0
90#define RSPD_TYPE_CPL_X			1
91#define RSPD_TYPE_INTR_X		2
92
93/* Congestion Manager Definitions.
94 */
95#define CONMCTXT_CNGTPMODE_S		19
96#define CONMCTXT_CNGTPMODE_V(x)		((x) << CONMCTXT_CNGTPMODE_S)
97#define CONMCTXT_CNGCHMAP_S		0
98#define CONMCTXT_CNGCHMAP_V(x)		((x) << CONMCTXT_CNGCHMAP_S)
99#define CONMCTXT_CNGTPMODE_CHANNEL_X	2
100#define CONMCTXT_CNGTPMODE_QUEUE_X	1
101
102/* T5 and later support a new BAR2-based doorbell mechanism for Egress Queues.
103 * The User Doorbells are each 128 bytes in length with a Simple Doorbell at
104 * offsets 8x and a Write Combining single 64-byte Egress Queue Unit
105 * (IDXSIZE_UNIT_X) Gather Buffer interface at offset 64.  For Ingress Queues,
106 * we have a Going To Sleep register at offsets 8x+4.
107 *
108 * As noted above, we have many instances of the Simple Doorbell and Going To
109 * Sleep registers at offsets 8x and 8x+4, respectively.  We want to use a
110 * non-64-byte aligned offset for the Simple Doorbell in order to attempt to
111 * avoid buffering of the writes to the Simple Doorbell and we want to use a
112 * non-contiguous offset for the Going To Sleep writes in order to avoid
113 * possible combining between them.
114 */
115#define SGE_UDB_SIZE		128
116#define SGE_UDB_KDOORBELL	8
117#define SGE_UDB_GTS		20
118#define SGE_UDB_WCDOORBELL	64
119
120/* CIM register field values.
121 */
122#define X_MBOWNER_FW			1
123#define X_MBOWNER_PL			2
124
125/* PCI-E definitions */
126#define WINDOW_SHIFT_X		10
127#define PCIEOFST_SHIFT_X	10
128
129/* TP_VLAN_PRI_MAP controls which subset of fields will be present in the
130 * Compressed Filter Tuple for LE filters.  Each bit set in TP_VLAN_PRI_MAP
131 * selects for a particular field being present.  These fields, when present
132 * in the Compressed Filter Tuple, have the following widths in bits.
133 */
134#define FT_FCOE_W                       1
135#define FT_PORT_W                       3
136#define FT_VNIC_ID_W                    17
137#define FT_VLAN_W                       17
138#define FT_TOS_W                        8
139#define FT_PROTOCOL_W                   8
140#define FT_ETHERTYPE_W                  16
141#define FT_MACMATCH_W                   9
142#define FT_MPSHITTYPE_W                 3
143#define FT_FRAGMENTATION_W              1
144
145/* Some of the Compressed Filter Tuple fields have internal structure.  These
146 * bit shifts/masks describe those structures.  All shifts are relative to the
147 * base position of the fields within the Compressed Filter Tuple
148 */
149#define FT_VLAN_VLD_S                   16
150#define FT_VLAN_VLD_V(x)                ((x) << FT_VLAN_VLD_S)
151#define FT_VLAN_VLD_F                   FT_VLAN_VLD_V(1U)
152
153#define FT_VNID_ID_VF_S                 0
154#define FT_VNID_ID_VF_V(x)              ((x) << FT_VNID_ID_VF_S)
155
156#define FT_VNID_ID_PF_S                 7
157#define FT_VNID_ID_PF_V(x)              ((x) << FT_VNID_ID_PF_S)
158
159#define FT_VNID_ID_VLD_S                16
160#define FT_VNID_ID_VLD_V(x)             ((x) << FT_VNID_ID_VLD_S)
161
162#endif /* __T4_VALUES_H__ */
163