1/*
2 * This file is part of the Chelsio T4 Ethernet driver for Linux.
3 *
4 * Copyright (c) 2003-2015 Chelsio Communications, Inc. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses.  You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 *     Redistribution and use in source and binary forms, with or
13 *     without modification, are permitted provided that the following
14 *     conditions are met:
15 *
16 *      - Redistributions of source code must retain the above
17 *        copyright notice, this list of conditions and the following
18 *        disclaimer.
19 *
20 *      - Redistributions in binary form must reproduce the above
21 *        copyright notice, this list of conditions and the following
22 *        disclaimer in the documentation and/or other materials
23 *        provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 */
34#ifndef __T4_CHIP_TYPE_H__
35#define __T4_CHIP_TYPE_H__
36
37#define CHELSIO_PCI_ID_VER(__DeviceID)  ((__DeviceID) >> 12)
38
39#define CHELSIO_T4		0x4
40#define CHELSIO_T5		0x5
41#define CHELSIO_T6		0x6
42
43/* We code the Chelsio T4 Family "Chip Code" as a tuple:
44 *
45 *     (Chip Version, Chip Revision)
46 *
47 * where:
48 *
49 *     Chip Version: is T4, T5, etc.
50 *     Chip Revision: is the FAB "spin" of the Chip Version.
51 */
52#define CHELSIO_CHIP_CODE(version, revision) (((version) << 4) | (revision))
53#define CHELSIO_CHIP_VERSION(code) (((code) >> 4) & 0xf)
54#define CHELSIO_CHIP_RELEASE(code) ((code) & 0xf)
55
56enum chip_type {
57	T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1),
58	T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2),
59	T4_FIRST_REV	= T4_A1,
60	T4_LAST_REV	= T4_A2,
61
62	T5_A0 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0),
63	T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 1),
64	T5_FIRST_REV	= T5_A0,
65	T5_LAST_REV	= T5_A1,
66
67	T6_A0 = CHELSIO_CHIP_CODE(CHELSIO_T6, 0),
68	T6_FIRST_REV	= T6_A0,
69	T6_LAST_REV	= T6_A0,
70};
71
72static inline int is_t4(enum chip_type chip)
73{
74	return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T4);
75}
76
77static inline int is_t5(enum chip_type chip)
78{
79	return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T5);
80}
81
82static inline int is_t6(enum chip_type chip)
83{
84	return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T6);
85}
86
87#endif /* __T4_CHIP_TYPE_H__ */
88