1290001Sglebius/* SPDX-License-Identifier: GPL-2.0-only */ 2290001Sglebius/* Copyright (C) 2019 Chelsio Communications. All rights reserved. */ 3290001Sglebius 4290001Sglebius#ifndef __CXGB4_TC_MATCHALL_H__ 5290001Sglebius#define __CXGB4_TC_MATCHALL_H__ 6290001Sglebius 7290001Sglebius#include <net/pkt_cls.h> 8290001Sglebius 9290001Sglebiusenum cxgb4_matchall_state { 10290001Sglebius CXGB4_MATCHALL_STATE_DISABLED = 0, 11290001Sglebius CXGB4_MATCHALL_STATE_ENABLED, 12290001Sglebius}; 13290001Sglebius 14290001Sglebiusstruct cxgb4_matchall_egress_entry { 15290001Sglebius enum cxgb4_matchall_state state; /* Current MATCHALL offload state */ 16290001Sglebius u8 hwtc; /* Traffic class bound to port */ 17290001Sglebius u64 cookie; /* Used to identify the MATCHALL rule offloaded */ 18}; 19 20struct cxgb4_matchall_ingress_entry { 21 enum cxgb4_matchall_state state; /* Current MATCHALL offload state */ 22 u32 tid[CXGB4_FILTER_TYPE_MAX]; /* Index to hardware filter entries */ 23 /* Filter entries */ 24 struct ch_filter_specification fs[CXGB4_FILTER_TYPE_MAX]; 25 u16 viid_mirror; /* Identifier for allocated Mirror VI */ 26 u64 bytes; /* # of bytes hitting the filter */ 27 u64 packets; /* # of packets hitting the filter */ 28 u64 last_used; /* Last updated jiffies time */ 29}; 30 31struct cxgb4_tc_port_matchall { 32 struct cxgb4_matchall_egress_entry egress; /* Egress offload info */ 33 struct cxgb4_matchall_ingress_entry ingress; /* Ingress offload info */ 34}; 35 36struct cxgb4_tc_matchall { 37 struct cxgb4_tc_port_matchall *port_matchall; /* Per port entry */ 38}; 39 40int cxgb4_tc_matchall_replace(struct net_device *dev, 41 struct tc_cls_matchall_offload *cls_matchall, 42 bool ingress); 43int cxgb4_tc_matchall_destroy(struct net_device *dev, 44 struct tc_cls_matchall_offload *cls_matchall, 45 bool ingress); 46int cxgb4_tc_matchall_stats(struct net_device *dev, 47 struct tc_cls_matchall_offload *cls_matchall); 48 49int cxgb4_init_tc_matchall(struct adapter *adap); 50void cxgb4_cleanup_tc_matchall(struct adapter *adap); 51#endif /* __CXGB4_TC_MATCHALL_H__ */ 52