1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Linux network driver for QLogic BR-series Converged Network Adapter. 4 */ 5/* 6 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc. 7 * Copyright (c) 2014-2015 QLogic Corporation 8 * All rights reserved 9 * www.qlogic.com 10 */ 11 12/* BNA Hardware and Firmware Interface */ 13 14/* Skipping statistics collection to avoid clutter. 15 * Command is no longer needed: 16 * MTU 17 * TxQ Stop 18 * RxQ Stop 19 * RxF Enable/Disable 20 * 21 * HDS-off request is dynamic 22 * keep structures as multiple of 32-bit fields for alignment. 23 * All values must be written in big-endian. 24 */ 25#ifndef __BFI_ENET_H__ 26#define __BFI_ENET_H__ 27 28#include "bfa_defs.h" 29#include "bfi.h" 30 31#define BFI_ENET_CFG_MAX 32 /* Max resources per PF */ 32 33#define BFI_ENET_TXQ_PRIO_MAX 8 34#define BFI_ENET_RX_QSET_MAX 16 35#define BFI_ENET_TXQ_WI_VECT_MAX 4 36 37#define BFI_ENET_VLAN_ID_MAX 4096 38#define BFI_ENET_VLAN_BLOCK_SIZE 512 /* in bits */ 39#define BFI_ENET_VLAN_BLOCKS_MAX \ 40 (BFI_ENET_VLAN_ID_MAX / BFI_ENET_VLAN_BLOCK_SIZE) 41#define BFI_ENET_VLAN_WORD_SIZE 32 /* in bits */ 42#define BFI_ENET_VLAN_WORDS_MAX \ 43 (BFI_ENET_VLAN_BLOCK_SIZE / BFI_ENET_VLAN_WORD_SIZE) 44 45#define BFI_ENET_RSS_RIT_MAX 64 /* entries */ 46#define BFI_ENET_RSS_KEY_LEN 10 /* 32-bit words */ 47 48union bfi_addr_be_u { 49 struct { 50 u32 addr_hi; /* Most Significant 32-bits */ 51 u32 addr_lo; /* Least Significant 32-Bits */ 52 } __packed a32; 53} __packed; 54 55/* T X Q U E U E D E F I N E S */ 56/* TxQ Vector (a.k.a. Tx-Buffer Descriptor) */ 57/* TxQ Entry Opcodes */ 58#define BFI_ENET_TXQ_WI_SEND (0x402) /* Single Frame Transmission */ 59#define BFI_ENET_TXQ_WI_SEND_LSO (0x403) /* Multi-Frame Transmission */ 60#define BFI_ENET_TXQ_WI_EXTENSION (0x104) /* Extension WI */ 61 62/* TxQ Entry Control Flags */ 63#define BFI_ENET_TXQ_WI_CF_FCOE_CRC BIT(8) 64#define BFI_ENET_TXQ_WI_CF_IPID_MODE BIT(5) 65#define BFI_ENET_TXQ_WI_CF_INS_PRIO BIT(4) 66#define BFI_ENET_TXQ_WI_CF_INS_VLAN BIT(3) 67#define BFI_ENET_TXQ_WI_CF_UDP_CKSUM BIT(2) 68#define BFI_ENET_TXQ_WI_CF_TCP_CKSUM BIT(1) 69#define BFI_ENET_TXQ_WI_CF_IP_CKSUM BIT(0) 70 71struct bfi_enet_txq_wi_base { 72 u8 reserved; 73 u8 num_vectors; /* number of vectors present */ 74 u16 opcode; 75 /* BFI_ENET_TXQ_WI_SEND or BFI_ENET_TXQ_WI_SEND_LSO */ 76 u16 flags; /* OR of all the flags */ 77 u16 l4_hdr_size_n_offset; 78 u16 vlan_tag; 79 u16 lso_mss; /* Only 14 LSB are valid */ 80 u32 frame_length; /* Only 24 LSB are valid */ 81} __packed; 82 83struct bfi_enet_txq_wi_ext { 84 u16 reserved; 85 u16 opcode; /* BFI_ENET_TXQ_WI_EXTENSION */ 86 u32 reserved2[3]; 87} __packed; 88 89struct bfi_enet_txq_wi_vector { /* Tx Buffer Descriptor */ 90 u16 reserved; 91 u16 length; /* Only 14 LSB are valid */ 92 union bfi_addr_be_u addr; 93} __packed; 94 95/* TxQ Entry Structure */ 96struct bfi_enet_txq_entry { 97 union { 98 struct bfi_enet_txq_wi_base base; 99 struct bfi_enet_txq_wi_ext ext; 100 } __packed wi; 101 struct bfi_enet_txq_wi_vector vector[BFI_ENET_TXQ_WI_VECT_MAX]; 102} __packed; 103 104#define wi_hdr wi.base 105#define wi_ext_hdr wi.ext 106 107#define BFI_ENET_TXQ_WI_L4_HDR_N_OFFSET(_hdr_size, _offset) \ 108 (((_hdr_size) << 10) | ((_offset) & 0x3FF)) 109 110/* R X Q U E U E D E F I N E S */ 111struct bfi_enet_rxq_entry { 112 union bfi_addr_be_u rx_buffer; 113} __packed; 114 115/* R X C O M P L E T I O N Q U E U E D E F I N E S */ 116/* CQ Entry Flags */ 117#define BFI_ENET_CQ_EF_MAC_ERROR BIT(0) 118#define BFI_ENET_CQ_EF_FCS_ERROR BIT(1) 119#define BFI_ENET_CQ_EF_TOO_LONG BIT(2) 120#define BFI_ENET_CQ_EF_FC_CRC_OK BIT(3) 121 122#define BFI_ENET_CQ_EF_RSVD1 BIT(4) 123#define BFI_ENET_CQ_EF_L4_CKSUM_OK BIT(5) 124#define BFI_ENET_CQ_EF_L3_CKSUM_OK BIT(6) 125#define BFI_ENET_CQ_EF_HDS_HEADER BIT(7) 126 127#define BFI_ENET_CQ_EF_UDP BIT(8) 128#define BFI_ENET_CQ_EF_TCP BIT(9) 129#define BFI_ENET_CQ_EF_IP_OPTIONS BIT(10) 130#define BFI_ENET_CQ_EF_IPV6 BIT(11) 131 132#define BFI_ENET_CQ_EF_IPV4 BIT(12) 133#define BFI_ENET_CQ_EF_VLAN BIT(13) 134#define BFI_ENET_CQ_EF_RSS BIT(14) 135#define BFI_ENET_CQ_EF_RSVD2 BIT(15) 136 137#define BFI_ENET_CQ_EF_MCAST_MATCH BIT(16) 138#define BFI_ENET_CQ_EF_MCAST BIT(17) 139#define BFI_ENET_CQ_EF_BCAST BIT(18) 140#define BFI_ENET_CQ_EF_REMOTE BIT(19) 141 142#define BFI_ENET_CQ_EF_LOCAL BIT(20) 143 144/* CQ Entry Structure */ 145struct bfi_enet_cq_entry { 146 u32 flags; 147 u16 vlan_tag; 148 u16 length; 149 u32 rss_hash; 150 u8 valid; 151 u8 reserved1; 152 u8 reserved2; 153 u8 rxq_id; 154} __packed; 155 156/* E N E T C O N T R O L P A T H C O M M A N D S */ 157struct bfi_enet_q { 158 union bfi_addr_u pg_tbl; 159 union bfi_addr_u first_entry; 160 u16 pages; /* # of pages */ 161 u16 page_sz; 162} __packed; 163 164struct bfi_enet_txq { 165 struct bfi_enet_q q; 166 u8 priority; 167 u8 rsvd[3]; 168} __packed; 169 170struct bfi_enet_rxq { 171 struct bfi_enet_q q; 172 u16 rx_buffer_size; 173 u16 rsvd; 174} __packed; 175 176struct bfi_enet_cq { 177 struct bfi_enet_q q; 178} __packed; 179 180struct bfi_enet_ib_cfg { 181 u8 int_pkt_dma; 182 u8 int_enabled; 183 u8 int_pkt_enabled; 184 u8 continuous_coalescing; 185 u8 msix; 186 u8 rsvd[3]; 187 u32 coalescing_timeout; 188 u32 inter_pkt_timeout; 189 u8 inter_pkt_count; 190 u8 rsvd1[3]; 191} __packed; 192 193struct bfi_enet_ib { 194 union bfi_addr_u index_addr; 195 union { 196 u16 msix_index; 197 u16 intx_bitmask; 198 } __packed intr; 199 u16 rsvd; 200} __packed; 201 202/* ENET command messages */ 203enum bfi_enet_h2i_msgs { 204 /* Rx Commands */ 205 BFI_ENET_H2I_RX_CFG_SET_REQ = 1, 206 BFI_ENET_H2I_RX_CFG_CLR_REQ = 2, 207 208 BFI_ENET_H2I_RIT_CFG_REQ = 3, 209 BFI_ENET_H2I_RSS_CFG_REQ = 4, 210 BFI_ENET_H2I_RSS_ENABLE_REQ = 5, 211 BFI_ENET_H2I_RX_PROMISCUOUS_REQ = 6, 212 BFI_ENET_H2I_RX_DEFAULT_REQ = 7, 213 214 BFI_ENET_H2I_MAC_UCAST_SET_REQ = 8, 215 BFI_ENET_H2I_MAC_UCAST_CLR_REQ = 9, 216 BFI_ENET_H2I_MAC_UCAST_ADD_REQ = 10, 217 BFI_ENET_H2I_MAC_UCAST_DEL_REQ = 11, 218 219 BFI_ENET_H2I_MAC_MCAST_ADD_REQ = 12, 220 BFI_ENET_H2I_MAC_MCAST_DEL_REQ = 13, 221 BFI_ENET_H2I_MAC_MCAST_FILTER_REQ = 14, 222 223 BFI_ENET_H2I_RX_VLAN_SET_REQ = 15, 224 BFI_ENET_H2I_RX_VLAN_STRIP_ENABLE_REQ = 16, 225 226 /* Tx Commands */ 227 BFI_ENET_H2I_TX_CFG_SET_REQ = 17, 228 BFI_ENET_H2I_TX_CFG_CLR_REQ = 18, 229 230 /* Port Commands */ 231 BFI_ENET_H2I_PORT_ADMIN_UP_REQ = 19, 232 BFI_ENET_H2I_SET_PAUSE_REQ = 20, 233 BFI_ENET_H2I_DIAG_LOOPBACK_REQ = 21, 234 235 /* Get Attributes Command */ 236 BFI_ENET_H2I_GET_ATTR_REQ = 22, 237 238 /* Statistics Commands */ 239 BFI_ENET_H2I_STATS_GET_REQ = 23, 240 BFI_ENET_H2I_STATS_CLR_REQ = 24, 241 242 BFI_ENET_H2I_WOL_MAGIC_REQ = 25, 243 BFI_ENET_H2I_WOL_FRAME_REQ = 26, 244 245 BFI_ENET_H2I_MAX = 27, 246}; 247 248enum bfi_enet_i2h_msgs { 249 /* Rx Responses */ 250 BFI_ENET_I2H_RX_CFG_SET_RSP = 251 BFA_I2HM(BFI_ENET_H2I_RX_CFG_SET_REQ), 252 BFI_ENET_I2H_RX_CFG_CLR_RSP = 253 BFA_I2HM(BFI_ENET_H2I_RX_CFG_CLR_REQ), 254 255 BFI_ENET_I2H_RIT_CFG_RSP = 256 BFA_I2HM(BFI_ENET_H2I_RIT_CFG_REQ), 257 BFI_ENET_I2H_RSS_CFG_RSP = 258 BFA_I2HM(BFI_ENET_H2I_RSS_CFG_REQ), 259 BFI_ENET_I2H_RSS_ENABLE_RSP = 260 BFA_I2HM(BFI_ENET_H2I_RSS_ENABLE_REQ), 261 BFI_ENET_I2H_RX_PROMISCUOUS_RSP = 262 BFA_I2HM(BFI_ENET_H2I_RX_PROMISCUOUS_REQ), 263 BFI_ENET_I2H_RX_DEFAULT_RSP = 264 BFA_I2HM(BFI_ENET_H2I_RX_DEFAULT_REQ), 265 266 BFI_ENET_I2H_MAC_UCAST_SET_RSP = 267 BFA_I2HM(BFI_ENET_H2I_MAC_UCAST_SET_REQ), 268 BFI_ENET_I2H_MAC_UCAST_CLR_RSP = 269 BFA_I2HM(BFI_ENET_H2I_MAC_UCAST_CLR_REQ), 270 BFI_ENET_I2H_MAC_UCAST_ADD_RSP = 271 BFA_I2HM(BFI_ENET_H2I_MAC_UCAST_ADD_REQ), 272 BFI_ENET_I2H_MAC_UCAST_DEL_RSP = 273 BFA_I2HM(BFI_ENET_H2I_MAC_UCAST_DEL_REQ), 274 275 BFI_ENET_I2H_MAC_MCAST_ADD_RSP = 276 BFA_I2HM(BFI_ENET_H2I_MAC_MCAST_ADD_REQ), 277 BFI_ENET_I2H_MAC_MCAST_DEL_RSP = 278 BFA_I2HM(BFI_ENET_H2I_MAC_MCAST_DEL_REQ), 279 BFI_ENET_I2H_MAC_MCAST_FILTER_RSP = 280 BFA_I2HM(BFI_ENET_H2I_MAC_MCAST_FILTER_REQ), 281 282 BFI_ENET_I2H_RX_VLAN_SET_RSP = 283 BFA_I2HM(BFI_ENET_H2I_RX_VLAN_SET_REQ), 284 285 BFI_ENET_I2H_RX_VLAN_STRIP_ENABLE_RSP = 286 BFA_I2HM(BFI_ENET_H2I_RX_VLAN_STRIP_ENABLE_REQ), 287 288 /* Tx Responses */ 289 BFI_ENET_I2H_TX_CFG_SET_RSP = 290 BFA_I2HM(BFI_ENET_H2I_TX_CFG_SET_REQ), 291 BFI_ENET_I2H_TX_CFG_CLR_RSP = 292 BFA_I2HM(BFI_ENET_H2I_TX_CFG_CLR_REQ), 293 294 /* Port Responses */ 295 BFI_ENET_I2H_PORT_ADMIN_RSP = 296 BFA_I2HM(BFI_ENET_H2I_PORT_ADMIN_UP_REQ), 297 298 BFI_ENET_I2H_SET_PAUSE_RSP = 299 BFA_I2HM(BFI_ENET_H2I_SET_PAUSE_REQ), 300 BFI_ENET_I2H_DIAG_LOOPBACK_RSP = 301 BFA_I2HM(BFI_ENET_H2I_DIAG_LOOPBACK_REQ), 302 303 /* Attributes Response */ 304 BFI_ENET_I2H_GET_ATTR_RSP = 305 BFA_I2HM(BFI_ENET_H2I_GET_ATTR_REQ), 306 307 /* Statistics Responses */ 308 BFI_ENET_I2H_STATS_GET_RSP = 309 BFA_I2HM(BFI_ENET_H2I_STATS_GET_REQ), 310 BFI_ENET_I2H_STATS_CLR_RSP = 311 BFA_I2HM(BFI_ENET_H2I_STATS_CLR_REQ), 312 313 BFI_ENET_I2H_WOL_MAGIC_RSP = 314 BFA_I2HM(BFI_ENET_H2I_WOL_MAGIC_REQ), 315 BFI_ENET_I2H_WOL_FRAME_RSP = 316 BFA_I2HM(BFI_ENET_H2I_WOL_FRAME_REQ), 317 318 /* AENs */ 319 BFI_ENET_I2H_LINK_DOWN_AEN = BFA_I2HM(BFI_ENET_H2I_MAX), 320 BFI_ENET_I2H_LINK_UP_AEN = BFA_I2HM(BFI_ENET_H2I_MAX + 1), 321 322 BFI_ENET_I2H_PORT_ENABLE_AEN = BFA_I2HM(BFI_ENET_H2I_MAX + 2), 323 BFI_ENET_I2H_PORT_DISABLE_AEN = BFA_I2HM(BFI_ENET_H2I_MAX + 3), 324 325 BFI_ENET_I2H_BW_UPDATE_AEN = BFA_I2HM(BFI_ENET_H2I_MAX + 4), 326}; 327 328/* The following error codes can be returned by the enet commands */ 329enum bfi_enet_err { 330 BFI_ENET_CMD_OK = 0, 331 BFI_ENET_CMD_FAIL = 1, 332 BFI_ENET_CMD_DUP_ENTRY = 2, /* !< Duplicate entry in CAM */ 333 BFI_ENET_CMD_CAM_FULL = 3, /* !< CAM is full */ 334 BFI_ENET_CMD_NOT_OWNER = 4, /* !< Not permitted, b'cos not owner */ 335 BFI_ENET_CMD_NOT_EXEC = 5, /* !< Was not sent to f/w at all */ 336 BFI_ENET_CMD_WAITING = 6, /* !< Waiting for completion */ 337 BFI_ENET_CMD_PORT_DISABLED = 7, /* !< port in disabled state */ 338}; 339 340/* Generic Request 341 * 342 * bfi_enet_req is used by: 343 * BFI_ENET_H2I_RX_CFG_CLR_REQ 344 * BFI_ENET_H2I_TX_CFG_CLR_REQ 345 */ 346struct bfi_enet_req { 347 struct bfi_msgq_mhdr mh; 348} __packed; 349 350/* Enable/Disable Request 351 * 352 * bfi_enet_enable_req is used by: 353 * BFI_ENET_H2I_RSS_ENABLE_REQ (enet_id must be zero) 354 * BFI_ENET_H2I_RX_PROMISCUOUS_REQ (enet_id must be zero) 355 * BFI_ENET_H2I_RX_DEFAULT_REQ (enet_id must be zero) 356 * BFI_ENET_H2I_RX_MAC_MCAST_FILTER_REQ 357 * BFI_ENET_H2I_PORT_ADMIN_UP_REQ (enet_id must be zero) 358 */ 359struct bfi_enet_enable_req { 360 struct bfi_msgq_mhdr mh; 361 u8 enable; /* 1 = enable; 0 = disable */ 362 u8 rsvd[3]; 363} __packed; 364 365/* Generic Response */ 366struct bfi_enet_rsp { 367 struct bfi_msgq_mhdr mh; 368 u8 error; /*!< if error see cmd_offset */ 369 u8 rsvd; 370 u16 cmd_offset; /*!< offset to invalid parameter */ 371} __packed; 372 373/* GLOBAL CONFIGURATION */ 374 375/* bfi_enet_attr_req is used by: 376 * BFI_ENET_H2I_GET_ATTR_REQ 377 */ 378struct bfi_enet_attr_req { 379 struct bfi_msgq_mhdr mh; 380} __packed; 381 382/* bfi_enet_attr_rsp is used by: 383 * BFI_ENET_I2H_GET_ATTR_RSP 384 */ 385struct bfi_enet_attr_rsp { 386 struct bfi_msgq_mhdr mh; 387 u8 error; /*!< if error see cmd_offset */ 388 u8 rsvd; 389 u16 cmd_offset; /*!< offset to invalid parameter */ 390 u32 max_cfg; 391 u32 max_ucmac; 392 u32 rit_size; 393} __packed; 394 395/* Tx Configuration 396 * 397 * bfi_enet_tx_cfg is used by: 398 * BFI_ENET_H2I_TX_CFG_SET_REQ 399 */ 400enum bfi_enet_tx_vlan_mode { 401 BFI_ENET_TX_VLAN_NOP = 0, 402 BFI_ENET_TX_VLAN_INS = 1, 403 BFI_ENET_TX_VLAN_WI = 2, 404}; 405 406struct bfi_enet_tx_cfg { 407 u8 vlan_mode; /*!< processing mode */ 408 u8 rsvd; 409 u16 vlan_id; 410 u8 admit_tagged_frame; 411 u8 apply_vlan_filter; 412 u8 add_to_vswitch; 413 u8 rsvd1[1]; 414} __packed; 415 416struct bfi_enet_tx_cfg_req { 417 struct bfi_msgq_mhdr mh; 418 u8 num_queues; /* # of Tx Queues */ 419 u8 rsvd[3]; 420 421 struct { 422 struct bfi_enet_txq q; 423 struct bfi_enet_ib ib; 424 } __packed q_cfg[BFI_ENET_TXQ_PRIO_MAX]; 425 426 struct bfi_enet_ib_cfg ib_cfg; 427 428 struct bfi_enet_tx_cfg tx_cfg; 429}; 430 431struct bfi_enet_tx_cfg_rsp { 432 struct bfi_msgq_mhdr mh; 433 u8 error; 434 u8 hw_id; /* For debugging */ 435 u8 rsvd[2]; 436 struct { 437 u32 q_dbell; /* PCI base address offset */ 438 u32 i_dbell; /* PCI base address offset */ 439 u8 hw_qid; /* For debugging */ 440 u8 rsvd[3]; 441 } __packed q_handles[BFI_ENET_TXQ_PRIO_MAX]; 442}; 443 444/* Rx Configuration 445 * 446 * bfi_enet_rx_cfg is used by: 447 * BFI_ENET_H2I_RX_CFG_SET_REQ 448 */ 449enum bfi_enet_rxq_type { 450 BFI_ENET_RXQ_SINGLE = 1, 451 BFI_ENET_RXQ_LARGE_SMALL = 2, 452 BFI_ENET_RXQ_HDS = 3, 453 BFI_ENET_RXQ_HDS_OPT_BASED = 4, 454}; 455 456enum bfi_enet_hds_type { 457 BFI_ENET_HDS_FORCED = 0x01, 458 BFI_ENET_HDS_IPV6_UDP = 0x02, 459 BFI_ENET_HDS_IPV6_TCP = 0x04, 460 BFI_ENET_HDS_IPV4_TCP = 0x08, 461 BFI_ENET_HDS_IPV4_UDP = 0x10, 462}; 463 464struct bfi_enet_rx_cfg { 465 u8 rxq_type; 466 u8 rsvd[1]; 467 u16 frame_size; 468 469 struct { 470 u8 max_header_size; 471 u8 force_offset; 472 u8 type; 473 u8 rsvd1; 474 } __packed hds; 475 476 u8 multi_buffer; 477 u8 strip_vlan; 478 u8 drop_untagged; 479 u8 rsvd2; 480} __packed; 481 482/* 483 * Multicast frames are received on the ql of q-set index zero. 484 * On the completion queue. RxQ ID = even is for large/data buffer queues 485 * and RxQ ID = odd is for small/header buffer queues. 486 */ 487struct bfi_enet_rx_cfg_req { 488 struct bfi_msgq_mhdr mh; 489 u8 num_queue_sets; /* # of Rx Queue Sets */ 490 u8 rsvd[3]; 491 492 struct { 493 struct bfi_enet_rxq ql; /* large/data/single buffers */ 494 struct bfi_enet_rxq qs; /* small/header buffers */ 495 struct bfi_enet_cq cq; 496 struct bfi_enet_ib ib; 497 } __packed q_cfg[BFI_ENET_RX_QSET_MAX]; 498 499 struct bfi_enet_ib_cfg ib_cfg; 500 501 struct bfi_enet_rx_cfg rx_cfg; 502} __packed; 503 504struct bfi_enet_rx_cfg_rsp { 505 struct bfi_msgq_mhdr mh; 506 u8 error; 507 u8 hw_id; /* For debugging */ 508 u8 rsvd[2]; 509 struct { 510 u32 ql_dbell; /* PCI base address offset */ 511 u32 qs_dbell; /* PCI base address offset */ 512 u32 i_dbell; /* PCI base address offset */ 513 u8 hw_lqid; /* For debugging */ 514 u8 hw_sqid; /* For debugging */ 515 u8 hw_cqid; /* For debugging */ 516 u8 rsvd; 517 } __packed q_handles[BFI_ENET_RX_QSET_MAX]; 518} __packed; 519 520/* RIT 521 * 522 * bfi_enet_rit_req is used by: 523 * BFI_ENET_H2I_RIT_CFG_REQ 524 */ 525struct bfi_enet_rit_req { 526 struct bfi_msgq_mhdr mh; 527 u16 size; /* number of table-entries used */ 528 u8 rsvd[2]; 529 u8 table[BFI_ENET_RSS_RIT_MAX]; 530} __packed; 531 532/* RSS 533 * 534 * bfi_enet_rss_cfg_req is used by: 535 * BFI_ENET_H2I_RSS_CFG_REQ 536 */ 537enum bfi_enet_rss_type { 538 BFI_ENET_RSS_IPV6 = 0x01, 539 BFI_ENET_RSS_IPV6_TCP = 0x02, 540 BFI_ENET_RSS_IPV4 = 0x04, 541 BFI_ENET_RSS_IPV4_TCP = 0x08 542}; 543 544struct bfi_enet_rss_cfg { 545 u8 type; 546 u8 mask; 547 u8 rsvd[2]; 548 u32 key[BFI_ENET_RSS_KEY_LEN]; 549} __packed; 550 551struct bfi_enet_rss_cfg_req { 552 struct bfi_msgq_mhdr mh; 553 struct bfi_enet_rss_cfg cfg; 554} __packed; 555 556/* MAC Unicast 557 * 558 * bfi_enet_rx_vlan_req is used by: 559 * BFI_ENET_H2I_MAC_UCAST_SET_REQ 560 * BFI_ENET_H2I_MAC_UCAST_CLR_REQ 561 * BFI_ENET_H2I_MAC_UCAST_ADD_REQ 562 * BFI_ENET_H2I_MAC_UCAST_DEL_REQ 563 */ 564struct bfi_enet_ucast_req { 565 struct bfi_msgq_mhdr mh; 566 u8 mac_addr[ETH_ALEN]; 567 u8 rsvd[2]; 568} __packed; 569 570/* MAC Unicast + VLAN */ 571struct bfi_enet_mac_n_vlan_req { 572 struct bfi_msgq_mhdr mh; 573 u16 vlan_id; 574 u8 mac_addr[ETH_ALEN]; 575} __packed; 576 577/* MAC Multicast 578 * 579 * bfi_enet_mac_mfilter_add_req is used by: 580 * BFI_ENET_H2I_MAC_MCAST_ADD_REQ 581 */ 582struct bfi_enet_mcast_add_req { 583 struct bfi_msgq_mhdr mh; 584 u8 mac_addr[ETH_ALEN]; 585 u8 rsvd[2]; 586} __packed; 587 588/* bfi_enet_mac_mfilter_add_rsp is used by: 589 * BFI_ENET_I2H_MAC_MCAST_ADD_RSP 590 */ 591struct bfi_enet_mcast_add_rsp { 592 struct bfi_msgq_mhdr mh; 593 u8 error; 594 u8 rsvd; 595 u16 cmd_offset; 596 u16 handle; 597 u8 rsvd1[2]; 598} __packed; 599 600/* bfi_enet_mac_mfilter_del_req is used by: 601 * BFI_ENET_H2I_MAC_MCAST_DEL_REQ 602 */ 603struct bfi_enet_mcast_del_req { 604 struct bfi_msgq_mhdr mh; 605 u16 handle; 606 u8 rsvd[2]; 607} __packed; 608 609/* VLAN 610 * 611 * bfi_enet_rx_vlan_req is used by: 612 * BFI_ENET_H2I_RX_VLAN_SET_REQ 613 */ 614struct bfi_enet_rx_vlan_req { 615 struct bfi_msgq_mhdr mh; 616 u8 block_idx; 617 u8 rsvd[3]; 618 u32 bit_mask[BFI_ENET_VLAN_WORDS_MAX]; 619} __packed; 620 621/* PAUSE 622 * 623 * bfi_enet_set_pause_req is used by: 624 * BFI_ENET_H2I_SET_PAUSE_REQ 625 */ 626struct bfi_enet_set_pause_req { 627 struct bfi_msgq_mhdr mh; 628 u8 rsvd[2]; 629 u8 tx_pause; /* 1 = enable; 0 = disable */ 630 u8 rx_pause; /* 1 = enable; 0 = disable */ 631} __packed; 632 633/* DIAGNOSTICS 634 * 635 * bfi_enet_diag_lb_req is used by: 636 * BFI_ENET_H2I_DIAG_LOOPBACK 637 */ 638struct bfi_enet_diag_lb_req { 639 struct bfi_msgq_mhdr mh; 640 u8 rsvd[2]; 641 u8 mode; /* cable or Serdes */ 642 u8 enable; /* 1 = enable; 0 = disable */ 643} __packed; 644 645/* enum for Loopback opmodes */ 646enum { 647 BFI_ENET_DIAG_LB_OPMODE_EXT = 0, 648 BFI_ENET_DIAG_LB_OPMODE_CBL = 1, 649}; 650 651/* STATISTICS 652 * 653 * bfi_enet_stats_req is used by: 654 * BFI_ENET_H2I_STATS_GET_REQ 655 * BFI_ENET_I2H_STATS_CLR_REQ 656 */ 657struct bfi_enet_stats_req { 658 struct bfi_msgq_mhdr mh; 659 u16 stats_mask; 660 u8 rsvd[2]; 661 u32 rx_enet_mask; 662 u32 tx_enet_mask; 663 union bfi_addr_u host_buffer; 664} __packed; 665 666/* defines for "stats_mask" above. */ 667#define BFI_ENET_STATS_MAC BIT(0) /* !< MAC Statistics */ 668#define BFI_ENET_STATS_BPC BIT(1) /* !< Pause Stats from BPC */ 669#define BFI_ENET_STATS_RAD BIT(2) /* !< Rx Admission Statistics */ 670#define BFI_ENET_STATS_RX_FC BIT(3) /* !< Rx FC Stats from RxA */ 671#define BFI_ENET_STATS_TX_FC BIT(4) /* !< Tx FC Stats from TxA */ 672 673#define BFI_ENET_STATS_ALL 0x1f 674 675/* TxF Frame Statistics */ 676struct bfi_enet_stats_txf { 677 u64 ucast_octets; 678 u64 ucast; 679 u64 ucast_vlan; 680 681 u64 mcast_octets; 682 u64 mcast; 683 u64 mcast_vlan; 684 685 u64 bcast_octets; 686 u64 bcast; 687 u64 bcast_vlan; 688 689 u64 errors; 690 u64 filter_vlan; /* frames filtered due to VLAN */ 691 u64 filter_mac_sa; /* frames filtered due to SA check */ 692} __packed; 693 694/* RxF Frame Statistics */ 695struct bfi_enet_stats_rxf { 696 u64 ucast_octets; 697 u64 ucast; 698 u64 ucast_vlan; 699 700 u64 mcast_octets; 701 u64 mcast; 702 u64 mcast_vlan; 703 704 u64 bcast_octets; 705 u64 bcast; 706 u64 bcast_vlan; 707 u64 frame_drops; 708} __packed; 709 710/* FC Tx Frame Statistics */ 711struct bfi_enet_stats_fc_tx { 712 u64 txf_ucast_octets; 713 u64 txf_ucast; 714 u64 txf_ucast_vlan; 715 716 u64 txf_mcast_octets; 717 u64 txf_mcast; 718 u64 txf_mcast_vlan; 719 720 u64 txf_bcast_octets; 721 u64 txf_bcast; 722 u64 txf_bcast_vlan; 723 724 u64 txf_parity_errors; 725 u64 txf_timeout; 726 u64 txf_fid_parity_errors; 727} __packed; 728 729/* FC Rx Frame Statistics */ 730struct bfi_enet_stats_fc_rx { 731 u64 rxf_ucast_octets; 732 u64 rxf_ucast; 733 u64 rxf_ucast_vlan; 734 735 u64 rxf_mcast_octets; 736 u64 rxf_mcast; 737 u64 rxf_mcast_vlan; 738 739 u64 rxf_bcast_octets; 740 u64 rxf_bcast; 741 u64 rxf_bcast_vlan; 742} __packed; 743 744/* RAD Frame Statistics */ 745struct bfi_enet_stats_rad { 746 u64 rx_frames; 747 u64 rx_octets; 748 u64 rx_vlan_frames; 749 750 u64 rx_ucast; 751 u64 rx_ucast_octets; 752 u64 rx_ucast_vlan; 753 754 u64 rx_mcast; 755 u64 rx_mcast_octets; 756 u64 rx_mcast_vlan; 757 758 u64 rx_bcast; 759 u64 rx_bcast_octets; 760 u64 rx_bcast_vlan; 761 762 u64 rx_drops; 763} __packed; 764 765/* BPC Tx Registers */ 766struct bfi_enet_stats_bpc { 767 /* transmit stats */ 768 u64 tx_pause[8]; 769 u64 tx_zero_pause[8]; /*!< Pause cancellation */ 770 /*!<Pause initiation rather than retention */ 771 u64 tx_first_pause[8]; 772 773 /* receive stats */ 774 u64 rx_pause[8]; 775 u64 rx_zero_pause[8]; /*!< Pause cancellation */ 776 /*!<Pause initiation rather than retention */ 777 u64 rx_first_pause[8]; 778} __packed; 779 780/* MAC Rx Statistics */ 781struct bfi_enet_stats_mac { 782 u64 stats_clr_cnt; /* times this stats cleared */ 783 u64 frame_64; /* both rx and tx counter */ 784 u64 frame_65_127; /* both rx and tx counter */ 785 u64 frame_128_255; /* both rx and tx counter */ 786 u64 frame_256_511; /* both rx and tx counter */ 787 u64 frame_512_1023; /* both rx and tx counter */ 788 u64 frame_1024_1518; /* both rx and tx counter */ 789 u64 frame_1519_1522; /* both rx and tx counter */ 790 791 /* receive stats */ 792 u64 rx_bytes; 793 u64 rx_packets; 794 u64 rx_fcs_error; 795 u64 rx_multicast; 796 u64 rx_broadcast; 797 u64 rx_control_frames; 798 u64 rx_pause; 799 u64 rx_unknown_opcode; 800 u64 rx_alignment_error; 801 u64 rx_frame_length_error; 802 u64 rx_code_error; 803 u64 rx_carrier_sense_error; 804 u64 rx_undersize; 805 u64 rx_oversize; 806 u64 rx_fragments; 807 u64 rx_jabber; 808 u64 rx_drop; 809 810 /* transmit stats */ 811 u64 tx_bytes; 812 u64 tx_packets; 813 u64 tx_multicast; 814 u64 tx_broadcast; 815 u64 tx_pause; 816 u64 tx_deferral; 817 u64 tx_excessive_deferral; 818 u64 tx_single_collision; 819 u64 tx_muliple_collision; 820 u64 tx_late_collision; 821 u64 tx_excessive_collision; 822 u64 tx_total_collision; 823 u64 tx_pause_honored; 824 u64 tx_drop; 825 u64 tx_jabber; 826 u64 tx_fcs_error; 827 u64 tx_control_frame; 828 u64 tx_oversize; 829 u64 tx_undersize; 830 u64 tx_fragments; 831} __packed; 832 833/* Complete statistics, DMAed from fw to host followed by 834 * BFI_ENET_I2H_STATS_GET_RSP 835 */ 836struct bfi_enet_stats { 837 struct bfi_enet_stats_mac mac_stats; 838 struct bfi_enet_stats_bpc bpc_stats; 839 struct bfi_enet_stats_rad rad_stats; 840 struct bfi_enet_stats_rad rlb_stats; 841 struct bfi_enet_stats_fc_rx fc_rx_stats; 842 struct bfi_enet_stats_fc_tx fc_tx_stats; 843 struct bfi_enet_stats_rxf rxf_stats[BFI_ENET_CFG_MAX]; 844 struct bfi_enet_stats_txf txf_stats[BFI_ENET_CFG_MAX]; 845} __packed; 846 847#endif /* __BFI_ENET_H__ */ 848