1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * softing common interfaces
4 *
5 * by Kurt Van Dijck, 2008-2010
6 */
7
8#include <linux/atomic.h>
9#include <linux/netdevice.h>
10#include <linux/ktime.h>
11#include <linux/mutex.h>
12#include <linux/spinlock.h>
13#include <linux/can.h>
14#include <linux/can/dev.h>
15
16#include "softing_platform.h"
17
18struct softing;
19
20struct softing_priv {
21	struct can_priv can; /* must be the first member! */
22	struct net_device *netdev;
23	struct softing *card;
24	struct {
25		int pending;
26		/* variables which hold the circular buffer */
27		int echo_put;
28		int echo_get;
29	} tx;
30	struct can_bittiming_const btr_const;
31	int index;
32	uint8_t output;
33	uint16_t chip;
34};
35#define netdev2softing(netdev)	((struct softing_priv *)netdev_priv(netdev))
36
37struct softing {
38	const struct softing_platform_data *pdat;
39	struct platform_device *pdev;
40	struct net_device *net[2];
41	spinlock_t spin; /* protect this structure & DPRAM access */
42	ktime_t ts_ref;
43	ktime_t ts_overflow; /* timestamp overflow value, in ktime */
44
45	struct {
46		/* indication of firmware status */
47		int up;
48		/* protection of the 'up' variable */
49		struct mutex lock;
50	} fw;
51	struct {
52		int nr;
53		int requested;
54		int svc_count;
55		unsigned int dpram_position;
56	} irq;
57	struct {
58		int pending;
59		int last_bus;
60		/*
61		 * keep the bus that last tx'd a message,
62		 * in order to let every netdev queue resume
63		 */
64	} tx;
65	__iomem uint8_t *dpram;
66	unsigned long dpram_phys;
67	unsigned long dpram_size;
68	struct {
69		uint16_t fw_version, hw_version, license, serial;
70		uint16_t chip[2];
71		unsigned int freq; /* remote cpu's operating frequency */
72	} id;
73};
74
75int softing_default_output(struct net_device *netdev);
76
77ktime_t softing_raw2ktime(struct softing *card, u32 raw);
78
79int softing_chip_poweron(struct softing *card);
80
81int softing_bootloader_command(struct softing *card, int16_t cmd,
82			       const char *msg);
83
84/* Load firmware after reset */
85int softing_load_fw(const char *file, struct softing *card,
86		    __iomem uint8_t *virt, unsigned int size, int offset);
87
88/* Load final application firmware after bootloader */
89int softing_load_app_fw(const char *file, struct softing *card);
90
91/*
92 * enable or disable irq
93 * only called with fw.lock locked
94 */
95int softing_enable_irq(struct softing *card, int enable);
96
97/* start/stop 1 bus on card */
98int softing_startstop(struct net_device *netdev, int up);
99
100/* netif_rx() */
101int softing_netdev_rx(struct net_device *netdev, const struct can_frame *msg,
102		      ktime_t ktime);
103
104/* SOFTING DPRAM mappings */
105#define DPRAM_RX		0x0000
106	#define DPRAM_RX_SIZE	32
107	#define DPRAM_RX_CNT	16
108#define DPRAM_RX_RD		0x0201	/* uint8_t */
109#define DPRAM_RX_WR		0x0205	/* uint8_t */
110#define DPRAM_RX_LOST		0x0207	/* uint8_t */
111
112#define DPRAM_FCT_PARAM		0x0300	/* int16_t [20] */
113#define DPRAM_FCT_RESULT	0x0328	/* int16_t */
114#define DPRAM_FCT_HOST		0x032b	/* uint16_t */
115
116#define DPRAM_INFO_BUSSTATE	0x0331	/* uint16_t */
117#define DPRAM_INFO_BUSSTATE2	0x0335	/* uint16_t */
118#define DPRAM_INFO_ERRSTATE	0x0339	/* uint16_t */
119#define DPRAM_INFO_ERRSTATE2	0x033d	/* uint16_t */
120#define DPRAM_RESET		0x0341	/* uint16_t */
121#define DPRAM_CLR_RECV_FIFO	0x0345	/* uint16_t */
122#define DPRAM_RESET_TIME	0x034d	/* uint16_t */
123#define DPRAM_TIME		0x0350	/* uint64_t */
124#define DPRAM_WR_START		0x0358	/* uint8_t */
125#define DPRAM_WR_END		0x0359	/* uint8_t */
126#define DPRAM_RESET_RX_FIFO	0x0361	/* uint16_t */
127#define DPRAM_RESET_TX_FIFO	0x0364	/* uint8_t */
128#define DPRAM_READ_FIFO_LEVEL	0x0365	/* uint8_t */
129#define DPRAM_RX_FIFO_LEVEL	0x0366	/* uint16_t */
130#define DPRAM_TX_FIFO_LEVEL	0x0366	/* uint16_t */
131
132#define DPRAM_TX		0x0400	/* uint16_t */
133	#define DPRAM_TX_SIZE	16
134	#define DPRAM_TX_CNT	32
135#define DPRAM_TX_RD		0x0601	/* uint8_t */
136#define DPRAM_TX_WR		0x0605	/* uint8_t */
137
138#define DPRAM_COMMAND		0x07e0	/* uint16_t */
139#define DPRAM_RECEIPT		0x07f0	/* uint16_t */
140#define DPRAM_IRQ_TOHOST	0x07fe	/* uint8_t */
141#define DPRAM_IRQ_TOCARD	0x07ff	/* uint8_t */
142
143#define DPRAM_V2_RESET		0x0e00	/* uint8_t */
144#define DPRAM_V2_IRQ_TOHOST	0x0e02	/* uint8_t */
145
146#define TXMAX	(DPRAM_TX_CNT - 1)
147
148/* DPRAM return codes */
149#define RES_NONE	0
150#define RES_OK		1
151#define RES_NOK		2
152#define RES_UNKNOWN	3
153/* DPRAM flags */
154#define CMD_TX		0x01
155#define CMD_ACK		0x02
156#define CMD_XTD		0x04
157#define CMD_RTR		0x08
158#define CMD_ERR		0x10
159#define CMD_BUS2	0x80
160
161/* returned fifo entry bus state masks */
162#define SF_MASK_BUSOFF		0x80
163#define SF_MASK_EPASSIVE	0x60
164
165/* bus states */
166#define STATE_BUSOFF	2
167#define STATE_EPASSIVE	1
168#define STATE_EACTIVE	0
169