1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright �� 2005-2009 Samsung Electronics 4 * Copyright �� 2007 Nokia Corporation 5 * 6 * Kyungmin Park <kyungmin.park@samsung.com> 7 * 8 * Credits: 9 * Adrian Hunter <ext-adrian.hunter@nokia.com>: 10 * auto-placement support, read-while load support, various fixes 11 * 12 * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com> 13 * Flex-OneNAND support 14 * Amul Kumar Saha <amul.saha at samsung.com> 15 * OTP support 16 */ 17 18#include <linux/kernel.h> 19#include <linux/module.h> 20#include <linux/moduleparam.h> 21#include <linux/slab.h> 22#include <linux/sched.h> 23#include <linux/delay.h> 24#include <linux/interrupt.h> 25#include <linux/jiffies.h> 26#include <linux/mtd/mtd.h> 27#include <linux/mtd/onenand.h> 28#include <linux/mtd/partitions.h> 29 30#include <asm/io.h> 31 32/* 33 * Multiblock erase if number of blocks to erase is 2 or more. 34 * Maximum number of blocks for simultaneous erase is 64. 35 */ 36#define MB_ERASE_MIN_BLK_COUNT 2 37#define MB_ERASE_MAX_BLK_COUNT 64 38 39/* Default Flex-OneNAND boundary and lock respectively */ 40static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 }; 41 42module_param_array(flex_bdry, int, NULL, 0400); 43MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND" 44 "Syntax:flex_bdry=DIE_BDRY,LOCK,..." 45 "DIE_BDRY: SLC boundary of the die" 46 "LOCK: Locking information for SLC boundary" 47 " : 0->Set boundary in unlocked status" 48 " : 1->Set boundary in locked status"); 49 50/* Default OneNAND/Flex-OneNAND OTP options*/ 51static int otp; 52 53module_param(otp, int, 0400); 54MODULE_PARM_DESC(otp, "Corresponding behaviour of OneNAND in OTP" 55 "Syntax : otp=LOCK_TYPE" 56 "LOCK_TYPE : Keys issued, for specific OTP Lock type" 57 " : 0 -> Default (No Blocks Locked)" 58 " : 1 -> OTP Block lock" 59 " : 2 -> 1st Block lock" 60 " : 3 -> BOTH OTP Block and 1st Block lock"); 61 62/* 63 * flexonenand_oob_128 - oob info for Flex-Onenand with 4KB page 64 * For now, we expose only 64 out of 80 ecc bytes 65 */ 66static int flexonenand_ooblayout_ecc(struct mtd_info *mtd, int section, 67 struct mtd_oob_region *oobregion) 68{ 69 if (section > 7) 70 return -ERANGE; 71 72 oobregion->offset = (section * 16) + 6; 73 oobregion->length = 10; 74 75 return 0; 76} 77 78static int flexonenand_ooblayout_free(struct mtd_info *mtd, int section, 79 struct mtd_oob_region *oobregion) 80{ 81 if (section > 7) 82 return -ERANGE; 83 84 oobregion->offset = (section * 16) + 2; 85 oobregion->length = 4; 86 87 return 0; 88} 89 90static const struct mtd_ooblayout_ops flexonenand_ooblayout_ops = { 91 .ecc = flexonenand_ooblayout_ecc, 92 .free = flexonenand_ooblayout_free, 93}; 94 95/* 96 * onenand_oob_128 - oob info for OneNAND with 4KB page 97 * 98 * Based on specification: 99 * 4Gb M-die OneNAND Flash (KFM4G16Q4M, KFN8G16Q4M). Rev. 1.3, Apr. 2010 100 * 101 */ 102static int onenand_ooblayout_128_ecc(struct mtd_info *mtd, int section, 103 struct mtd_oob_region *oobregion) 104{ 105 if (section > 7) 106 return -ERANGE; 107 108 oobregion->offset = (section * 16) + 7; 109 oobregion->length = 9; 110 111 return 0; 112} 113 114static int onenand_ooblayout_128_free(struct mtd_info *mtd, int section, 115 struct mtd_oob_region *oobregion) 116{ 117 if (section >= 8) 118 return -ERANGE; 119 120 /* 121 * free bytes are using the spare area fields marked as 122 * "Managed by internal ECC logic for Logical Sector Number area" 123 */ 124 oobregion->offset = (section * 16) + 2; 125 oobregion->length = 3; 126 127 return 0; 128} 129 130static const struct mtd_ooblayout_ops onenand_oob_128_ooblayout_ops = { 131 .ecc = onenand_ooblayout_128_ecc, 132 .free = onenand_ooblayout_128_free, 133}; 134 135/* 136 * onenand_oob_32_64 - oob info for large (2KB) page 137 */ 138static int onenand_ooblayout_32_64_ecc(struct mtd_info *mtd, int section, 139 struct mtd_oob_region *oobregion) 140{ 141 if (section > 3) 142 return -ERANGE; 143 144 oobregion->offset = (section * 16) + 8; 145 oobregion->length = 5; 146 147 return 0; 148} 149 150static int onenand_ooblayout_32_64_free(struct mtd_info *mtd, int section, 151 struct mtd_oob_region *oobregion) 152{ 153 int sections = (mtd->oobsize / 32) * 2; 154 155 if (section >= sections) 156 return -ERANGE; 157 158 if (section & 1) { 159 oobregion->offset = ((section - 1) * 16) + 14; 160 oobregion->length = 2; 161 } else { 162 oobregion->offset = (section * 16) + 2; 163 oobregion->length = 3; 164 } 165 166 return 0; 167} 168 169static const struct mtd_ooblayout_ops onenand_oob_32_64_ooblayout_ops = { 170 .ecc = onenand_ooblayout_32_64_ecc, 171 .free = onenand_ooblayout_32_64_free, 172}; 173 174static const unsigned char ffchars[] = { 175 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 176 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */ 177 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 178 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */ 179 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 180 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */ 181 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 182 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */ 183 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 184 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */ 185 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 186 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */ 187 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 188 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */ 189 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 190 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */ 191}; 192 193/** 194 * onenand_readw - [OneNAND Interface] Read OneNAND register 195 * @addr: address to read 196 * 197 * Read OneNAND register 198 */ 199static unsigned short onenand_readw(void __iomem *addr) 200{ 201 return readw(addr); 202} 203 204/** 205 * onenand_writew - [OneNAND Interface] Write OneNAND register with value 206 * @value: value to write 207 * @addr: address to write 208 * 209 * Write OneNAND register with value 210 */ 211static void onenand_writew(unsigned short value, void __iomem *addr) 212{ 213 writew(value, addr); 214} 215 216/** 217 * onenand_block_address - [DEFAULT] Get block address 218 * @this: onenand chip data structure 219 * @block: the block 220 * @return translated block address if DDP, otherwise same 221 * 222 * Setup Start Address 1 Register (F100h) 223 */ 224static int onenand_block_address(struct onenand_chip *this, int block) 225{ 226 /* Device Flash Core select, NAND Flash Block Address */ 227 if (block & this->density_mask) 228 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask); 229 230 return block; 231} 232 233/** 234 * onenand_bufferram_address - [DEFAULT] Get bufferram address 235 * @this: onenand chip data structure 236 * @block: the block 237 * @return set DBS value if DDP, otherwise 0 238 * 239 * Setup Start Address 2 Register (F101h) for DDP 240 */ 241static int onenand_bufferram_address(struct onenand_chip *this, int block) 242{ 243 /* Device BufferRAM Select */ 244 if (block & this->density_mask) 245 return ONENAND_DDP_CHIP1; 246 247 return ONENAND_DDP_CHIP0; 248} 249 250/** 251 * onenand_page_address - [DEFAULT] Get page address 252 * @page: the page address 253 * @sector: the sector address 254 * @return combined page and sector address 255 * 256 * Setup Start Address 8 Register (F107h) 257 */ 258static int onenand_page_address(int page, int sector) 259{ 260 /* Flash Page Address, Flash Sector Address */ 261 int fpa, fsa; 262 263 fpa = page & ONENAND_FPA_MASK; 264 fsa = sector & ONENAND_FSA_MASK; 265 266 return ((fpa << ONENAND_FPA_SHIFT) | fsa); 267} 268 269/** 270 * onenand_buffer_address - [DEFAULT] Get buffer address 271 * @dataram1: DataRAM index 272 * @sectors: the sector address 273 * @count: the number of sectors 274 * Return: the start buffer value 275 * 276 * Setup Start Buffer Register (F200h) 277 */ 278static int onenand_buffer_address(int dataram1, int sectors, int count) 279{ 280 int bsa, bsc; 281 282 /* BufferRAM Sector Address */ 283 bsa = sectors & ONENAND_BSA_MASK; 284 285 if (dataram1) 286 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */ 287 else 288 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */ 289 290 /* BufferRAM Sector Count */ 291 bsc = count & ONENAND_BSC_MASK; 292 293 return ((bsa << ONENAND_BSA_SHIFT) | bsc); 294} 295 296/** 297 * flexonenand_block- For given address return block number 298 * @this: - OneNAND device structure 299 * @addr: - Address for which block number is needed 300 */ 301static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr) 302{ 303 unsigned boundary, blk, die = 0; 304 305 if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) { 306 die = 1; 307 addr -= this->diesize[0]; 308 } 309 310 boundary = this->boundary[die]; 311 312 blk = addr >> (this->erase_shift - 1); 313 if (blk > boundary) 314 blk = (blk + boundary + 1) >> 1; 315 316 blk += die ? this->density_mask : 0; 317 return blk; 318} 319 320inline unsigned onenand_block(struct onenand_chip *this, loff_t addr) 321{ 322 if (!FLEXONENAND(this)) 323 return addr >> this->erase_shift; 324 return flexonenand_block(this, addr); 325} 326 327/** 328 * flexonenand_addr - Return address of the block 329 * @this: OneNAND device structure 330 * @block: Block number on Flex-OneNAND 331 * 332 * Return address of the block 333 */ 334static loff_t flexonenand_addr(struct onenand_chip *this, int block) 335{ 336 loff_t ofs = 0; 337 int die = 0, boundary; 338 339 if (ONENAND_IS_DDP(this) && block >= this->density_mask) { 340 block -= this->density_mask; 341 die = 1; 342 ofs = this->diesize[0]; 343 } 344 345 boundary = this->boundary[die]; 346 ofs += (loff_t)block << (this->erase_shift - 1); 347 if (block > (boundary + 1)) 348 ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1); 349 return ofs; 350} 351 352loff_t onenand_addr(struct onenand_chip *this, int block) 353{ 354 if (!FLEXONENAND(this)) 355 return (loff_t)block << this->erase_shift; 356 return flexonenand_addr(this, block); 357} 358EXPORT_SYMBOL(onenand_addr); 359 360/** 361 * onenand_get_density - [DEFAULT] Get OneNAND density 362 * @dev_id: OneNAND device ID 363 * 364 * Get OneNAND density from device ID 365 */ 366static inline int onenand_get_density(int dev_id) 367{ 368 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT; 369 return (density & ONENAND_DEVICE_DENSITY_MASK); 370} 371 372/** 373 * flexonenand_region - [Flex-OneNAND] Return erase region of addr 374 * @mtd: MTD device structure 375 * @addr: address whose erase region needs to be identified 376 */ 377int flexonenand_region(struct mtd_info *mtd, loff_t addr) 378{ 379 int i; 380 381 for (i = 0; i < mtd->numeraseregions; i++) 382 if (addr < mtd->eraseregions[i].offset) 383 break; 384 return i - 1; 385} 386EXPORT_SYMBOL(flexonenand_region); 387 388/** 389 * onenand_command - [DEFAULT] Send command to OneNAND device 390 * @mtd: MTD device structure 391 * @cmd: the command to be sent 392 * @addr: offset to read from or write to 393 * @len: number of bytes to read or write 394 * 395 * Send command to OneNAND device. This function is used for middle/large page 396 * devices (1KB/2KB Bytes per page) 397 */ 398static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len) 399{ 400 struct onenand_chip *this = mtd->priv; 401 int value, block, page; 402 403 /* Address translation */ 404 switch (cmd) { 405 case ONENAND_CMD_UNLOCK: 406 case ONENAND_CMD_LOCK: 407 case ONENAND_CMD_LOCK_TIGHT: 408 case ONENAND_CMD_UNLOCK_ALL: 409 block = -1; 410 page = -1; 411 break; 412 413 case FLEXONENAND_CMD_PI_ACCESS: 414 /* addr contains die index */ 415 block = addr * this->density_mask; 416 page = -1; 417 break; 418 419 case ONENAND_CMD_ERASE: 420 case ONENAND_CMD_MULTIBLOCK_ERASE: 421 case ONENAND_CMD_ERASE_VERIFY: 422 case ONENAND_CMD_BUFFERRAM: 423 case ONENAND_CMD_OTP_ACCESS: 424 block = onenand_block(this, addr); 425 page = -1; 426 break; 427 428 case FLEXONENAND_CMD_READ_PI: 429 cmd = ONENAND_CMD_READ; 430 block = addr * this->density_mask; 431 page = 0; 432 break; 433 434 default: 435 block = onenand_block(this, addr); 436 if (FLEXONENAND(this)) 437 page = (int) (addr - onenand_addr(this, block))>>\ 438 this->page_shift; 439 else 440 page = (int) (addr >> this->page_shift); 441 if (ONENAND_IS_2PLANE(this)) { 442 /* Make the even block number */ 443 block &= ~1; 444 /* Is it the odd plane? */ 445 if (addr & this->writesize) 446 block++; 447 page >>= 1; 448 } 449 page &= this->page_mask; 450 break; 451 } 452 453 /* NOTE: The setting order of the registers is very important! */ 454 if (cmd == ONENAND_CMD_BUFFERRAM) { 455 /* Select DataRAM for DDP */ 456 value = onenand_bufferram_address(this, block); 457 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 458 459 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this)) 460 /* It is always BufferRAM0 */ 461 ONENAND_SET_BUFFERRAM0(this); 462 else 463 /* Switch to the next data buffer */ 464 ONENAND_SET_NEXT_BUFFERRAM(this); 465 466 return 0; 467 } 468 469 if (block != -1) { 470 /* Write 'DFS, FBA' of Flash */ 471 value = onenand_block_address(this, block); 472 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 473 474 /* Select DataRAM for DDP */ 475 value = onenand_bufferram_address(this, block); 476 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 477 } 478 479 if (page != -1) { 480 /* Now we use page size operation */ 481 int sectors = 0, count = 0; 482 int dataram; 483 484 switch (cmd) { 485 case FLEXONENAND_CMD_RECOVER_LSB: 486 case ONENAND_CMD_READ: 487 case ONENAND_CMD_READOOB: 488 if (ONENAND_IS_4KB_PAGE(this)) 489 /* It is always BufferRAM0 */ 490 dataram = ONENAND_SET_BUFFERRAM0(this); 491 else 492 dataram = ONENAND_SET_NEXT_BUFFERRAM(this); 493 break; 494 495 default: 496 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG) 497 cmd = ONENAND_CMD_2X_PROG; 498 dataram = ONENAND_CURRENT_BUFFERRAM(this); 499 break; 500 } 501 502 /* Write 'FPA, FSA' of Flash */ 503 value = onenand_page_address(page, sectors); 504 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8); 505 506 /* Write 'BSA, BSC' of DataRAM */ 507 value = onenand_buffer_address(dataram, sectors, count); 508 this->write_word(value, this->base + ONENAND_REG_START_BUFFER); 509 } 510 511 /* Interrupt clear */ 512 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); 513 514 /* Write command */ 515 this->write_word(cmd, this->base + ONENAND_REG_COMMAND); 516 517 return 0; 518} 519 520/** 521 * onenand_read_ecc - return ecc status 522 * @this: onenand chip structure 523 */ 524static inline int onenand_read_ecc(struct onenand_chip *this) 525{ 526 int ecc, i, result = 0; 527 528 if (!FLEXONENAND(this) && !ONENAND_IS_4KB_PAGE(this)) 529 return this->read_word(this->base + ONENAND_REG_ECC_STATUS); 530 531 for (i = 0; i < 4; i++) { 532 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i*2); 533 if (likely(!ecc)) 534 continue; 535 if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR) 536 return ONENAND_ECC_2BIT_ALL; 537 else 538 result = ONENAND_ECC_1BIT_ALL; 539 } 540 541 return result; 542} 543 544/** 545 * onenand_wait - [DEFAULT] wait until the command is done 546 * @mtd: MTD device structure 547 * @state: state to select the max. timeout value 548 * 549 * Wait for command done. This applies to all OneNAND command 550 * Read can take up to 30us, erase up to 2ms and program up to 350us 551 * according to general OneNAND specs 552 */ 553static int onenand_wait(struct mtd_info *mtd, int state) 554{ 555 struct onenand_chip * this = mtd->priv; 556 unsigned long timeout; 557 unsigned int flags = ONENAND_INT_MASTER; 558 unsigned int interrupt = 0; 559 unsigned int ctrl; 560 561 /* The 20 msec is enough */ 562 timeout = jiffies + msecs_to_jiffies(20); 563 while (time_before(jiffies, timeout)) { 564 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 565 566 if (interrupt & flags) 567 break; 568 569 if (state != FL_READING && state != FL_PREPARING_ERASE) 570 cond_resched(); 571 } 572 /* To get correct interrupt status in timeout case */ 573 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 574 575 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 576 577 /* 578 * In the Spec. it checks the controller status first 579 * However if you get the correct information in case of 580 * power off recovery (POR) test, it should read ECC status first 581 */ 582 if (interrupt & ONENAND_INT_READ) { 583 int ecc = onenand_read_ecc(this); 584 if (ecc) { 585 if (ecc & ONENAND_ECC_2BIT_ALL) { 586 printk(KERN_ERR "%s: ECC error = 0x%04x\n", 587 __func__, ecc); 588 mtd->ecc_stats.failed++; 589 return -EBADMSG; 590 } else if (ecc & ONENAND_ECC_1BIT_ALL) { 591 printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n", 592 __func__, ecc); 593 mtd->ecc_stats.corrected++; 594 } 595 } 596 } else if (state == FL_READING) { 597 printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n", 598 __func__, ctrl, interrupt); 599 return -EIO; 600 } 601 602 if (state == FL_PREPARING_ERASE && !(interrupt & ONENAND_INT_ERASE)) { 603 printk(KERN_ERR "%s: mb erase timeout! ctrl=0x%04x intr=0x%04x\n", 604 __func__, ctrl, interrupt); 605 return -EIO; 606 } 607 608 if (!(interrupt & ONENAND_INT_MASTER)) { 609 printk(KERN_ERR "%s: timeout! ctrl=0x%04x intr=0x%04x\n", 610 __func__, ctrl, interrupt); 611 return -EIO; 612 } 613 614 /* If there's controller error, it's a real error */ 615 if (ctrl & ONENAND_CTRL_ERROR) { 616 printk(KERN_ERR "%s: controller error = 0x%04x\n", 617 __func__, ctrl); 618 if (ctrl & ONENAND_CTRL_LOCK) 619 printk(KERN_ERR "%s: it's locked error.\n", __func__); 620 return -EIO; 621 } 622 623 return 0; 624} 625 626/* 627 * onenand_interrupt - [DEFAULT] onenand interrupt handler 628 * @irq: onenand interrupt number 629 * @dev_id: interrupt data 630 * 631 * complete the work 632 */ 633static irqreturn_t onenand_interrupt(int irq, void *data) 634{ 635 struct onenand_chip *this = data; 636 637 /* To handle shared interrupt */ 638 if (!this->complete.done) 639 complete(&this->complete); 640 641 return IRQ_HANDLED; 642} 643 644/* 645 * onenand_interrupt_wait - [DEFAULT] wait until the command is done 646 * @mtd: MTD device structure 647 * @state: state to select the max. timeout value 648 * 649 * Wait for command done. 650 */ 651static int onenand_interrupt_wait(struct mtd_info *mtd, int state) 652{ 653 struct onenand_chip *this = mtd->priv; 654 655 wait_for_completion(&this->complete); 656 657 return onenand_wait(mtd, state); 658} 659 660/* 661 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait 662 * @mtd: MTD device structure 663 * @state: state to select the max. timeout value 664 * 665 * Try interrupt based wait (It is used one-time) 666 */ 667static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state) 668{ 669 struct onenand_chip *this = mtd->priv; 670 unsigned long remain, timeout; 671 672 /* We use interrupt wait first */ 673 this->wait = onenand_interrupt_wait; 674 675 timeout = msecs_to_jiffies(100); 676 remain = wait_for_completion_timeout(&this->complete, timeout); 677 if (!remain) { 678 printk(KERN_INFO "OneNAND: There's no interrupt. " 679 "We use the normal wait\n"); 680 681 /* Release the irq */ 682 free_irq(this->irq, this); 683 684 this->wait = onenand_wait; 685 } 686 687 return onenand_wait(mtd, state); 688} 689 690/* 691 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method 692 * @mtd: MTD device structure 693 * 694 * There's two method to wait onenand work 695 * 1. polling - read interrupt status register 696 * 2. interrupt - use the kernel interrupt method 697 */ 698static void onenand_setup_wait(struct mtd_info *mtd) 699{ 700 struct onenand_chip *this = mtd->priv; 701 int syscfg; 702 703 init_completion(&this->complete); 704 705 if (this->irq <= 0) { 706 this->wait = onenand_wait; 707 return; 708 } 709 710 if (request_irq(this->irq, &onenand_interrupt, 711 IRQF_SHARED, "onenand", this)) { 712 /* If we can't get irq, use the normal wait */ 713 this->wait = onenand_wait; 714 return; 715 } 716 717 /* Enable interrupt */ 718 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 719 syscfg |= ONENAND_SYS_CFG1_IOBE; 720 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 721 722 this->wait = onenand_try_interrupt_wait; 723} 724 725/** 726 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset 727 * @mtd: MTD data structure 728 * @area: BufferRAM area 729 * @return offset given area 730 * 731 * Return BufferRAM offset given area 732 */ 733static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area) 734{ 735 struct onenand_chip *this = mtd->priv; 736 737 if (ONENAND_CURRENT_BUFFERRAM(this)) { 738 /* Note: the 'this->writesize' is a real page size */ 739 if (area == ONENAND_DATARAM) 740 return this->writesize; 741 if (area == ONENAND_SPARERAM) 742 return mtd->oobsize; 743 } 744 745 return 0; 746} 747 748/** 749 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area 750 * @mtd: MTD data structure 751 * @area: BufferRAM area 752 * @buffer: the databuffer to put/get data 753 * @offset: offset to read from or write to 754 * @count: number of bytes to read/write 755 * 756 * Read the BufferRAM area 757 */ 758static int onenand_read_bufferram(struct mtd_info *mtd, int area, 759 unsigned char *buffer, int offset, size_t count) 760{ 761 struct onenand_chip *this = mtd->priv; 762 void __iomem *bufferram; 763 764 bufferram = this->base + area; 765 766 bufferram += onenand_bufferram_offset(mtd, area); 767 768 if (ONENAND_CHECK_BYTE_ACCESS(count)) { 769 unsigned short word; 770 771 /* Align with word(16-bit) size */ 772 count--; 773 774 /* Read word and save byte */ 775 word = this->read_word(bufferram + offset + count); 776 buffer[count] = (word & 0xff); 777 } 778 779 memcpy(buffer, bufferram + offset, count); 780 781 return 0; 782} 783 784/** 785 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode 786 * @mtd: MTD data structure 787 * @area: BufferRAM area 788 * @buffer: the databuffer to put/get data 789 * @offset: offset to read from or write to 790 * @count: number of bytes to read/write 791 * 792 * Read the BufferRAM area with Sync. Burst Mode 793 */ 794static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area, 795 unsigned char *buffer, int offset, size_t count) 796{ 797 struct onenand_chip *this = mtd->priv; 798 void __iomem *bufferram; 799 800 bufferram = this->base + area; 801 802 bufferram += onenand_bufferram_offset(mtd, area); 803 804 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ); 805 806 if (ONENAND_CHECK_BYTE_ACCESS(count)) { 807 unsigned short word; 808 809 /* Align with word(16-bit) size */ 810 count--; 811 812 /* Read word and save byte */ 813 word = this->read_word(bufferram + offset + count); 814 buffer[count] = (word & 0xff); 815 } 816 817 memcpy(buffer, bufferram + offset, count); 818 819 this->mmcontrol(mtd, 0); 820 821 return 0; 822} 823 824/** 825 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area 826 * @mtd: MTD data structure 827 * @area: BufferRAM area 828 * @buffer: the databuffer to put/get data 829 * @offset: offset to read from or write to 830 * @count: number of bytes to read/write 831 * 832 * Write the BufferRAM area 833 */ 834static int onenand_write_bufferram(struct mtd_info *mtd, int area, 835 const unsigned char *buffer, int offset, size_t count) 836{ 837 struct onenand_chip *this = mtd->priv; 838 void __iomem *bufferram; 839 840 bufferram = this->base + area; 841 842 bufferram += onenand_bufferram_offset(mtd, area); 843 844 if (ONENAND_CHECK_BYTE_ACCESS(count)) { 845 unsigned short word; 846 int byte_offset; 847 848 /* Align with word(16-bit) size */ 849 count--; 850 851 /* Calculate byte access offset */ 852 byte_offset = offset + count; 853 854 /* Read word and save byte */ 855 word = this->read_word(bufferram + byte_offset); 856 word = (word & ~0xff) | buffer[count]; 857 this->write_word(word, bufferram + byte_offset); 858 } 859 860 memcpy(bufferram + offset, buffer, count); 861 862 return 0; 863} 864 865/** 866 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode 867 * @mtd: MTD data structure 868 * @addr: address to check 869 * @return blockpage address 870 * 871 * Get blockpage address at 2x program mode 872 */ 873static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr) 874{ 875 struct onenand_chip *this = mtd->priv; 876 int blockpage, block, page; 877 878 /* Calculate the even block number */ 879 block = (int) (addr >> this->erase_shift) & ~1; 880 /* Is it the odd plane? */ 881 if (addr & this->writesize) 882 block++; 883 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask; 884 blockpage = (block << 7) | page; 885 886 return blockpage; 887} 888 889/** 890 * onenand_check_bufferram - [GENERIC] Check BufferRAM information 891 * @mtd: MTD data structure 892 * @addr: address to check 893 * @return 1 if there are valid data, otherwise 0 894 * 895 * Check bufferram if there is data we required 896 */ 897static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr) 898{ 899 struct onenand_chip *this = mtd->priv; 900 int blockpage, found = 0; 901 unsigned int i; 902 903 if (ONENAND_IS_2PLANE(this)) 904 blockpage = onenand_get_2x_blockpage(mtd, addr); 905 else 906 blockpage = (int) (addr >> this->page_shift); 907 908 /* Is there valid data? */ 909 i = ONENAND_CURRENT_BUFFERRAM(this); 910 if (this->bufferram[i].blockpage == blockpage) 911 found = 1; 912 else { 913 /* Check another BufferRAM */ 914 i = ONENAND_NEXT_BUFFERRAM(this); 915 if (this->bufferram[i].blockpage == blockpage) { 916 ONENAND_SET_NEXT_BUFFERRAM(this); 917 found = 1; 918 } 919 } 920 921 if (found && ONENAND_IS_DDP(this)) { 922 /* Select DataRAM for DDP */ 923 int block = onenand_block(this, addr); 924 int value = onenand_bufferram_address(this, block); 925 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 926 } 927 928 return found; 929} 930 931/** 932 * onenand_update_bufferram - [GENERIC] Update BufferRAM information 933 * @mtd: MTD data structure 934 * @addr: address to update 935 * @valid: valid flag 936 * 937 * Update BufferRAM information 938 */ 939static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr, 940 int valid) 941{ 942 struct onenand_chip *this = mtd->priv; 943 int blockpage; 944 unsigned int i; 945 946 if (ONENAND_IS_2PLANE(this)) 947 blockpage = onenand_get_2x_blockpage(mtd, addr); 948 else 949 blockpage = (int) (addr >> this->page_shift); 950 951 /* Invalidate another BufferRAM */ 952 i = ONENAND_NEXT_BUFFERRAM(this); 953 if (this->bufferram[i].blockpage == blockpage) 954 this->bufferram[i].blockpage = -1; 955 956 /* Update BufferRAM */ 957 i = ONENAND_CURRENT_BUFFERRAM(this); 958 if (valid) 959 this->bufferram[i].blockpage = blockpage; 960 else 961 this->bufferram[i].blockpage = -1; 962} 963 964/** 965 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information 966 * @mtd: MTD data structure 967 * @addr: start address to invalidate 968 * @len: length to invalidate 969 * 970 * Invalidate BufferRAM information 971 */ 972static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr, 973 unsigned int len) 974{ 975 struct onenand_chip *this = mtd->priv; 976 int i; 977 loff_t end_addr = addr + len; 978 979 /* Invalidate BufferRAM */ 980 for (i = 0; i < MAX_BUFFERRAM; i++) { 981 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift; 982 if (buf_addr >= addr && buf_addr < end_addr) 983 this->bufferram[i].blockpage = -1; 984 } 985} 986 987/** 988 * onenand_get_device - [GENERIC] Get chip for selected access 989 * @mtd: MTD device structure 990 * @new_state: the state which is requested 991 * 992 * Get the device and lock it for exclusive access 993 */ 994static int onenand_get_device(struct mtd_info *mtd, int new_state) 995{ 996 struct onenand_chip *this = mtd->priv; 997 DECLARE_WAITQUEUE(wait, current); 998 999 /* 1000 * Grab the lock and see if the device is available 1001 */ 1002 while (1) { 1003 spin_lock(&this->chip_lock); 1004 if (this->state == FL_READY) { 1005 this->state = new_state; 1006 spin_unlock(&this->chip_lock); 1007 if (new_state != FL_PM_SUSPENDED && this->enable) 1008 this->enable(mtd); 1009 break; 1010 } 1011 if (new_state == FL_PM_SUSPENDED) { 1012 spin_unlock(&this->chip_lock); 1013 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; 1014 } 1015 set_current_state(TASK_UNINTERRUPTIBLE); 1016 add_wait_queue(&this->wq, &wait); 1017 spin_unlock(&this->chip_lock); 1018 schedule(); 1019 remove_wait_queue(&this->wq, &wait); 1020 } 1021 1022 return 0; 1023} 1024 1025/** 1026 * onenand_release_device - [GENERIC] release chip 1027 * @mtd: MTD device structure 1028 * 1029 * Deselect, release chip lock and wake up anyone waiting on the device 1030 */ 1031static void onenand_release_device(struct mtd_info *mtd) 1032{ 1033 struct onenand_chip *this = mtd->priv; 1034 1035 if (this->state != FL_PM_SUSPENDED && this->disable) 1036 this->disable(mtd); 1037 /* Release the chip */ 1038 spin_lock(&this->chip_lock); 1039 this->state = FL_READY; 1040 wake_up(&this->wq); 1041 spin_unlock(&this->chip_lock); 1042} 1043 1044/** 1045 * onenand_transfer_auto_oob - [INTERN] oob auto-placement transfer 1046 * @mtd: MTD device structure 1047 * @buf: destination address 1048 * @column: oob offset to read from 1049 * @thislen: oob length to read 1050 */ 1051static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column, 1052 int thislen) 1053{ 1054 struct onenand_chip *this = mtd->priv; 1055 1056 this->read_bufferram(mtd, ONENAND_SPARERAM, this->oob_buf, 0, 1057 mtd->oobsize); 1058 return mtd_ooblayout_get_databytes(mtd, buf, this->oob_buf, 1059 column, thislen); 1060} 1061 1062/** 1063 * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data 1064 * @mtd: MTD device structure 1065 * @addr: address to recover 1066 * @status: return value from onenand_wait / onenand_bbt_wait 1067 * 1068 * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has 1069 * lower page address and MSB page has higher page address in paired pages. 1070 * If power off occurs during MSB page program, the paired LSB page data can 1071 * become corrupt. LSB page recovery read is a way to read LSB page though page 1072 * data are corrupted. When uncorrectable error occurs as a result of LSB page 1073 * read after power up, issue LSB page recovery read. 1074 */ 1075static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status) 1076{ 1077 struct onenand_chip *this = mtd->priv; 1078 int i; 1079 1080 /* Recovery is only for Flex-OneNAND */ 1081 if (!FLEXONENAND(this)) 1082 return status; 1083 1084 /* check if we failed due to uncorrectable error */ 1085 if (!mtd_is_eccerr(status) && status != ONENAND_BBT_READ_ECC_ERROR) 1086 return status; 1087 1088 /* check if address lies in MLC region */ 1089 i = flexonenand_region(mtd, addr); 1090 if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift)) 1091 return status; 1092 1093 /* We are attempting to reread, so decrement stats.failed 1094 * which was incremented by onenand_wait due to read failure 1095 */ 1096 printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n", 1097 __func__); 1098 mtd->ecc_stats.failed--; 1099 1100 /* Issue the LSB page recovery command */ 1101 this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize); 1102 return this->wait(mtd, FL_READING); 1103} 1104 1105/** 1106 * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band 1107 * @mtd: MTD device structure 1108 * @from: offset to read from 1109 * @ops: oob operation description structure 1110 * 1111 * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram. 1112 * So, read-while-load is not present. 1113 */ 1114static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from, 1115 struct mtd_oob_ops *ops) 1116{ 1117 struct onenand_chip *this = mtd->priv; 1118 struct mtd_ecc_stats stats; 1119 size_t len = ops->len; 1120 size_t ooblen = ops->ooblen; 1121 u_char *buf = ops->datbuf; 1122 u_char *oobbuf = ops->oobbuf; 1123 int read = 0, column, thislen; 1124 int oobread = 0, oobcolumn, thisooblen, oobsize; 1125 int ret = 0; 1126 int writesize = this->writesize; 1127 1128 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from, 1129 (int)len); 1130 1131 oobsize = mtd_oobavail(mtd, ops); 1132 oobcolumn = from & (mtd->oobsize - 1); 1133 1134 /* Do not allow reads past end of device */ 1135 if (from + len > mtd->size) { 1136 printk(KERN_ERR "%s: Attempt read beyond end of device\n", 1137 __func__); 1138 ops->retlen = 0; 1139 ops->oobretlen = 0; 1140 return -EINVAL; 1141 } 1142 1143 stats = mtd->ecc_stats; 1144 1145 while (read < len) { 1146 cond_resched(); 1147 1148 thislen = min_t(int, writesize, len - read); 1149 1150 column = from & (writesize - 1); 1151 if (column + thislen > writesize) 1152 thislen = writesize - column; 1153 1154 if (!onenand_check_bufferram(mtd, from)) { 1155 this->command(mtd, ONENAND_CMD_READ, from, writesize); 1156 1157 ret = this->wait(mtd, FL_READING); 1158 if (unlikely(ret)) 1159 ret = onenand_recover_lsb(mtd, from, ret); 1160 onenand_update_bufferram(mtd, from, !ret); 1161 if (mtd_is_eccerr(ret)) 1162 ret = 0; 1163 if (ret) 1164 break; 1165 } 1166 1167 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen); 1168 if (oobbuf) { 1169 thisooblen = oobsize - oobcolumn; 1170 thisooblen = min_t(int, thisooblen, ooblen - oobread); 1171 1172 if (ops->mode == MTD_OPS_AUTO_OOB) 1173 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen); 1174 else 1175 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen); 1176 oobread += thisooblen; 1177 oobbuf += thisooblen; 1178 oobcolumn = 0; 1179 } 1180 1181 read += thislen; 1182 if (read == len) 1183 break; 1184 1185 from += thislen; 1186 buf += thislen; 1187 } 1188 1189 /* 1190 * Return success, if no ECC failures, else -EBADMSG 1191 * fs driver will take care of that, because 1192 * retlen == desired len and result == -EBADMSG 1193 */ 1194 ops->retlen = read; 1195 ops->oobretlen = oobread; 1196 1197 if (ret) 1198 return ret; 1199 1200 if (mtd->ecc_stats.failed - stats.failed) 1201 return -EBADMSG; 1202 1203 /* return max bitflips per ecc step; ONENANDs correct 1 bit only */ 1204 return mtd->ecc_stats.corrected != stats.corrected ? 1 : 0; 1205} 1206 1207/** 1208 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band 1209 * @mtd: MTD device structure 1210 * @from: offset to read from 1211 * @ops: oob operation description structure 1212 * 1213 * OneNAND read main and/or out-of-band data 1214 */ 1215static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from, 1216 struct mtd_oob_ops *ops) 1217{ 1218 struct onenand_chip *this = mtd->priv; 1219 struct mtd_ecc_stats stats; 1220 size_t len = ops->len; 1221 size_t ooblen = ops->ooblen; 1222 u_char *buf = ops->datbuf; 1223 u_char *oobbuf = ops->oobbuf; 1224 int read = 0, column, thislen; 1225 int oobread = 0, oobcolumn, thisooblen, oobsize; 1226 int ret = 0, boundary = 0; 1227 int writesize = this->writesize; 1228 1229 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from, 1230 (int)len); 1231 1232 oobsize = mtd_oobavail(mtd, ops); 1233 oobcolumn = from & (mtd->oobsize - 1); 1234 1235 /* Do not allow reads past end of device */ 1236 if ((from + len) > mtd->size) { 1237 printk(KERN_ERR "%s: Attempt read beyond end of device\n", 1238 __func__); 1239 ops->retlen = 0; 1240 ops->oobretlen = 0; 1241 return -EINVAL; 1242 } 1243 1244 stats = mtd->ecc_stats; 1245 1246 /* Read-while-load method */ 1247 1248 /* Do first load to bufferRAM */ 1249 if (read < len) { 1250 if (!onenand_check_bufferram(mtd, from)) { 1251 this->command(mtd, ONENAND_CMD_READ, from, writesize); 1252 ret = this->wait(mtd, FL_READING); 1253 onenand_update_bufferram(mtd, from, !ret); 1254 if (mtd_is_eccerr(ret)) 1255 ret = 0; 1256 } 1257 } 1258 1259 thislen = min_t(int, writesize, len - read); 1260 column = from & (writesize - 1); 1261 if (column + thislen > writesize) 1262 thislen = writesize - column; 1263 1264 while (!ret) { 1265 /* If there is more to load then start next load */ 1266 from += thislen; 1267 if (read + thislen < len) { 1268 this->command(mtd, ONENAND_CMD_READ, from, writesize); 1269 /* 1270 * Chip boundary handling in DDP 1271 * Now we issued chip 1 read and pointed chip 1 1272 * bufferram so we have to point chip 0 bufferram. 1273 */ 1274 if (ONENAND_IS_DDP(this) && 1275 unlikely(from == (this->chipsize >> 1))) { 1276 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2); 1277 boundary = 1; 1278 } else 1279 boundary = 0; 1280 ONENAND_SET_PREV_BUFFERRAM(this); 1281 } 1282 /* While load is going, read from last bufferRAM */ 1283 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen); 1284 1285 /* Read oob area if needed */ 1286 if (oobbuf) { 1287 thisooblen = oobsize - oobcolumn; 1288 thisooblen = min_t(int, thisooblen, ooblen - oobread); 1289 1290 if (ops->mode == MTD_OPS_AUTO_OOB) 1291 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen); 1292 else 1293 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen); 1294 oobread += thisooblen; 1295 oobbuf += thisooblen; 1296 oobcolumn = 0; 1297 } 1298 1299 /* See if we are done */ 1300 read += thislen; 1301 if (read == len) 1302 break; 1303 /* Set up for next read from bufferRAM */ 1304 if (unlikely(boundary)) 1305 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2); 1306 ONENAND_SET_NEXT_BUFFERRAM(this); 1307 buf += thislen; 1308 thislen = min_t(int, writesize, len - read); 1309 column = 0; 1310 cond_resched(); 1311 /* Now wait for load */ 1312 ret = this->wait(mtd, FL_READING); 1313 onenand_update_bufferram(mtd, from, !ret); 1314 if (mtd_is_eccerr(ret)) 1315 ret = 0; 1316 } 1317 1318 /* 1319 * Return success, if no ECC failures, else -EBADMSG 1320 * fs driver will take care of that, because 1321 * retlen == desired len and result == -EBADMSG 1322 */ 1323 ops->retlen = read; 1324 ops->oobretlen = oobread; 1325 1326 if (ret) 1327 return ret; 1328 1329 if (mtd->ecc_stats.failed - stats.failed) 1330 return -EBADMSG; 1331 1332 /* return max bitflips per ecc step; ONENANDs correct 1 bit only */ 1333 return mtd->ecc_stats.corrected != stats.corrected ? 1 : 0; 1334} 1335 1336/** 1337 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band 1338 * @mtd: MTD device structure 1339 * @from: offset to read from 1340 * @ops: oob operation description structure 1341 * 1342 * OneNAND read out-of-band data from the spare area 1343 */ 1344static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from, 1345 struct mtd_oob_ops *ops) 1346{ 1347 struct onenand_chip *this = mtd->priv; 1348 struct mtd_ecc_stats stats; 1349 int read = 0, thislen, column, oobsize; 1350 size_t len = ops->ooblen; 1351 unsigned int mode = ops->mode; 1352 u_char *buf = ops->oobbuf; 1353 int ret = 0, readcmd; 1354 1355 from += ops->ooboffs; 1356 1357 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from, 1358 (int)len); 1359 1360 /* Initialize return length value */ 1361 ops->oobretlen = 0; 1362 1363 if (mode == MTD_OPS_AUTO_OOB) 1364 oobsize = mtd->oobavail; 1365 else 1366 oobsize = mtd->oobsize; 1367 1368 column = from & (mtd->oobsize - 1); 1369 1370 if (unlikely(column >= oobsize)) { 1371 printk(KERN_ERR "%s: Attempted to start read outside oob\n", 1372 __func__); 1373 return -EINVAL; 1374 } 1375 1376 stats = mtd->ecc_stats; 1377 1378 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1379 1380 while (read < len) { 1381 cond_resched(); 1382 1383 thislen = oobsize - column; 1384 thislen = min_t(int, thislen, len); 1385 1386 this->command(mtd, readcmd, from, mtd->oobsize); 1387 1388 onenand_update_bufferram(mtd, from, 0); 1389 1390 ret = this->wait(mtd, FL_READING); 1391 if (unlikely(ret)) 1392 ret = onenand_recover_lsb(mtd, from, ret); 1393 1394 if (ret && !mtd_is_eccerr(ret)) { 1395 printk(KERN_ERR "%s: read failed = 0x%x\n", 1396 __func__, ret); 1397 break; 1398 } 1399 1400 if (mode == MTD_OPS_AUTO_OOB) 1401 onenand_transfer_auto_oob(mtd, buf, column, thislen); 1402 else 1403 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen); 1404 1405 read += thislen; 1406 1407 if (read == len) 1408 break; 1409 1410 buf += thislen; 1411 1412 /* Read more? */ 1413 if (read < len) { 1414 /* Page size */ 1415 from += mtd->writesize; 1416 column = 0; 1417 } 1418 } 1419 1420 ops->oobretlen = read; 1421 1422 if (ret) 1423 return ret; 1424 1425 if (mtd->ecc_stats.failed - stats.failed) 1426 return -EBADMSG; 1427 1428 return 0; 1429} 1430 1431/** 1432 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band 1433 * @mtd: MTD device structure 1434 * @from: offset to read from 1435 * @ops: oob operation description structure 1436 * 1437 * Read main and/or out-of-band 1438 */ 1439static int onenand_read_oob(struct mtd_info *mtd, loff_t from, 1440 struct mtd_oob_ops *ops) 1441{ 1442 struct onenand_chip *this = mtd->priv; 1443 struct mtd_ecc_stats old_stats; 1444 int ret; 1445 1446 switch (ops->mode) { 1447 case MTD_OPS_PLACE_OOB: 1448 case MTD_OPS_AUTO_OOB: 1449 break; 1450 case MTD_OPS_RAW: 1451 /* Not implemented yet */ 1452 default: 1453 return -EINVAL; 1454 } 1455 1456 onenand_get_device(mtd, FL_READING); 1457 1458 old_stats = mtd->ecc_stats; 1459 1460 if (ops->datbuf) 1461 ret = ONENAND_IS_4KB_PAGE(this) ? 1462 onenand_mlc_read_ops_nolock(mtd, from, ops) : 1463 onenand_read_ops_nolock(mtd, from, ops); 1464 else 1465 ret = onenand_read_oob_nolock(mtd, from, ops); 1466 1467 if (ops->stats) { 1468 ops->stats->uncorrectable_errors += 1469 mtd->ecc_stats.failed - old_stats.failed; 1470 ops->stats->corrected_bitflips += 1471 mtd->ecc_stats.corrected - old_stats.corrected; 1472 } 1473 1474 onenand_release_device(mtd); 1475 1476 return ret; 1477} 1478 1479/** 1480 * onenand_bbt_wait - [DEFAULT] wait until the command is done 1481 * @mtd: MTD device structure 1482 * @state: state to select the max. timeout value 1483 * 1484 * Wait for command done. 1485 */ 1486static int onenand_bbt_wait(struct mtd_info *mtd, int state) 1487{ 1488 struct onenand_chip *this = mtd->priv; 1489 unsigned long timeout; 1490 unsigned int interrupt, ctrl, ecc, addr1, addr8; 1491 1492 /* The 20 msec is enough */ 1493 timeout = jiffies + msecs_to_jiffies(20); 1494 while (time_before(jiffies, timeout)) { 1495 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1496 if (interrupt & ONENAND_INT_MASTER) 1497 break; 1498 } 1499 /* To get correct interrupt status in timeout case */ 1500 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1501 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 1502 addr1 = this->read_word(this->base + ONENAND_REG_START_ADDRESS1); 1503 addr8 = this->read_word(this->base + ONENAND_REG_START_ADDRESS8); 1504 1505 if (interrupt & ONENAND_INT_READ) { 1506 ecc = onenand_read_ecc(this); 1507 if (ecc & ONENAND_ECC_2BIT_ALL) { 1508 printk(KERN_DEBUG "%s: ecc 0x%04x ctrl 0x%04x " 1509 "intr 0x%04x addr1 %#x addr8 %#x\n", 1510 __func__, ecc, ctrl, interrupt, addr1, addr8); 1511 return ONENAND_BBT_READ_ECC_ERROR; 1512 } 1513 } else { 1514 printk(KERN_ERR "%s: read timeout! ctrl 0x%04x " 1515 "intr 0x%04x addr1 %#x addr8 %#x\n", 1516 __func__, ctrl, interrupt, addr1, addr8); 1517 return ONENAND_BBT_READ_FATAL_ERROR; 1518 } 1519 1520 /* Initial bad block case: 0x2400 or 0x0400 */ 1521 if (ctrl & ONENAND_CTRL_ERROR) { 1522 printk(KERN_DEBUG "%s: ctrl 0x%04x intr 0x%04x addr1 %#x " 1523 "addr8 %#x\n", __func__, ctrl, interrupt, addr1, addr8); 1524 return ONENAND_BBT_READ_ERROR; 1525 } 1526 1527 return 0; 1528} 1529 1530/** 1531 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan 1532 * @mtd: MTD device structure 1533 * @from: offset to read from 1534 * @ops: oob operation description structure 1535 * 1536 * OneNAND read out-of-band data from the spare area for bbt scan 1537 */ 1538int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from, 1539 struct mtd_oob_ops *ops) 1540{ 1541 struct onenand_chip *this = mtd->priv; 1542 int read = 0, thislen, column; 1543 int ret = 0, readcmd; 1544 size_t len = ops->ooblen; 1545 u_char *buf = ops->oobbuf; 1546 1547 pr_debug("%s: from = 0x%08x, len = %zi\n", __func__, (unsigned int)from, 1548 len); 1549 1550 /* Initialize return value */ 1551 ops->oobretlen = 0; 1552 1553 /* Do not allow reads past end of device */ 1554 if (unlikely((from + len) > mtd->size)) { 1555 printk(KERN_ERR "%s: Attempt read beyond end of device\n", 1556 __func__); 1557 return ONENAND_BBT_READ_FATAL_ERROR; 1558 } 1559 1560 /* Grab the lock and see if the device is available */ 1561 onenand_get_device(mtd, FL_READING); 1562 1563 column = from & (mtd->oobsize - 1); 1564 1565 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1566 1567 while (read < len) { 1568 cond_resched(); 1569 1570 thislen = mtd->oobsize - column; 1571 thislen = min_t(int, thislen, len); 1572 1573 this->command(mtd, readcmd, from, mtd->oobsize); 1574 1575 onenand_update_bufferram(mtd, from, 0); 1576 1577 ret = this->bbt_wait(mtd, FL_READING); 1578 if (unlikely(ret)) 1579 ret = onenand_recover_lsb(mtd, from, ret); 1580 1581 if (ret) 1582 break; 1583 1584 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen); 1585 read += thislen; 1586 if (read == len) 1587 break; 1588 1589 buf += thislen; 1590 1591 /* Read more? */ 1592 if (read < len) { 1593 /* Update Page size */ 1594 from += this->writesize; 1595 column = 0; 1596 } 1597 } 1598 1599 /* Deselect and wake up anyone waiting on the device */ 1600 onenand_release_device(mtd); 1601 1602 ops->oobretlen = read; 1603 return ret; 1604} 1605 1606#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE 1607/** 1608 * onenand_verify_oob - [GENERIC] verify the oob contents after a write 1609 * @mtd: MTD device structure 1610 * @buf: the databuffer to verify 1611 * @to: offset to read from 1612 */ 1613static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to) 1614{ 1615 struct onenand_chip *this = mtd->priv; 1616 u_char *oob_buf = this->oob_buf; 1617 int status, i, readcmd; 1618 1619 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; 1620 1621 this->command(mtd, readcmd, to, mtd->oobsize); 1622 onenand_update_bufferram(mtd, to, 0); 1623 status = this->wait(mtd, FL_READING); 1624 if (status) 1625 return status; 1626 1627 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize); 1628 for (i = 0; i < mtd->oobsize; i++) 1629 if (buf[i] != 0xFF && buf[i] != oob_buf[i]) 1630 return -EBADMSG; 1631 1632 return 0; 1633} 1634 1635/** 1636 * onenand_verify - [GENERIC] verify the chip contents after a write 1637 * @mtd: MTD device structure 1638 * @buf: the databuffer to verify 1639 * @addr: offset to read from 1640 * @len: number of bytes to read and compare 1641 */ 1642static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len) 1643{ 1644 struct onenand_chip *this = mtd->priv; 1645 int ret = 0; 1646 int thislen, column; 1647 1648 column = addr & (this->writesize - 1); 1649 1650 while (len != 0) { 1651 thislen = min_t(int, this->writesize - column, len); 1652 1653 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize); 1654 1655 onenand_update_bufferram(mtd, addr, 0); 1656 1657 ret = this->wait(mtd, FL_READING); 1658 if (ret) 1659 return ret; 1660 1661 onenand_update_bufferram(mtd, addr, 1); 1662 1663 this->read_bufferram(mtd, ONENAND_DATARAM, this->verify_buf, 0, mtd->writesize); 1664 1665 if (memcmp(buf, this->verify_buf + column, thislen)) 1666 return -EBADMSG; 1667 1668 len -= thislen; 1669 buf += thislen; 1670 addr += thislen; 1671 column = 0; 1672 } 1673 1674 return 0; 1675} 1676#else 1677#define onenand_verify(...) (0) 1678#define onenand_verify_oob(...) (0) 1679#endif 1680 1681#define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0) 1682 1683static void onenand_panic_wait(struct mtd_info *mtd) 1684{ 1685 struct onenand_chip *this = mtd->priv; 1686 unsigned int interrupt; 1687 int i; 1688 1689 for (i = 0; i < 2000; i++) { 1690 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 1691 if (interrupt & ONENAND_INT_MASTER) 1692 break; 1693 udelay(10); 1694 } 1695} 1696 1697/** 1698 * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context 1699 * @mtd: MTD device structure 1700 * @to: offset to write to 1701 * @len: number of bytes to write 1702 * @retlen: pointer to variable to store the number of written bytes 1703 * @buf: the data to write 1704 * 1705 * Write with ECC 1706 */ 1707static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len, 1708 size_t *retlen, const u_char *buf) 1709{ 1710 struct onenand_chip *this = mtd->priv; 1711 int column, subpage; 1712 int written = 0; 1713 1714 if (this->state == FL_PM_SUSPENDED) 1715 return -EBUSY; 1716 1717 /* Wait for any existing operation to clear */ 1718 onenand_panic_wait(mtd); 1719 1720 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to, 1721 (int)len); 1722 1723 /* Reject writes, which are not page aligned */ 1724 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) { 1725 printk(KERN_ERR "%s: Attempt to write not page aligned data\n", 1726 __func__); 1727 return -EINVAL; 1728 } 1729 1730 column = to & (mtd->writesize - 1); 1731 1732 /* Loop until all data write */ 1733 while (written < len) { 1734 int thislen = min_t(int, mtd->writesize - column, len - written); 1735 u_char *wbuf = (u_char *) buf; 1736 1737 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen); 1738 1739 /* Partial page write */ 1740 subpage = thislen < mtd->writesize; 1741 if (subpage) { 1742 memset(this->page_buf, 0xff, mtd->writesize); 1743 memcpy(this->page_buf + column, buf, thislen); 1744 wbuf = this->page_buf; 1745 } 1746 1747 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize); 1748 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize); 1749 1750 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize); 1751 1752 onenand_panic_wait(mtd); 1753 1754 /* In partial page write we don't update bufferram */ 1755 onenand_update_bufferram(mtd, to, !subpage); 1756 if (ONENAND_IS_2PLANE(this)) { 1757 ONENAND_SET_BUFFERRAM1(this); 1758 onenand_update_bufferram(mtd, to + this->writesize, !subpage); 1759 } 1760 1761 written += thislen; 1762 1763 if (written == len) 1764 break; 1765 1766 column = 0; 1767 to += thislen; 1768 buf += thislen; 1769 } 1770 1771 *retlen = written; 1772 return 0; 1773} 1774 1775/** 1776 * onenand_fill_auto_oob - [INTERN] oob auto-placement transfer 1777 * @mtd: MTD device structure 1778 * @oob_buf: oob buffer 1779 * @buf: source address 1780 * @column: oob offset to write to 1781 * @thislen: oob length to write 1782 */ 1783static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf, 1784 const u_char *buf, int column, int thislen) 1785{ 1786 return mtd_ooblayout_set_databytes(mtd, buf, oob_buf, column, thislen); 1787} 1788 1789/** 1790 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band 1791 * @mtd: MTD device structure 1792 * @to: offset to write to 1793 * @ops: oob operation description structure 1794 * 1795 * Write main and/or oob with ECC 1796 */ 1797static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to, 1798 struct mtd_oob_ops *ops) 1799{ 1800 struct onenand_chip *this = mtd->priv; 1801 int written = 0, column, thislen = 0, subpage = 0; 1802 int prev = 0, prevlen = 0, prev_subpage = 0, first = 1; 1803 int oobwritten = 0, oobcolumn, thisooblen, oobsize; 1804 size_t len = ops->len; 1805 size_t ooblen = ops->ooblen; 1806 const u_char *buf = ops->datbuf; 1807 const u_char *oob = ops->oobbuf; 1808 u_char *oobbuf; 1809 int ret = 0, cmd; 1810 1811 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to, 1812 (int)len); 1813 1814 /* Initialize retlen, in case of early exit */ 1815 ops->retlen = 0; 1816 ops->oobretlen = 0; 1817 1818 /* Reject writes, which are not page aligned */ 1819 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) { 1820 printk(KERN_ERR "%s: Attempt to write not page aligned data\n", 1821 __func__); 1822 return -EINVAL; 1823 } 1824 1825 /* Check zero length */ 1826 if (!len) 1827 return 0; 1828 oobsize = mtd_oobavail(mtd, ops); 1829 oobcolumn = to & (mtd->oobsize - 1); 1830 1831 column = to & (mtd->writesize - 1); 1832 1833 /* Loop until all data write */ 1834 while (1) { 1835 if (written < len) { 1836 u_char *wbuf = (u_char *) buf; 1837 1838 thislen = min_t(int, mtd->writesize - column, len - written); 1839 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten); 1840 1841 cond_resched(); 1842 1843 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen); 1844 1845 /* Partial page write */ 1846 subpage = thislen < mtd->writesize; 1847 if (subpage) { 1848 memset(this->page_buf, 0xff, mtd->writesize); 1849 memcpy(this->page_buf + column, buf, thislen); 1850 wbuf = this->page_buf; 1851 } 1852 1853 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize); 1854 1855 if (oob) { 1856 oobbuf = this->oob_buf; 1857 1858 /* We send data to spare ram with oobsize 1859 * to prevent byte access */ 1860 memset(oobbuf, 0xff, mtd->oobsize); 1861 if (ops->mode == MTD_OPS_AUTO_OOB) 1862 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen); 1863 else 1864 memcpy(oobbuf + oobcolumn, oob, thisooblen); 1865 1866 oobwritten += thisooblen; 1867 oob += thisooblen; 1868 oobcolumn = 0; 1869 } else 1870 oobbuf = (u_char *) ffchars; 1871 1872 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); 1873 } else 1874 ONENAND_SET_NEXT_BUFFERRAM(this); 1875 1876 /* 1877 * 2 PLANE, MLC, and Flex-OneNAND do not support 1878 * write-while-program feature. 1879 */ 1880 if (!ONENAND_IS_2PLANE(this) && !ONENAND_IS_4KB_PAGE(this) && !first) { 1881 ONENAND_SET_PREV_BUFFERRAM(this); 1882 1883 ret = this->wait(mtd, FL_WRITING); 1884 1885 /* In partial page write we don't update bufferram */ 1886 onenand_update_bufferram(mtd, prev, !ret && !prev_subpage); 1887 if (ret) { 1888 written -= prevlen; 1889 printk(KERN_ERR "%s: write failed %d\n", 1890 __func__, ret); 1891 break; 1892 } 1893 1894 if (written == len) { 1895 /* Only check verify write turn on */ 1896 ret = onenand_verify(mtd, buf - len, to - len, len); 1897 if (ret) 1898 printk(KERN_ERR "%s: verify failed %d\n", 1899 __func__, ret); 1900 break; 1901 } 1902 1903 ONENAND_SET_NEXT_BUFFERRAM(this); 1904 } 1905 1906 this->ongoing = 0; 1907 cmd = ONENAND_CMD_PROG; 1908 1909 /* Exclude 1st OTP and OTP blocks for cache program feature */ 1910 if (ONENAND_IS_CACHE_PROGRAM(this) && 1911 likely(onenand_block(this, to) != 0) && 1912 ONENAND_IS_4KB_PAGE(this) && 1913 ((written + thislen) < len)) { 1914 cmd = ONENAND_CMD_2X_CACHE_PROG; 1915 this->ongoing = 1; 1916 } 1917 1918 this->command(mtd, cmd, to, mtd->writesize); 1919 1920 /* 1921 * 2 PLANE, MLC, and Flex-OneNAND wait here 1922 */ 1923 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this)) { 1924 ret = this->wait(mtd, FL_WRITING); 1925 1926 /* In partial page write we don't update bufferram */ 1927 onenand_update_bufferram(mtd, to, !ret && !subpage); 1928 if (ret) { 1929 printk(KERN_ERR "%s: write failed %d\n", 1930 __func__, ret); 1931 break; 1932 } 1933 1934 /* Only check verify write turn on */ 1935 ret = onenand_verify(mtd, buf, to, thislen); 1936 if (ret) { 1937 printk(KERN_ERR "%s: verify failed %d\n", 1938 __func__, ret); 1939 break; 1940 } 1941 1942 written += thislen; 1943 1944 if (written == len) 1945 break; 1946 1947 } else 1948 written += thislen; 1949 1950 column = 0; 1951 prev_subpage = subpage; 1952 prev = to; 1953 prevlen = thislen; 1954 to += thislen; 1955 buf += thislen; 1956 first = 0; 1957 } 1958 1959 /* In error case, clear all bufferrams */ 1960 if (written != len) 1961 onenand_invalidate_bufferram(mtd, 0, -1); 1962 1963 ops->retlen = written; 1964 ops->oobretlen = oobwritten; 1965 1966 return ret; 1967} 1968 1969 1970/** 1971 * onenand_write_oob_nolock - [INTERN] OneNAND write out-of-band 1972 * @mtd: MTD device structure 1973 * @to: offset to write to 1974 * @ops: oob operation description structure 1975 * 1976 * OneNAND write out-of-band 1977 */ 1978static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to, 1979 struct mtd_oob_ops *ops) 1980{ 1981 struct onenand_chip *this = mtd->priv; 1982 int column, ret = 0, oobsize; 1983 int written = 0, oobcmd; 1984 u_char *oobbuf; 1985 size_t len = ops->ooblen; 1986 const u_char *buf = ops->oobbuf; 1987 unsigned int mode = ops->mode; 1988 1989 to += ops->ooboffs; 1990 1991 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to, 1992 (int)len); 1993 1994 /* Initialize retlen, in case of early exit */ 1995 ops->oobretlen = 0; 1996 1997 if (mode == MTD_OPS_AUTO_OOB) 1998 oobsize = mtd->oobavail; 1999 else 2000 oobsize = mtd->oobsize; 2001 2002 column = to & (mtd->oobsize - 1); 2003 2004 if (unlikely(column >= oobsize)) { 2005 printk(KERN_ERR "%s: Attempted to start write outside oob\n", 2006 __func__); 2007 return -EINVAL; 2008 } 2009 2010 /* For compatibility with NAND: Do not allow write past end of page */ 2011 if (unlikely(column + len > oobsize)) { 2012 printk(KERN_ERR "%s: Attempt to write past end of page\n", 2013 __func__); 2014 return -EINVAL; 2015 } 2016 2017 oobbuf = this->oob_buf; 2018 2019 oobcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB; 2020 2021 /* Loop until all data write */ 2022 while (written < len) { 2023 int thislen = min_t(int, oobsize, len - written); 2024 2025 cond_resched(); 2026 2027 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize); 2028 2029 /* We send data to spare ram with oobsize 2030 * to prevent byte access */ 2031 memset(oobbuf, 0xff, mtd->oobsize); 2032 if (mode == MTD_OPS_AUTO_OOB) 2033 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen); 2034 else 2035 memcpy(oobbuf + column, buf, thislen); 2036 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); 2037 2038 if (ONENAND_IS_4KB_PAGE(this)) { 2039 /* Set main area of DataRAM to 0xff*/ 2040 memset(this->page_buf, 0xff, mtd->writesize); 2041 this->write_bufferram(mtd, ONENAND_DATARAM, 2042 this->page_buf, 0, mtd->writesize); 2043 } 2044 2045 this->command(mtd, oobcmd, to, mtd->oobsize); 2046 2047 onenand_update_bufferram(mtd, to, 0); 2048 if (ONENAND_IS_2PLANE(this)) { 2049 ONENAND_SET_BUFFERRAM1(this); 2050 onenand_update_bufferram(mtd, to + this->writesize, 0); 2051 } 2052 2053 ret = this->wait(mtd, FL_WRITING); 2054 if (ret) { 2055 printk(KERN_ERR "%s: write failed %d\n", __func__, ret); 2056 break; 2057 } 2058 2059 ret = onenand_verify_oob(mtd, oobbuf, to); 2060 if (ret) { 2061 printk(KERN_ERR "%s: verify failed %d\n", 2062 __func__, ret); 2063 break; 2064 } 2065 2066 written += thislen; 2067 if (written == len) 2068 break; 2069 2070 to += mtd->writesize; 2071 buf += thislen; 2072 column = 0; 2073 } 2074 2075 ops->oobretlen = written; 2076 2077 return ret; 2078} 2079 2080/** 2081 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band 2082 * @mtd: MTD device structure 2083 * @to: offset to write 2084 * @ops: oob operation description structure 2085 */ 2086static int onenand_write_oob(struct mtd_info *mtd, loff_t to, 2087 struct mtd_oob_ops *ops) 2088{ 2089 int ret; 2090 2091 switch (ops->mode) { 2092 case MTD_OPS_PLACE_OOB: 2093 case MTD_OPS_AUTO_OOB: 2094 break; 2095 case MTD_OPS_RAW: 2096 /* Not implemented yet */ 2097 default: 2098 return -EINVAL; 2099 } 2100 2101 onenand_get_device(mtd, FL_WRITING); 2102 if (ops->datbuf) 2103 ret = onenand_write_ops_nolock(mtd, to, ops); 2104 else 2105 ret = onenand_write_oob_nolock(mtd, to, ops); 2106 onenand_release_device(mtd); 2107 2108 return ret; 2109} 2110 2111/** 2112 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad 2113 * @mtd: MTD device structure 2114 * @ofs: offset from device start 2115 * @allowbbt: 1, if its allowed to access the bbt area 2116 * 2117 * Check, if the block is bad. Either by reading the bad block table or 2118 * calling of the scan function. 2119 */ 2120static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt) 2121{ 2122 struct onenand_chip *this = mtd->priv; 2123 struct bbm_info *bbm = this->bbm; 2124 2125 /* Return info from the table */ 2126 return bbm->isbad_bbt(mtd, ofs, allowbbt); 2127} 2128 2129 2130static int onenand_multiblock_erase_verify(struct mtd_info *mtd, 2131 struct erase_info *instr) 2132{ 2133 struct onenand_chip *this = mtd->priv; 2134 loff_t addr = instr->addr; 2135 int len = instr->len; 2136 unsigned int block_size = (1 << this->erase_shift); 2137 int ret = 0; 2138 2139 while (len) { 2140 this->command(mtd, ONENAND_CMD_ERASE_VERIFY, addr, block_size); 2141 ret = this->wait(mtd, FL_VERIFYING_ERASE); 2142 if (ret) { 2143 printk(KERN_ERR "%s: Failed verify, block %d\n", 2144 __func__, onenand_block(this, addr)); 2145 instr->fail_addr = addr; 2146 return -1; 2147 } 2148 len -= block_size; 2149 addr += block_size; 2150 } 2151 return 0; 2152} 2153 2154/** 2155 * onenand_multiblock_erase - [INTERN] erase block(s) using multiblock erase 2156 * @mtd: MTD device structure 2157 * @instr: erase instruction 2158 * @block_size: block size 2159 * 2160 * Erase one or more blocks up to 64 block at a time 2161 */ 2162static int onenand_multiblock_erase(struct mtd_info *mtd, 2163 struct erase_info *instr, 2164 unsigned int block_size) 2165{ 2166 struct onenand_chip *this = mtd->priv; 2167 loff_t addr = instr->addr; 2168 int len = instr->len; 2169 int eb_count = 0; 2170 int ret = 0; 2171 int bdry_block = 0; 2172 2173 if (ONENAND_IS_DDP(this)) { 2174 loff_t bdry_addr = this->chipsize >> 1; 2175 if (addr < bdry_addr && (addr + len) > bdry_addr) 2176 bdry_block = bdry_addr >> this->erase_shift; 2177 } 2178 2179 /* Pre-check bbs */ 2180 while (len) { 2181 /* Check if we have a bad block, we do not erase bad blocks */ 2182 if (onenand_block_isbad_nolock(mtd, addr, 0)) { 2183 printk(KERN_WARNING "%s: attempt to erase a bad block " 2184 "at addr 0x%012llx\n", 2185 __func__, (unsigned long long) addr); 2186 return -EIO; 2187 } 2188 len -= block_size; 2189 addr += block_size; 2190 } 2191 2192 len = instr->len; 2193 addr = instr->addr; 2194 2195 /* loop over 64 eb batches */ 2196 while (len) { 2197 struct erase_info verify_instr = *instr; 2198 int max_eb_count = MB_ERASE_MAX_BLK_COUNT; 2199 2200 verify_instr.addr = addr; 2201 verify_instr.len = 0; 2202 2203 /* do not cross chip boundary */ 2204 if (bdry_block) { 2205 int this_block = (addr >> this->erase_shift); 2206 2207 if (this_block < bdry_block) { 2208 max_eb_count = min(max_eb_count, 2209 (bdry_block - this_block)); 2210 } 2211 } 2212 2213 eb_count = 0; 2214 2215 while (len > block_size && eb_count < (max_eb_count - 1)) { 2216 this->command(mtd, ONENAND_CMD_MULTIBLOCK_ERASE, 2217 addr, block_size); 2218 onenand_invalidate_bufferram(mtd, addr, block_size); 2219 2220 ret = this->wait(mtd, FL_PREPARING_ERASE); 2221 if (ret) { 2222 printk(KERN_ERR "%s: Failed multiblock erase, " 2223 "block %d\n", __func__, 2224 onenand_block(this, addr)); 2225 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; 2226 return -EIO; 2227 } 2228 2229 len -= block_size; 2230 addr += block_size; 2231 eb_count++; 2232 } 2233 2234 /* last block of 64-eb series */ 2235 cond_resched(); 2236 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); 2237 onenand_invalidate_bufferram(mtd, addr, block_size); 2238 2239 ret = this->wait(mtd, FL_ERASING); 2240 /* Check if it is write protected */ 2241 if (ret) { 2242 printk(KERN_ERR "%s: Failed erase, block %d\n", 2243 __func__, onenand_block(this, addr)); 2244 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; 2245 return -EIO; 2246 } 2247 2248 len -= block_size; 2249 addr += block_size; 2250 eb_count++; 2251 2252 /* verify */ 2253 verify_instr.len = eb_count * block_size; 2254 if (onenand_multiblock_erase_verify(mtd, &verify_instr)) { 2255 instr->fail_addr = verify_instr.fail_addr; 2256 return -EIO; 2257 } 2258 2259 } 2260 return 0; 2261} 2262 2263 2264/** 2265 * onenand_block_by_block_erase - [INTERN] erase block(s) using regular erase 2266 * @mtd: MTD device structure 2267 * @instr: erase instruction 2268 * @region: erase region 2269 * @block_size: erase block size 2270 * 2271 * Erase one or more blocks one block at a time 2272 */ 2273static int onenand_block_by_block_erase(struct mtd_info *mtd, 2274 struct erase_info *instr, 2275 struct mtd_erase_region_info *region, 2276 unsigned int block_size) 2277{ 2278 struct onenand_chip *this = mtd->priv; 2279 loff_t addr = instr->addr; 2280 int len = instr->len; 2281 loff_t region_end = 0; 2282 int ret = 0; 2283 2284 if (region) { 2285 /* region is set for Flex-OneNAND */ 2286 region_end = region->offset + region->erasesize * region->numblocks; 2287 } 2288 2289 /* Loop through the blocks */ 2290 while (len) { 2291 cond_resched(); 2292 2293 /* Check if we have a bad block, we do not erase bad blocks */ 2294 if (onenand_block_isbad_nolock(mtd, addr, 0)) { 2295 printk(KERN_WARNING "%s: attempt to erase a bad block " 2296 "at addr 0x%012llx\n", 2297 __func__, (unsigned long long) addr); 2298 return -EIO; 2299 } 2300 2301 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); 2302 2303 onenand_invalidate_bufferram(mtd, addr, block_size); 2304 2305 ret = this->wait(mtd, FL_ERASING); 2306 /* Check, if it is write protected */ 2307 if (ret) { 2308 printk(KERN_ERR "%s: Failed erase, block %d\n", 2309 __func__, onenand_block(this, addr)); 2310 instr->fail_addr = addr; 2311 return -EIO; 2312 } 2313 2314 len -= block_size; 2315 addr += block_size; 2316 2317 if (region && addr == region_end) { 2318 if (!len) 2319 break; 2320 region++; 2321 2322 block_size = region->erasesize; 2323 region_end = region->offset + region->erasesize * region->numblocks; 2324 2325 if (len & (block_size - 1)) { 2326 /* FIXME: This should be handled at MTD partitioning level. */ 2327 printk(KERN_ERR "%s: Unaligned address\n", 2328 __func__); 2329 return -EIO; 2330 } 2331 } 2332 } 2333 return 0; 2334} 2335 2336/** 2337 * onenand_erase - [MTD Interface] erase block(s) 2338 * @mtd: MTD device structure 2339 * @instr: erase instruction 2340 * 2341 * Erase one or more blocks 2342 */ 2343static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) 2344{ 2345 struct onenand_chip *this = mtd->priv; 2346 unsigned int block_size; 2347 loff_t addr = instr->addr; 2348 loff_t len = instr->len; 2349 int ret = 0; 2350 struct mtd_erase_region_info *region = NULL; 2351 loff_t region_offset = 0; 2352 2353 pr_debug("%s: start=0x%012llx, len=%llu\n", __func__, 2354 (unsigned long long)instr->addr, 2355 (unsigned long long)instr->len); 2356 2357 if (FLEXONENAND(this)) { 2358 /* Find the eraseregion of this address */ 2359 int i = flexonenand_region(mtd, addr); 2360 2361 region = &mtd->eraseregions[i]; 2362 block_size = region->erasesize; 2363 2364 /* Start address within region must align on block boundary. 2365 * Erase region's start offset is always block start address. 2366 */ 2367 region_offset = region->offset; 2368 } else 2369 block_size = 1 << this->erase_shift; 2370 2371 /* Start address must align on block boundary */ 2372 if (unlikely((addr - region_offset) & (block_size - 1))) { 2373 printk(KERN_ERR "%s: Unaligned address\n", __func__); 2374 return -EINVAL; 2375 } 2376 2377 /* Length must align on block boundary */ 2378 if (unlikely(len & (block_size - 1))) { 2379 printk(KERN_ERR "%s: Length not block aligned\n", __func__); 2380 return -EINVAL; 2381 } 2382 2383 /* Grab the lock and see if the device is available */ 2384 onenand_get_device(mtd, FL_ERASING); 2385 2386 if (ONENAND_IS_4KB_PAGE(this) || region || 2387 instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) { 2388 /* region is set for Flex-OneNAND (no mb erase) */ 2389 ret = onenand_block_by_block_erase(mtd, instr, 2390 region, block_size); 2391 } else { 2392 ret = onenand_multiblock_erase(mtd, instr, block_size); 2393 } 2394 2395 /* Deselect and wake up anyone waiting on the device */ 2396 onenand_release_device(mtd); 2397 2398 return ret; 2399} 2400 2401/** 2402 * onenand_sync - [MTD Interface] sync 2403 * @mtd: MTD device structure 2404 * 2405 * Sync is actually a wait for chip ready function 2406 */ 2407static void onenand_sync(struct mtd_info *mtd) 2408{ 2409 pr_debug("%s: called\n", __func__); 2410 2411 /* Grab the lock and see if the device is available */ 2412 onenand_get_device(mtd, FL_SYNCING); 2413 2414 /* Release it and go back */ 2415 onenand_release_device(mtd); 2416} 2417 2418/** 2419 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad 2420 * @mtd: MTD device structure 2421 * @ofs: offset relative to mtd start 2422 * 2423 * Check whether the block is bad 2424 */ 2425static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs) 2426{ 2427 int ret; 2428 2429 onenand_get_device(mtd, FL_READING); 2430 ret = onenand_block_isbad_nolock(mtd, ofs, 0); 2431 onenand_release_device(mtd); 2432 return ret; 2433} 2434 2435/** 2436 * onenand_default_block_markbad - [DEFAULT] mark a block bad 2437 * @mtd: MTD device structure 2438 * @ofs: offset from device start 2439 * 2440 * This is the default implementation, which can be overridden by 2441 * a hardware specific driver. 2442 */ 2443static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) 2444{ 2445 struct onenand_chip *this = mtd->priv; 2446 struct bbm_info *bbm = this->bbm; 2447 u_char buf[2] = {0, 0}; 2448 struct mtd_oob_ops ops = { 2449 .mode = MTD_OPS_PLACE_OOB, 2450 .ooblen = 2, 2451 .oobbuf = buf, 2452 .ooboffs = 0, 2453 }; 2454 int block; 2455 2456 /* Get block number */ 2457 block = onenand_block(this, ofs); 2458 if (bbm->bbt) 2459 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); 2460 2461 /* We write two bytes, so we don't have to mess with 16-bit access */ 2462 ofs += mtd->oobsize + (this->badblockpos & ~0x01); 2463 /* FIXME : What to do when marking SLC block in partition 2464 * with MLC erasesize? For now, it is not advisable to 2465 * create partitions containing both SLC and MLC regions. 2466 */ 2467 return onenand_write_oob_nolock(mtd, ofs, &ops); 2468} 2469 2470/** 2471 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad 2472 * @mtd: MTD device structure 2473 * @ofs: offset relative to mtd start 2474 * 2475 * Mark the block as bad 2476 */ 2477static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs) 2478{ 2479 struct onenand_chip *this = mtd->priv; 2480 int ret; 2481 2482 ret = onenand_block_isbad(mtd, ofs); 2483 if (ret) { 2484 /* If it was bad already, return success and do nothing */ 2485 if (ret > 0) 2486 return 0; 2487 return ret; 2488 } 2489 2490 onenand_get_device(mtd, FL_WRITING); 2491 ret = this->block_markbad(mtd, ofs); 2492 onenand_release_device(mtd); 2493 return ret; 2494} 2495 2496/** 2497 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s) 2498 * @mtd: MTD device structure 2499 * @ofs: offset relative to mtd start 2500 * @len: number of bytes to lock or unlock 2501 * @cmd: lock or unlock command 2502 * 2503 * Lock or unlock one or more blocks 2504 */ 2505static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd) 2506{ 2507 struct onenand_chip *this = mtd->priv; 2508 int start, end, block, value, status; 2509 int wp_status_mask; 2510 2511 start = onenand_block(this, ofs); 2512 end = onenand_block(this, ofs + len) - 1; 2513 2514 if (cmd == ONENAND_CMD_LOCK) 2515 wp_status_mask = ONENAND_WP_LS; 2516 else 2517 wp_status_mask = ONENAND_WP_US; 2518 2519 /* Continuous lock scheme */ 2520 if (this->options & ONENAND_HAS_CONT_LOCK) { 2521 /* Set start block address */ 2522 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2523 /* Set end block address */ 2524 this->write_word(end, this->base + ONENAND_REG_END_BLOCK_ADDRESS); 2525 /* Write lock command */ 2526 this->command(mtd, cmd, 0, 0); 2527 2528 /* There's no return value */ 2529 this->wait(mtd, FL_LOCKING); 2530 2531 /* Sanity check */ 2532 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 2533 & ONENAND_CTRL_ONGO) 2534 continue; 2535 2536 /* Check lock status */ 2537 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 2538 if (!(status & wp_status_mask)) 2539 printk(KERN_ERR "%s: wp status = 0x%x\n", 2540 __func__, status); 2541 2542 return 0; 2543 } 2544 2545 /* Block lock scheme */ 2546 for (block = start; block < end + 1; block++) { 2547 /* Set block address */ 2548 value = onenand_block_address(this, block); 2549 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 2550 /* Select DataRAM for DDP */ 2551 value = onenand_bufferram_address(this, block); 2552 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 2553 /* Set start block address */ 2554 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2555 /* Write lock command */ 2556 this->command(mtd, cmd, 0, 0); 2557 2558 /* There's no return value */ 2559 this->wait(mtd, FL_LOCKING); 2560 2561 /* Sanity check */ 2562 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 2563 & ONENAND_CTRL_ONGO) 2564 continue; 2565 2566 /* Check lock status */ 2567 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 2568 if (!(status & wp_status_mask)) 2569 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n", 2570 __func__, block, status); 2571 } 2572 2573 return 0; 2574} 2575 2576/** 2577 * onenand_lock - [MTD Interface] Lock block(s) 2578 * @mtd: MTD device structure 2579 * @ofs: offset relative to mtd start 2580 * @len: number of bytes to unlock 2581 * 2582 * Lock one or more blocks 2583 */ 2584static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) 2585{ 2586 int ret; 2587 2588 onenand_get_device(mtd, FL_LOCKING); 2589 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK); 2590 onenand_release_device(mtd); 2591 return ret; 2592} 2593 2594/** 2595 * onenand_unlock - [MTD Interface] Unlock block(s) 2596 * @mtd: MTD device structure 2597 * @ofs: offset relative to mtd start 2598 * @len: number of bytes to unlock 2599 * 2600 * Unlock one or more blocks 2601 */ 2602static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) 2603{ 2604 int ret; 2605 2606 onenand_get_device(mtd, FL_LOCKING); 2607 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK); 2608 onenand_release_device(mtd); 2609 return ret; 2610} 2611 2612/** 2613 * onenand_check_lock_status - [OneNAND Interface] Check lock status 2614 * @this: onenand chip data structure 2615 * 2616 * Check lock status 2617 */ 2618static int onenand_check_lock_status(struct onenand_chip *this) 2619{ 2620 unsigned int value, block, status; 2621 unsigned int end; 2622 2623 end = this->chipsize >> this->erase_shift; 2624 for (block = 0; block < end; block++) { 2625 /* Set block address */ 2626 value = onenand_block_address(this, block); 2627 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); 2628 /* Select DataRAM for DDP */ 2629 value = onenand_bufferram_address(this, block); 2630 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); 2631 /* Set start block address */ 2632 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2633 2634 /* Check lock status */ 2635 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 2636 if (!(status & ONENAND_WP_US)) { 2637 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n", 2638 __func__, block, status); 2639 return 0; 2640 } 2641 } 2642 2643 return 1; 2644} 2645 2646/** 2647 * onenand_unlock_all - [OneNAND Interface] unlock all blocks 2648 * @mtd: MTD device structure 2649 * 2650 * Unlock all blocks 2651 */ 2652static void onenand_unlock_all(struct mtd_info *mtd) 2653{ 2654 struct onenand_chip *this = mtd->priv; 2655 loff_t ofs = 0; 2656 loff_t len = mtd->size; 2657 2658 if (this->options & ONENAND_HAS_UNLOCK_ALL) { 2659 /* Set start block address */ 2660 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS); 2661 /* Write unlock command */ 2662 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0); 2663 2664 /* There's no return value */ 2665 this->wait(mtd, FL_LOCKING); 2666 2667 /* Sanity check */ 2668 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 2669 & ONENAND_CTRL_ONGO) 2670 continue; 2671 2672 /* Don't check lock status */ 2673 if (this->options & ONENAND_SKIP_UNLOCK_CHECK) 2674 return; 2675 2676 /* Check lock status */ 2677 if (onenand_check_lock_status(this)) 2678 return; 2679 2680 /* Workaround for all block unlock in DDP */ 2681 if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) { 2682 /* All blocks on another chip */ 2683 ofs = this->chipsize >> 1; 2684 len = this->chipsize >> 1; 2685 } 2686 } 2687 2688 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK); 2689} 2690 2691#ifdef CONFIG_MTD_ONENAND_OTP 2692 2693/** 2694 * onenand_otp_command - Send OTP specific command to OneNAND device 2695 * @mtd: MTD device structure 2696 * @cmd: the command to be sent 2697 * @addr: offset to read from or write to 2698 * @len: number of bytes to read or write 2699 */ 2700static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr, 2701 size_t len) 2702{ 2703 struct onenand_chip *this = mtd->priv; 2704 int value, block, page; 2705 2706 /* Address translation */ 2707 switch (cmd) { 2708 case ONENAND_CMD_OTP_ACCESS: 2709 block = (int) (addr >> this->erase_shift); 2710 page = -1; 2711 break; 2712 2713 default: 2714 block = (int) (addr >> this->erase_shift); 2715 page = (int) (addr >> this->page_shift); 2716 2717 if (ONENAND_IS_2PLANE(this)) { 2718 /* Make the even block number */ 2719 block &= ~1; 2720 /* Is it the odd plane? */ 2721 if (addr & this->writesize) 2722 block++; 2723 page >>= 1; 2724 } 2725 page &= this->page_mask; 2726 break; 2727 } 2728 2729 if (block != -1) { 2730 /* Write 'DFS, FBA' of Flash */ 2731 value = onenand_block_address(this, block); 2732 this->write_word(value, this->base + 2733 ONENAND_REG_START_ADDRESS1); 2734 } 2735 2736 if (page != -1) { 2737 /* Now we use page size operation */ 2738 int sectors = 4, count = 4; 2739 int dataram; 2740 2741 switch (cmd) { 2742 default: 2743 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG) 2744 cmd = ONENAND_CMD_2X_PROG; 2745 dataram = ONENAND_CURRENT_BUFFERRAM(this); 2746 break; 2747 } 2748 2749 /* Write 'FPA, FSA' of Flash */ 2750 value = onenand_page_address(page, sectors); 2751 this->write_word(value, this->base + 2752 ONENAND_REG_START_ADDRESS8); 2753 2754 /* Write 'BSA, BSC' of DataRAM */ 2755 value = onenand_buffer_address(dataram, sectors, count); 2756 this->write_word(value, this->base + ONENAND_REG_START_BUFFER); 2757 } 2758 2759 /* Interrupt clear */ 2760 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); 2761 2762 /* Write command */ 2763 this->write_word(cmd, this->base + ONENAND_REG_COMMAND); 2764 2765 return 0; 2766} 2767 2768/** 2769 * onenand_otp_write_oob_nolock - [INTERN] OneNAND write out-of-band, specific to OTP 2770 * @mtd: MTD device structure 2771 * @to: offset to write to 2772 * @ops: oob operation description structure 2773 * 2774 * OneNAND write out-of-band only for OTP 2775 */ 2776static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to, 2777 struct mtd_oob_ops *ops) 2778{ 2779 struct onenand_chip *this = mtd->priv; 2780 int column, ret = 0, oobsize; 2781 int written = 0; 2782 u_char *oobbuf; 2783 size_t len = ops->ooblen; 2784 const u_char *buf = ops->oobbuf; 2785 int block, value, status; 2786 2787 to += ops->ooboffs; 2788 2789 /* Initialize retlen, in case of early exit */ 2790 ops->oobretlen = 0; 2791 2792 oobsize = mtd->oobsize; 2793 2794 column = to & (mtd->oobsize - 1); 2795 2796 oobbuf = this->oob_buf; 2797 2798 /* Loop until all data write */ 2799 while (written < len) { 2800 int thislen = min_t(int, oobsize, len - written); 2801 2802 cond_resched(); 2803 2804 block = (int) (to >> this->erase_shift); 2805 /* 2806 * Write 'DFS, FBA' of Flash 2807 * Add: F100h DQ=DFS, FBA 2808 */ 2809 2810 value = onenand_block_address(this, block); 2811 this->write_word(value, this->base + 2812 ONENAND_REG_START_ADDRESS1); 2813 2814 /* 2815 * Select DataRAM for DDP 2816 * Add: F101h DQ=DBS 2817 */ 2818 2819 value = onenand_bufferram_address(this, block); 2820 this->write_word(value, this->base + 2821 ONENAND_REG_START_ADDRESS2); 2822 ONENAND_SET_NEXT_BUFFERRAM(this); 2823 2824 /* 2825 * Enter OTP access mode 2826 */ 2827 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 2828 this->wait(mtd, FL_OTPING); 2829 2830 /* We send data to spare ram with oobsize 2831 * to prevent byte access */ 2832 memcpy(oobbuf + column, buf, thislen); 2833 2834 /* 2835 * Write Data into DataRAM 2836 * Add: 8th Word 2837 * in sector0/spare/page0 2838 * DQ=XXFCh 2839 */ 2840 this->write_bufferram(mtd, ONENAND_SPARERAM, 2841 oobbuf, 0, mtd->oobsize); 2842 2843 onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize); 2844 onenand_update_bufferram(mtd, to, 0); 2845 if (ONENAND_IS_2PLANE(this)) { 2846 ONENAND_SET_BUFFERRAM1(this); 2847 onenand_update_bufferram(mtd, to + this->writesize, 0); 2848 } 2849 2850 ret = this->wait(mtd, FL_WRITING); 2851 if (ret) { 2852 printk(KERN_ERR "%s: write failed %d\n", __func__, ret); 2853 break; 2854 } 2855 2856 /* Exit OTP access mode */ 2857 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 2858 this->wait(mtd, FL_RESETTING); 2859 2860 status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 2861 status &= 0x60; 2862 2863 if (status == 0x60) { 2864 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n"); 2865 printk(KERN_DEBUG "1st Block\tLOCKED\n"); 2866 printk(KERN_DEBUG "OTP Block\tLOCKED\n"); 2867 } else if (status == 0x20) { 2868 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n"); 2869 printk(KERN_DEBUG "1st Block\tLOCKED\n"); 2870 printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n"); 2871 } else if (status == 0x40) { 2872 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n"); 2873 printk(KERN_DEBUG "1st Block\tUN-LOCKED\n"); 2874 printk(KERN_DEBUG "OTP Block\tLOCKED\n"); 2875 } else { 2876 printk(KERN_DEBUG "Reboot to check\n"); 2877 } 2878 2879 written += thislen; 2880 if (written == len) 2881 break; 2882 2883 to += mtd->writesize; 2884 buf += thislen; 2885 column = 0; 2886 } 2887 2888 ops->oobretlen = written; 2889 2890 return ret; 2891} 2892 2893/* Internal OTP operation */ 2894typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len, 2895 size_t *retlen, u_char *buf); 2896 2897/** 2898 * do_otp_read - [DEFAULT] Read OTP block area 2899 * @mtd: MTD device structure 2900 * @from: The offset to read 2901 * @len: number of bytes to read 2902 * @retlen: pointer to variable to store the number of readbytes 2903 * @buf: the databuffer to put/get data 2904 * 2905 * Read OTP block area. 2906 */ 2907static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len, 2908 size_t *retlen, u_char *buf) 2909{ 2910 struct onenand_chip *this = mtd->priv; 2911 struct mtd_oob_ops ops = { 2912 .len = len, 2913 .ooblen = 0, 2914 .datbuf = buf, 2915 .oobbuf = NULL, 2916 }; 2917 int ret; 2918 2919 /* Enter OTP access mode */ 2920 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 2921 this->wait(mtd, FL_OTPING); 2922 2923 ret = ONENAND_IS_4KB_PAGE(this) ? 2924 onenand_mlc_read_ops_nolock(mtd, from, &ops) : 2925 onenand_read_ops_nolock(mtd, from, &ops); 2926 2927 /* Exit OTP access mode */ 2928 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 2929 this->wait(mtd, FL_RESETTING); 2930 2931 return ret; 2932} 2933 2934/** 2935 * do_otp_write - [DEFAULT] Write OTP block area 2936 * @mtd: MTD device structure 2937 * @to: The offset to write 2938 * @len: number of bytes to write 2939 * @retlen: pointer to variable to store the number of write bytes 2940 * @buf: the databuffer to put/get data 2941 * 2942 * Write OTP block area. 2943 */ 2944static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len, 2945 size_t *retlen, u_char *buf) 2946{ 2947 struct onenand_chip *this = mtd->priv; 2948 unsigned char *pbuf = buf; 2949 int ret; 2950 struct mtd_oob_ops ops = { }; 2951 2952 /* Force buffer page aligned */ 2953 if (len < mtd->writesize) { 2954 memcpy(this->page_buf, buf, len); 2955 memset(this->page_buf + len, 0xff, mtd->writesize - len); 2956 pbuf = this->page_buf; 2957 len = mtd->writesize; 2958 } 2959 2960 /* Enter OTP access mode */ 2961 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 2962 this->wait(mtd, FL_OTPING); 2963 2964 ops.len = len; 2965 ops.ooblen = 0; 2966 ops.datbuf = pbuf; 2967 ops.oobbuf = NULL; 2968 ret = onenand_write_ops_nolock(mtd, to, &ops); 2969 *retlen = ops.retlen; 2970 2971 /* Exit OTP access mode */ 2972 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 2973 this->wait(mtd, FL_RESETTING); 2974 2975 return ret; 2976} 2977 2978/** 2979 * do_otp_lock - [DEFAULT] Lock OTP block area 2980 * @mtd: MTD device structure 2981 * @from: The offset to lock 2982 * @len: number of bytes to lock 2983 * @retlen: pointer to variable to store the number of lock bytes 2984 * @buf: the databuffer to put/get data 2985 * 2986 * Lock OTP block area. 2987 */ 2988static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len, 2989 size_t *retlen, u_char *buf) 2990{ 2991 struct onenand_chip *this = mtd->priv; 2992 struct mtd_oob_ops ops = { }; 2993 int ret; 2994 2995 if (FLEXONENAND(this)) { 2996 2997 /* Enter OTP access mode */ 2998 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); 2999 this->wait(mtd, FL_OTPING); 3000 /* 3001 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of 3002 * main area of page 49. 3003 */ 3004 ops.len = mtd->writesize; 3005 ops.ooblen = 0; 3006 ops.datbuf = buf; 3007 ops.oobbuf = NULL; 3008 ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops); 3009 *retlen = ops.retlen; 3010 3011 /* Exit OTP access mode */ 3012 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 3013 this->wait(mtd, FL_RESETTING); 3014 } else { 3015 ops.mode = MTD_OPS_PLACE_OOB; 3016 ops.ooblen = len; 3017 ops.oobbuf = buf; 3018 ops.ooboffs = 0; 3019 ret = onenand_otp_write_oob_nolock(mtd, from, &ops); 3020 *retlen = ops.oobretlen; 3021 } 3022 3023 return ret; 3024} 3025 3026/** 3027 * onenand_otp_walk - [DEFAULT] Handle OTP operation 3028 * @mtd: MTD device structure 3029 * @from: The offset to read/write 3030 * @len: number of bytes to read/write 3031 * @retlen: pointer to variable to store the number of read bytes 3032 * @buf: the databuffer to put/get data 3033 * @action: do given action 3034 * @mode: specify user and factory 3035 * 3036 * Handle OTP operation. 3037 */ 3038static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len, 3039 size_t *retlen, u_char *buf, 3040 otp_op_t action, int mode) 3041{ 3042 struct onenand_chip *this = mtd->priv; 3043 int otp_pages; 3044 int density; 3045 int ret = 0; 3046 3047 *retlen = 0; 3048 3049 density = onenand_get_density(this->device_id); 3050 if (density < ONENAND_DEVICE_DENSITY_512Mb) 3051 otp_pages = 20; 3052 else 3053 otp_pages = 50; 3054 3055 if (mode == MTD_OTP_FACTORY) { 3056 from += mtd->writesize * otp_pages; 3057 otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages; 3058 } 3059 3060 /* Check User/Factory boundary */ 3061 if (mode == MTD_OTP_USER) { 3062 if (mtd->writesize * otp_pages < from + len) 3063 return 0; 3064 } else { 3065 if (mtd->writesize * otp_pages < len) 3066 return 0; 3067 } 3068 3069 onenand_get_device(mtd, FL_OTPING); 3070 while (len > 0 && otp_pages > 0) { 3071 if (!action) { /* OTP Info functions */ 3072 struct otp_info *otpinfo; 3073 3074 len -= sizeof(struct otp_info); 3075 if (len <= 0) { 3076 ret = -ENOSPC; 3077 break; 3078 } 3079 3080 otpinfo = (struct otp_info *) buf; 3081 otpinfo->start = from; 3082 otpinfo->length = mtd->writesize; 3083 otpinfo->locked = 0; 3084 3085 from += mtd->writesize; 3086 buf += sizeof(struct otp_info); 3087 *retlen += sizeof(struct otp_info); 3088 } else { 3089 size_t tmp_retlen; 3090 3091 ret = action(mtd, from, len, &tmp_retlen, buf); 3092 if (ret) 3093 break; 3094 3095 buf += tmp_retlen; 3096 len -= tmp_retlen; 3097 *retlen += tmp_retlen; 3098 3099 } 3100 otp_pages--; 3101 } 3102 onenand_release_device(mtd); 3103 3104 return ret; 3105} 3106 3107/** 3108 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info 3109 * @mtd: MTD device structure 3110 * @len: number of bytes to read 3111 * @retlen: pointer to variable to store the number of read bytes 3112 * @buf: the databuffer to put/get data 3113 * 3114 * Read factory OTP info. 3115 */ 3116static int onenand_get_fact_prot_info(struct mtd_info *mtd, size_t len, 3117 size_t *retlen, struct otp_info *buf) 3118{ 3119 return onenand_otp_walk(mtd, 0, len, retlen, (u_char *) buf, NULL, 3120 MTD_OTP_FACTORY); 3121} 3122 3123/** 3124 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area 3125 * @mtd: MTD device structure 3126 * @from: The offset to read 3127 * @len: number of bytes to read 3128 * @retlen: pointer to variable to store the number of read bytes 3129 * @buf: the databuffer to put/get data 3130 * 3131 * Read factory OTP area. 3132 */ 3133static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from, 3134 size_t len, size_t *retlen, u_char *buf) 3135{ 3136 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY); 3137} 3138 3139/** 3140 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info 3141 * @mtd: MTD device structure 3142 * @retlen: pointer to variable to store the number of read bytes 3143 * @len: number of bytes to read 3144 * @buf: the databuffer to put/get data 3145 * 3146 * Read user OTP info. 3147 */ 3148static int onenand_get_user_prot_info(struct mtd_info *mtd, size_t len, 3149 size_t *retlen, struct otp_info *buf) 3150{ 3151 return onenand_otp_walk(mtd, 0, len, retlen, (u_char *) buf, NULL, 3152 MTD_OTP_USER); 3153} 3154 3155/** 3156 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area 3157 * @mtd: MTD device structure 3158 * @from: The offset to read 3159 * @len: number of bytes to read 3160 * @retlen: pointer to variable to store the number of read bytes 3161 * @buf: the databuffer to put/get data 3162 * 3163 * Read user OTP area. 3164 */ 3165static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from, 3166 size_t len, size_t *retlen, u_char *buf) 3167{ 3168 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER); 3169} 3170 3171/** 3172 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area 3173 * @mtd: MTD device structure 3174 * @from: The offset to write 3175 * @len: number of bytes to write 3176 * @retlen: pointer to variable to store the number of write bytes 3177 * @buf: the databuffer to put/get data 3178 * 3179 * Write user OTP area. 3180 */ 3181static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from, 3182 size_t len, size_t *retlen, const u_char *buf) 3183{ 3184 return onenand_otp_walk(mtd, from, len, retlen, (u_char *)buf, 3185 do_otp_write, MTD_OTP_USER); 3186} 3187 3188/** 3189 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area 3190 * @mtd: MTD device structure 3191 * @from: The offset to lock 3192 * @len: number of bytes to unlock 3193 * 3194 * Write lock mark on spare area in page 0 in OTP block 3195 */ 3196static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from, 3197 size_t len) 3198{ 3199 struct onenand_chip *this = mtd->priv; 3200 u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf; 3201 size_t retlen; 3202 int ret; 3203 unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET; 3204 3205 memset(buf, 0xff, FLEXONENAND(this) ? this->writesize 3206 : mtd->oobsize); 3207 /* 3208 * Write lock mark to 8th word of sector0 of page0 of the spare0. 3209 * We write 16 bytes spare area instead of 2 bytes. 3210 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of 3211 * main area of page 49. 3212 */ 3213 3214 from = 0; 3215 len = FLEXONENAND(this) ? mtd->writesize : 16; 3216 3217 /* 3218 * Note: OTP lock operation 3219 * OTP block : 0xXXFC XX 1111 1100 3220 * 1st block : 0xXXF3 (If chip support) XX 1111 0011 3221 * Both : 0xXXF0 (If chip support) XX 1111 0000 3222 */ 3223 if (FLEXONENAND(this)) 3224 otp_lock_offset = FLEXONENAND_OTP_LOCK_OFFSET; 3225 3226 /* ONENAND_OTP_AREA | ONENAND_OTP_BLOCK0 | ONENAND_OTP_AREA_BLOCK0 */ 3227 if (otp == 1) 3228 buf[otp_lock_offset] = 0xFC; 3229 else if (otp == 2) 3230 buf[otp_lock_offset] = 0xF3; 3231 else if (otp == 3) 3232 buf[otp_lock_offset] = 0xF0; 3233 else if (otp != 0) 3234 printk(KERN_DEBUG "[OneNAND] Invalid option selected for OTP\n"); 3235 3236 ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER); 3237 3238 return ret ? : retlen; 3239} 3240 3241#endif /* CONFIG_MTD_ONENAND_OTP */ 3242 3243/** 3244 * onenand_check_features - Check and set OneNAND features 3245 * @mtd: MTD data structure 3246 * 3247 * Check and set OneNAND features 3248 * - lock scheme 3249 * - two plane 3250 */ 3251static void onenand_check_features(struct mtd_info *mtd) 3252{ 3253 struct onenand_chip *this = mtd->priv; 3254 unsigned int density, process, numbufs; 3255 3256 /* Lock scheme depends on density and process */ 3257 density = onenand_get_density(this->device_id); 3258 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT; 3259 numbufs = this->read_word(this->base + ONENAND_REG_NUM_BUFFERS) >> 8; 3260 3261 /* Lock scheme */ 3262 switch (density) { 3263 case ONENAND_DEVICE_DENSITY_8Gb: 3264 this->options |= ONENAND_HAS_NOP_1; 3265 fallthrough; 3266 case ONENAND_DEVICE_DENSITY_4Gb: 3267 if (ONENAND_IS_DDP(this)) 3268 this->options |= ONENAND_HAS_2PLANE; 3269 else if (numbufs == 1) { 3270 this->options |= ONENAND_HAS_4KB_PAGE; 3271 this->options |= ONENAND_HAS_CACHE_PROGRAM; 3272 /* 3273 * There are two different 4KiB pagesize chips 3274 * and no way to detect it by H/W config values. 3275 * 3276 * To detect the correct NOP for each chips, 3277 * It should check the version ID as workaround. 3278 * 3279 * Now it has as following 3280 * KFM4G16Q4M has NOP 4 with version ID 0x0131 3281 * KFM4G16Q5M has NOP 1 with versoin ID 0x013e 3282 */ 3283 if ((this->version_id & 0xf) == 0xe) 3284 this->options |= ONENAND_HAS_NOP_1; 3285 } 3286 this->options |= ONENAND_HAS_UNLOCK_ALL; 3287 break; 3288 3289 case ONENAND_DEVICE_DENSITY_2Gb: 3290 /* 2Gb DDP does not have 2 plane */ 3291 if (!ONENAND_IS_DDP(this)) 3292 this->options |= ONENAND_HAS_2PLANE; 3293 this->options |= ONENAND_HAS_UNLOCK_ALL; 3294 break; 3295 3296 case ONENAND_DEVICE_DENSITY_1Gb: 3297 /* A-Die has all block unlock */ 3298 if (process) 3299 this->options |= ONENAND_HAS_UNLOCK_ALL; 3300 break; 3301 3302 default: 3303 /* Some OneNAND has continuous lock scheme */ 3304 if (!process) 3305 this->options |= ONENAND_HAS_CONT_LOCK; 3306 break; 3307 } 3308 3309 /* The MLC has 4KiB pagesize. */ 3310 if (ONENAND_IS_MLC(this)) 3311 this->options |= ONENAND_HAS_4KB_PAGE; 3312 3313 if (ONENAND_IS_4KB_PAGE(this)) 3314 this->options &= ~ONENAND_HAS_2PLANE; 3315 3316 if (FLEXONENAND(this)) { 3317 this->options &= ~ONENAND_HAS_CONT_LOCK; 3318 this->options |= ONENAND_HAS_UNLOCK_ALL; 3319 } 3320 3321 if (this->options & ONENAND_HAS_CONT_LOCK) 3322 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n"); 3323 if (this->options & ONENAND_HAS_UNLOCK_ALL) 3324 printk(KERN_DEBUG "Chip support all block unlock\n"); 3325 if (this->options & ONENAND_HAS_2PLANE) 3326 printk(KERN_DEBUG "Chip has 2 plane\n"); 3327 if (this->options & ONENAND_HAS_4KB_PAGE) 3328 printk(KERN_DEBUG "Chip has 4KiB pagesize\n"); 3329 if (this->options & ONENAND_HAS_CACHE_PROGRAM) 3330 printk(KERN_DEBUG "Chip has cache program feature\n"); 3331} 3332 3333/** 3334 * onenand_print_device_info - Print device & version ID 3335 * @device: device ID 3336 * @version: version ID 3337 * 3338 * Print device & version ID 3339 */ 3340static void onenand_print_device_info(int device, int version) 3341{ 3342 int vcc, demuxed, ddp, density, flexonenand; 3343 3344 vcc = device & ONENAND_DEVICE_VCC_MASK; 3345 demuxed = device & ONENAND_DEVICE_IS_DEMUX; 3346 ddp = device & ONENAND_DEVICE_IS_DDP; 3347 density = onenand_get_density(device); 3348 flexonenand = device & DEVICE_IS_FLEXONENAND; 3349 printk(KERN_INFO "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n", 3350 demuxed ? "" : "Muxed ", 3351 flexonenand ? "Flex-" : "", 3352 ddp ? "(DDP)" : "", 3353 (16 << density), 3354 vcc ? "2.65/3.3" : "1.8", 3355 device); 3356 printk(KERN_INFO "OneNAND version = 0x%04x\n", version); 3357} 3358 3359static const struct onenand_manufacturers onenand_manuf_ids[] = { 3360 {ONENAND_MFR_SAMSUNG, "Samsung"}, 3361 {ONENAND_MFR_NUMONYX, "Numonyx"}, 3362}; 3363 3364/** 3365 * onenand_check_maf - Check manufacturer ID 3366 * @manuf: manufacturer ID 3367 * 3368 * Check manufacturer ID 3369 */ 3370static int onenand_check_maf(int manuf) 3371{ 3372 int size = ARRAY_SIZE(onenand_manuf_ids); 3373 char *name; 3374 int i; 3375 3376 for (i = 0; i < size; i++) 3377 if (manuf == onenand_manuf_ids[i].id) 3378 break; 3379 3380 if (i < size) 3381 name = onenand_manuf_ids[i].name; 3382 else 3383 name = "Unknown"; 3384 3385 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf); 3386 3387 return (i == size); 3388} 3389 3390/** 3391 * flexonenand_get_boundary - Reads the SLC boundary 3392 * @mtd: MTD data structure 3393 */ 3394static int flexonenand_get_boundary(struct mtd_info *mtd) 3395{ 3396 struct onenand_chip *this = mtd->priv; 3397 unsigned die, bdry; 3398 int syscfg, locked; 3399 3400 /* Disable ECC */ 3401 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 3402 this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1); 3403 3404 for (die = 0; die < this->dies; die++) { 3405 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0); 3406 this->wait(mtd, FL_SYNCING); 3407 3408 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0); 3409 this->wait(mtd, FL_READING); 3410 3411 bdry = this->read_word(this->base + ONENAND_DATARAM); 3412 if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3) 3413 locked = 0; 3414 else 3415 locked = 1; 3416 this->boundary[die] = bdry & FLEXONENAND_PI_MASK; 3417 3418 this->command(mtd, ONENAND_CMD_RESET, 0, 0); 3419 this->wait(mtd, FL_RESETTING); 3420 3421 printk(KERN_INFO "Die %d boundary: %d%s\n", die, 3422 this->boundary[die], locked ? "(Locked)" : "(Unlocked)"); 3423 } 3424 3425 /* Enable ECC */ 3426 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 3427 return 0; 3428} 3429 3430/** 3431 * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info 3432 * boundary[], diesize[], mtd->size, mtd->erasesize 3433 * @mtd: - MTD device structure 3434 */ 3435static void flexonenand_get_size(struct mtd_info *mtd) 3436{ 3437 struct onenand_chip *this = mtd->priv; 3438 int die, i, eraseshift, density; 3439 int blksperdie, maxbdry; 3440 loff_t ofs; 3441 3442 density = onenand_get_density(this->device_id); 3443 blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift); 3444 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0; 3445 maxbdry = blksperdie - 1; 3446 eraseshift = this->erase_shift - 1; 3447 3448 mtd->numeraseregions = this->dies << 1; 3449 3450 /* This fills up the device boundary */ 3451 flexonenand_get_boundary(mtd); 3452 die = ofs = 0; 3453 i = -1; 3454 for (; die < this->dies; die++) { 3455 if (!die || this->boundary[die-1] != maxbdry) { 3456 i++; 3457 mtd->eraseregions[i].offset = ofs; 3458 mtd->eraseregions[i].erasesize = 1 << eraseshift; 3459 mtd->eraseregions[i].numblocks = 3460 this->boundary[die] + 1; 3461 ofs += mtd->eraseregions[i].numblocks << eraseshift; 3462 eraseshift++; 3463 } else { 3464 mtd->numeraseregions -= 1; 3465 mtd->eraseregions[i].numblocks += 3466 this->boundary[die] + 1; 3467 ofs += (this->boundary[die] + 1) << (eraseshift - 1); 3468 } 3469 if (this->boundary[die] != maxbdry) { 3470 i++; 3471 mtd->eraseregions[i].offset = ofs; 3472 mtd->eraseregions[i].erasesize = 1 << eraseshift; 3473 mtd->eraseregions[i].numblocks = maxbdry ^ 3474 this->boundary[die]; 3475 ofs += mtd->eraseregions[i].numblocks << eraseshift; 3476 eraseshift--; 3477 } else 3478 mtd->numeraseregions -= 1; 3479 } 3480 3481 /* Expose MLC erase size except when all blocks are SLC */ 3482 mtd->erasesize = 1 << this->erase_shift; 3483 if (mtd->numeraseregions == 1) 3484 mtd->erasesize >>= 1; 3485 3486 printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions); 3487 for (i = 0; i < mtd->numeraseregions; i++) 3488 printk(KERN_INFO "[offset: 0x%08x, erasesize: 0x%05x," 3489 " numblocks: %04u]\n", 3490 (unsigned int) mtd->eraseregions[i].offset, 3491 mtd->eraseregions[i].erasesize, 3492 mtd->eraseregions[i].numblocks); 3493 3494 for (die = 0, mtd->size = 0; die < this->dies; die++) { 3495 this->diesize[die] = (loff_t)blksperdie << this->erase_shift; 3496 this->diesize[die] -= (loff_t)(this->boundary[die] + 1) 3497 << (this->erase_shift - 1); 3498 mtd->size += this->diesize[die]; 3499 } 3500} 3501 3502/** 3503 * flexonenand_check_blocks_erased - Check if blocks are erased 3504 * @mtd: mtd info structure 3505 * @start: first erase block to check 3506 * @end: last erase block to check 3507 * 3508 * Converting an unerased block from MLC to SLC 3509 * causes byte values to change. Since both data and its ECC 3510 * have changed, reads on the block give uncorrectable error. 3511 * This might lead to the block being detected as bad. 3512 * 3513 * Avoid this by ensuring that the block to be converted is 3514 * erased. 3515 */ 3516static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int end) 3517{ 3518 struct onenand_chip *this = mtd->priv; 3519 int i, ret; 3520 int block; 3521 struct mtd_oob_ops ops = { 3522 .mode = MTD_OPS_PLACE_OOB, 3523 .ooboffs = 0, 3524 .ooblen = mtd->oobsize, 3525 .datbuf = NULL, 3526 .oobbuf = this->oob_buf, 3527 }; 3528 loff_t addr; 3529 3530 printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end); 3531 3532 for (block = start; block <= end; block++) { 3533 addr = flexonenand_addr(this, block); 3534 if (onenand_block_isbad_nolock(mtd, addr, 0)) 3535 continue; 3536 3537 /* 3538 * Since main area write results in ECC write to spare, 3539 * it is sufficient to check only ECC bytes for change. 3540 */ 3541 ret = onenand_read_oob_nolock(mtd, addr, &ops); 3542 if (ret) 3543 return ret; 3544 3545 for (i = 0; i < mtd->oobsize; i++) 3546 if (this->oob_buf[i] != 0xff) 3547 break; 3548 3549 if (i != mtd->oobsize) { 3550 printk(KERN_WARNING "%s: Block %d not erased.\n", 3551 __func__, block); 3552 return 1; 3553 } 3554 } 3555 3556 return 0; 3557} 3558 3559/* 3560 * flexonenand_set_boundary - Writes the SLC boundary 3561 */ 3562static int flexonenand_set_boundary(struct mtd_info *mtd, int die, 3563 int boundary, int lock) 3564{ 3565 struct onenand_chip *this = mtd->priv; 3566 int ret, density, blksperdie, old, new, thisboundary; 3567 loff_t addr; 3568 3569 /* Change only once for SDP Flex-OneNAND */ 3570 if (die && (!ONENAND_IS_DDP(this))) 3571 return 0; 3572 3573 /* boundary value of -1 indicates no required change */ 3574 if (boundary < 0 || boundary == this->boundary[die]) 3575 return 0; 3576 3577 density = onenand_get_density(this->device_id); 3578 blksperdie = ((16 << density) << 20) >> this->erase_shift; 3579 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0; 3580 3581 if (boundary >= blksperdie) { 3582 printk(KERN_ERR "%s: Invalid boundary value. " 3583 "Boundary not changed.\n", __func__); 3584 return -EINVAL; 3585 } 3586 3587 /* Check if converting blocks are erased */ 3588 old = this->boundary[die] + (die * this->density_mask); 3589 new = boundary + (die * this->density_mask); 3590 ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new)); 3591 if (ret) { 3592 printk(KERN_ERR "%s: Please erase blocks " 3593 "before boundary change\n", __func__); 3594 return ret; 3595 } 3596 3597 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0); 3598 this->wait(mtd, FL_SYNCING); 3599 3600 /* Check is boundary is locked */ 3601 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0); 3602 this->wait(mtd, FL_READING); 3603 3604 thisboundary = this->read_word(this->base + ONENAND_DATARAM); 3605 if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) { 3606 printk(KERN_ERR "%s: boundary locked\n", __func__); 3607 ret = 1; 3608 goto out; 3609 } 3610 3611 printk(KERN_INFO "Changing die %d boundary: %d%s\n", 3612 die, boundary, lock ? "(Locked)" : "(Unlocked)"); 3613 3614 addr = die ? this->diesize[0] : 0; 3615 3616 boundary &= FLEXONENAND_PI_MASK; 3617 boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT); 3618 3619 this->command(mtd, ONENAND_CMD_ERASE, addr, 0); 3620 ret = this->wait(mtd, FL_ERASING); 3621 if (ret) { 3622 printk(KERN_ERR "%s: Failed PI erase for Die %d\n", 3623 __func__, die); 3624 goto out; 3625 } 3626 3627 this->write_word(boundary, this->base + ONENAND_DATARAM); 3628 this->command(mtd, ONENAND_CMD_PROG, addr, 0); 3629 ret = this->wait(mtd, FL_WRITING); 3630 if (ret) { 3631 printk(KERN_ERR "%s: Failed PI write for Die %d\n", 3632 __func__, die); 3633 goto out; 3634 } 3635 3636 this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0); 3637 ret = this->wait(mtd, FL_WRITING); 3638out: 3639 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND); 3640 this->wait(mtd, FL_RESETTING); 3641 if (!ret) 3642 /* Recalculate device size on boundary change*/ 3643 flexonenand_get_size(mtd); 3644 3645 return ret; 3646} 3647 3648/** 3649 * onenand_chip_probe - [OneNAND Interface] The generic chip probe 3650 * @mtd: MTD device structure 3651 * 3652 * OneNAND detection method: 3653 * Compare the values from command with ones from register 3654 */ 3655static int onenand_chip_probe(struct mtd_info *mtd) 3656{ 3657 struct onenand_chip *this = mtd->priv; 3658 int bram_maf_id, bram_dev_id, maf_id, dev_id; 3659 int syscfg; 3660 3661 /* Save system configuration 1 */ 3662 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1); 3663 /* Clear Sync. Burst Read mode to read BootRAM */ 3664 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE), this->base + ONENAND_REG_SYS_CFG1); 3665 3666 /* Send the command for reading device ID from BootRAM */ 3667 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM); 3668 3669 /* Read manufacturer and device IDs from BootRAM */ 3670 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0); 3671 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2); 3672 3673 /* Reset OneNAND to read default register values */ 3674 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM); 3675 /* Wait reset */ 3676 this->wait(mtd, FL_RESETTING); 3677 3678 /* Restore system configuration 1 */ 3679 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); 3680 3681 /* Check manufacturer ID */ 3682 if (onenand_check_maf(bram_maf_id)) 3683 return -ENXIO; 3684 3685 /* Read manufacturer and device IDs from Register */ 3686 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); 3687 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); 3688 3689 /* Check OneNAND device */ 3690 if (maf_id != bram_maf_id || dev_id != bram_dev_id) 3691 return -ENXIO; 3692 3693 return 0; 3694} 3695 3696/** 3697 * onenand_probe - [OneNAND Interface] Probe the OneNAND device 3698 * @mtd: MTD device structure 3699 */ 3700static int onenand_probe(struct mtd_info *mtd) 3701{ 3702 struct onenand_chip *this = mtd->priv; 3703 int dev_id, ver_id; 3704 int density; 3705 int ret; 3706 3707 ret = this->chip_probe(mtd); 3708 if (ret) 3709 return ret; 3710 3711 /* Device and version IDs from Register */ 3712 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); 3713 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); 3714 this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY); 3715 3716 /* Flash device information */ 3717 onenand_print_device_info(dev_id, ver_id); 3718 this->device_id = dev_id; 3719 this->version_id = ver_id; 3720 3721 /* Check OneNAND features */ 3722 onenand_check_features(mtd); 3723 3724 density = onenand_get_density(dev_id); 3725 if (FLEXONENAND(this)) { 3726 this->dies = ONENAND_IS_DDP(this) ? 2 : 1; 3727 /* Maximum possible erase regions */ 3728 mtd->numeraseregions = this->dies << 1; 3729 mtd->eraseregions = 3730 kcalloc(this->dies << 1, 3731 sizeof(struct mtd_erase_region_info), 3732 GFP_KERNEL); 3733 if (!mtd->eraseregions) 3734 return -ENOMEM; 3735 } 3736 3737 /* 3738 * For Flex-OneNAND, chipsize represents maximum possible device size. 3739 * mtd->size represents the actual device size. 3740 */ 3741 this->chipsize = (16 << density) << 20; 3742 3743 /* OneNAND page size & block size */ 3744 /* The data buffer size is equal to page size */ 3745 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE); 3746 /* We use the full BufferRAM */ 3747 if (ONENAND_IS_4KB_PAGE(this)) 3748 mtd->writesize <<= 1; 3749 3750 mtd->oobsize = mtd->writesize >> 5; 3751 /* Pages per a block are always 64 in OneNAND */ 3752 mtd->erasesize = mtd->writesize << 6; 3753 /* 3754 * Flex-OneNAND SLC area has 64 pages per block. 3755 * Flex-OneNAND MLC area has 128 pages per block. 3756 * Expose MLC erase size to find erase_shift and page_mask. 3757 */ 3758 if (FLEXONENAND(this)) 3759 mtd->erasesize <<= 1; 3760 3761 this->erase_shift = ffs(mtd->erasesize) - 1; 3762 this->page_shift = ffs(mtd->writesize) - 1; 3763 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1; 3764 /* Set density mask. it is used for DDP */ 3765 if (ONENAND_IS_DDP(this)) 3766 this->density_mask = this->chipsize >> (this->erase_shift + 1); 3767 /* It's real page size */ 3768 this->writesize = mtd->writesize; 3769 3770 /* REVISIT: Multichip handling */ 3771 3772 if (FLEXONENAND(this)) 3773 flexonenand_get_size(mtd); 3774 else 3775 mtd->size = this->chipsize; 3776 3777 /* 3778 * We emulate the 4KiB page and 256KiB erase block size 3779 * But oobsize is still 64 bytes. 3780 * It is only valid if you turn on 2X program support, 3781 * Otherwise it will be ignored by compiler. 3782 */ 3783 if (ONENAND_IS_2PLANE(this)) { 3784 mtd->writesize <<= 1; 3785 mtd->erasesize <<= 1; 3786 } 3787 3788 return 0; 3789} 3790 3791/** 3792 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash 3793 * @mtd: MTD device structure 3794 */ 3795static int onenand_suspend(struct mtd_info *mtd) 3796{ 3797 return onenand_get_device(mtd, FL_PM_SUSPENDED); 3798} 3799 3800/** 3801 * onenand_resume - [MTD Interface] Resume the OneNAND flash 3802 * @mtd: MTD device structure 3803 */ 3804static void onenand_resume(struct mtd_info *mtd) 3805{ 3806 struct onenand_chip *this = mtd->priv; 3807 3808 if (this->state == FL_PM_SUSPENDED) 3809 onenand_release_device(mtd); 3810 else 3811 printk(KERN_ERR "%s: resume() called for the chip which is not " 3812 "in suspended state\n", __func__); 3813} 3814 3815/** 3816 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device 3817 * @mtd: MTD device structure 3818 * @maxchips: Number of chips to scan for 3819 * 3820 * This fills out all the not initialized function pointers 3821 * with the defaults. 3822 * The flash ID is read and the mtd/chip structures are 3823 * filled with the appropriate values. 3824 */ 3825int onenand_scan(struct mtd_info *mtd, int maxchips) 3826{ 3827 int i, ret; 3828 struct onenand_chip *this = mtd->priv; 3829 3830 if (!this->read_word) 3831 this->read_word = onenand_readw; 3832 if (!this->write_word) 3833 this->write_word = onenand_writew; 3834 3835 if (!this->command) 3836 this->command = onenand_command; 3837 if (!this->wait) 3838 onenand_setup_wait(mtd); 3839 if (!this->bbt_wait) 3840 this->bbt_wait = onenand_bbt_wait; 3841 if (!this->unlock_all) 3842 this->unlock_all = onenand_unlock_all; 3843 3844 if (!this->chip_probe) 3845 this->chip_probe = onenand_chip_probe; 3846 3847 if (!this->read_bufferram) 3848 this->read_bufferram = onenand_read_bufferram; 3849 if (!this->write_bufferram) 3850 this->write_bufferram = onenand_write_bufferram; 3851 3852 if (!this->block_markbad) 3853 this->block_markbad = onenand_default_block_markbad; 3854 if (!this->scan_bbt) 3855 this->scan_bbt = onenand_default_bbt; 3856 3857 if (onenand_probe(mtd)) 3858 return -ENXIO; 3859 3860 /* Set Sync. Burst Read after probing */ 3861 if (this->mmcontrol) { 3862 printk(KERN_INFO "OneNAND Sync. Burst Read support\n"); 3863 this->read_bufferram = onenand_sync_read_bufferram; 3864 } 3865 3866 /* Allocate buffers, if necessary */ 3867 if (!this->page_buf) { 3868 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL); 3869 if (!this->page_buf) 3870 return -ENOMEM; 3871#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE 3872 this->verify_buf = kzalloc(mtd->writesize, GFP_KERNEL); 3873 if (!this->verify_buf) { 3874 kfree(this->page_buf); 3875 return -ENOMEM; 3876 } 3877#endif 3878 this->options |= ONENAND_PAGEBUF_ALLOC; 3879 } 3880 if (!this->oob_buf) { 3881 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL); 3882 if (!this->oob_buf) { 3883 if (this->options & ONENAND_PAGEBUF_ALLOC) { 3884 this->options &= ~ONENAND_PAGEBUF_ALLOC; 3885#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE 3886 kfree(this->verify_buf); 3887#endif 3888 kfree(this->page_buf); 3889 } 3890 return -ENOMEM; 3891 } 3892 this->options |= ONENAND_OOBBUF_ALLOC; 3893 } 3894 3895 this->state = FL_READY; 3896 init_waitqueue_head(&this->wq); 3897 spin_lock_init(&this->chip_lock); 3898 3899 /* 3900 * Allow subpage writes up to oobsize. 3901 */ 3902 switch (mtd->oobsize) { 3903 case 128: 3904 if (FLEXONENAND(this)) { 3905 mtd_set_ooblayout(mtd, &flexonenand_ooblayout_ops); 3906 mtd->subpage_sft = 0; 3907 } else { 3908 mtd_set_ooblayout(mtd, &onenand_oob_128_ooblayout_ops); 3909 mtd->subpage_sft = 2; 3910 } 3911 if (ONENAND_IS_NOP_1(this)) 3912 mtd->subpage_sft = 0; 3913 break; 3914 case 64: 3915 mtd_set_ooblayout(mtd, &onenand_oob_32_64_ooblayout_ops); 3916 mtd->subpage_sft = 2; 3917 break; 3918 3919 case 32: 3920 mtd_set_ooblayout(mtd, &onenand_oob_32_64_ooblayout_ops); 3921 mtd->subpage_sft = 1; 3922 break; 3923 3924 default: 3925 printk(KERN_WARNING "%s: No OOB scheme defined for oobsize %d\n", 3926 __func__, mtd->oobsize); 3927 mtd->subpage_sft = 0; 3928 /* To prevent kernel oops */ 3929 mtd_set_ooblayout(mtd, &onenand_oob_32_64_ooblayout_ops); 3930 break; 3931 } 3932 3933 this->subpagesize = mtd->writesize >> mtd->subpage_sft; 3934 3935 /* 3936 * The number of bytes available for a client to place data into 3937 * the out of band area 3938 */ 3939 ret = mtd_ooblayout_count_freebytes(mtd); 3940 if (ret < 0) 3941 ret = 0; 3942 3943 mtd->oobavail = ret; 3944 3945 mtd->ecc_strength = 1; 3946 3947 /* Fill in remaining MTD driver data */ 3948 mtd->type = ONENAND_IS_MLC(this) ? MTD_MLCNANDFLASH : MTD_NANDFLASH; 3949 mtd->flags = MTD_CAP_NANDFLASH; 3950 mtd->_erase = onenand_erase; 3951 mtd->_point = NULL; 3952 mtd->_unpoint = NULL; 3953 mtd->_read_oob = onenand_read_oob; 3954 mtd->_write_oob = onenand_write_oob; 3955 mtd->_panic_write = onenand_panic_write; 3956#ifdef CONFIG_MTD_ONENAND_OTP 3957 mtd->_get_fact_prot_info = onenand_get_fact_prot_info; 3958 mtd->_read_fact_prot_reg = onenand_read_fact_prot_reg; 3959 mtd->_get_user_prot_info = onenand_get_user_prot_info; 3960 mtd->_read_user_prot_reg = onenand_read_user_prot_reg; 3961 mtd->_write_user_prot_reg = onenand_write_user_prot_reg; 3962 mtd->_lock_user_prot_reg = onenand_lock_user_prot_reg; 3963#endif 3964 mtd->_sync = onenand_sync; 3965 mtd->_lock = onenand_lock; 3966 mtd->_unlock = onenand_unlock; 3967 mtd->_suspend = onenand_suspend; 3968 mtd->_resume = onenand_resume; 3969 mtd->_block_isbad = onenand_block_isbad; 3970 mtd->_block_markbad = onenand_block_markbad; 3971 mtd->owner = THIS_MODULE; 3972 mtd->writebufsize = mtd->writesize; 3973 3974 /* Unlock whole block */ 3975 if (!(this->options & ONENAND_SKIP_INITIAL_UNLOCKING)) 3976 this->unlock_all(mtd); 3977 3978 /* Set the bad block marker position */ 3979 this->badblockpos = ONENAND_BADBLOCK_POS; 3980 3981 ret = this->scan_bbt(mtd); 3982 if ((!FLEXONENAND(this)) || ret) 3983 return ret; 3984 3985 /* Change Flex-OneNAND boundaries if required */ 3986 for (i = 0; i < MAX_DIES; i++) 3987 flexonenand_set_boundary(mtd, i, flex_bdry[2 * i], 3988 flex_bdry[(2 * i) + 1]); 3989 3990 return 0; 3991} 3992 3993/** 3994 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device 3995 * @mtd: MTD device structure 3996 */ 3997void onenand_release(struct mtd_info *mtd) 3998{ 3999 struct onenand_chip *this = mtd->priv; 4000 4001 /* Deregister partitions */ 4002 mtd_device_unregister(mtd); 4003 4004 /* Free bad block table memory, if allocated */ 4005 if (this->bbm) { 4006 struct bbm_info *bbm = this->bbm; 4007 kfree(bbm->bbt); 4008 kfree(this->bbm); 4009 } 4010 /* Buffers allocated by onenand_scan */ 4011 if (this->options & ONENAND_PAGEBUF_ALLOC) { 4012 kfree(this->page_buf); 4013#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE 4014 kfree(this->verify_buf); 4015#endif 4016 } 4017 if (this->options & ONENAND_OOBBUF_ALLOC) 4018 kfree(this->oob_buf); 4019 kfree(mtd->eraseregions); 4020} 4021 4022EXPORT_SYMBOL_GPL(onenand_scan); 4023EXPORT_SYMBOL_GPL(onenand_release); 4024 4025MODULE_LICENSE("GPL"); 4026MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>"); 4027MODULE_DESCRIPTION("Generic OneNAND flash driver code"); 4028