1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * OpenFirmware helpers for memory drivers
4 *
5 * Copyright (C) 2012 Texas Instruments, Inc.
6 * Copyright (C) 2019 Samsung Electronics Co., Ltd.
7 * Copyright (C) 2020 Krzysztof Kozlowski <krzk@kernel.org>
8 */
9
10#include <linux/device.h>
11#include <linux/of.h>
12#include <linux/gfp.h>
13#include <linux/export.h>
14
15#include "jedec_ddr.h"
16#include "of_memory.h"
17
18/**
19 * of_get_min_tck() - extract min timing values for ddr
20 * @np: pointer to ddr device tree node
21 * @dev: device requesting for min timing values
22 *
23 * Populates the lpddr2_min_tck structure by extracting data
24 * from device tree node. Returns a pointer to the populated
25 * structure. If any error in populating the structure, returns
26 * default min timings provided by JEDEC.
27 */
28const struct lpddr2_min_tck *of_get_min_tck(struct device_node *np,
29					    struct device *dev)
30{
31	int			ret = 0;
32	struct lpddr2_min_tck	*min;
33
34	min = devm_kzalloc(dev, sizeof(*min), GFP_KERNEL);
35	if (!min)
36		goto default_min_tck;
37
38	ret |= of_property_read_u32(np, "tRPab-min-tck", &min->tRPab);
39	ret |= of_property_read_u32(np, "tRCD-min-tck", &min->tRCD);
40	ret |= of_property_read_u32(np, "tWR-min-tck", &min->tWR);
41	ret |= of_property_read_u32(np, "tRASmin-min-tck", &min->tRASmin);
42	ret |= of_property_read_u32(np, "tRRD-min-tck", &min->tRRD);
43	ret |= of_property_read_u32(np, "tWTR-min-tck", &min->tWTR);
44	ret |= of_property_read_u32(np, "tXP-min-tck", &min->tXP);
45	ret |= of_property_read_u32(np, "tRTP-min-tck", &min->tRTP);
46	ret |= of_property_read_u32(np, "tCKE-min-tck", &min->tCKE);
47	ret |= of_property_read_u32(np, "tCKESR-min-tck", &min->tCKESR);
48	ret |= of_property_read_u32(np, "tFAW-min-tck", &min->tFAW);
49
50	if (ret) {
51		devm_kfree(dev, min);
52		goto default_min_tck;
53	}
54
55	return min;
56
57default_min_tck:
58	dev_warn(dev, "Using default min-tck values\n");
59	return &lpddr2_jedec_min_tck;
60}
61EXPORT_SYMBOL(of_get_min_tck);
62
63static int of_do_get_timings(struct device_node *np,
64			     struct lpddr2_timings *tim)
65{
66	int ret;
67
68	ret = of_property_read_u32(np, "max-freq", &tim->max_freq);
69	ret |= of_property_read_u32(np, "min-freq", &tim->min_freq);
70	ret |= of_property_read_u32(np, "tRPab", &tim->tRPab);
71	ret |= of_property_read_u32(np, "tRCD", &tim->tRCD);
72	ret |= of_property_read_u32(np, "tWR", &tim->tWR);
73	ret |= of_property_read_u32(np, "tRAS-min", &tim->tRAS_min);
74	ret |= of_property_read_u32(np, "tRRD", &tim->tRRD);
75	ret |= of_property_read_u32(np, "tWTR", &tim->tWTR);
76	ret |= of_property_read_u32(np, "tXP", &tim->tXP);
77	ret |= of_property_read_u32(np, "tRTP", &tim->tRTP);
78	ret |= of_property_read_u32(np, "tCKESR", &tim->tCKESR);
79	ret |= of_property_read_u32(np, "tDQSCK-max", &tim->tDQSCK_max);
80	ret |= of_property_read_u32(np, "tFAW", &tim->tFAW);
81	ret |= of_property_read_u32(np, "tZQCS", &tim->tZQCS);
82	ret |= of_property_read_u32(np, "tZQCL", &tim->tZQCL);
83	ret |= of_property_read_u32(np, "tZQinit", &tim->tZQinit);
84	ret |= of_property_read_u32(np, "tRAS-max-ns", &tim->tRAS_max_ns);
85	ret |= of_property_read_u32(np, "tDQSCK-max-derated",
86				    &tim->tDQSCK_max_derated);
87
88	return ret;
89}
90
91/**
92 * of_get_ddr_timings() - extracts the ddr timings and updates no of
93 * frequencies available.
94 * @np_ddr: Pointer to ddr device tree node
95 * @dev: Device requesting for ddr timings
96 * @device_type: Type of ddr(LPDDR2 S2/S4)
97 * @nr_frequencies: No of frequencies available for ddr
98 * (updated by this function)
99 *
100 * Populates lpddr2_timings structure by extracting data from device
101 * tree node. Returns pointer to populated structure. If any error
102 * while populating, returns default timings provided by JEDEC.
103 */
104const struct lpddr2_timings *of_get_ddr_timings(struct device_node *np_ddr,
105						struct device *dev,
106						u32 device_type,
107						u32 *nr_frequencies)
108{
109	struct lpddr2_timings	*timings = NULL;
110	u32			arr_sz = 0, i = 0;
111	struct device_node	*np_tim;
112	char			*tim_compat = NULL;
113
114	switch (device_type) {
115	case DDR_TYPE_LPDDR2_S2:
116	case DDR_TYPE_LPDDR2_S4:
117		tim_compat = "jedec,lpddr2-timings";
118		break;
119	default:
120		dev_warn(dev, "Unsupported memory type\n");
121	}
122
123	for_each_child_of_node(np_ddr, np_tim)
124		if (of_device_is_compatible(np_tim, tim_compat))
125			arr_sz++;
126
127	if (arr_sz)
128		timings = devm_kcalloc(dev, arr_sz, sizeof(*timings),
129				       GFP_KERNEL);
130
131	if (!timings)
132		goto default_timings;
133
134	for_each_child_of_node(np_ddr, np_tim) {
135		if (of_device_is_compatible(np_tim, tim_compat)) {
136			if (of_do_get_timings(np_tim, &timings[i])) {
137				of_node_put(np_tim);
138				devm_kfree(dev, timings);
139				goto default_timings;
140			}
141			i++;
142		}
143	}
144
145	*nr_frequencies = arr_sz;
146
147	return timings;
148
149default_timings:
150	dev_warn(dev, "Using default memory timings\n");
151	*nr_frequencies = ARRAY_SIZE(lpddr2_jedec_timings);
152	return lpddr2_jedec_timings;
153}
154EXPORT_SYMBOL(of_get_ddr_timings);
155
156/**
157 * of_lpddr3_get_min_tck() - extract min timing values for lpddr3
158 * @np: pointer to ddr device tree node
159 * @dev: device requesting for min timing values
160 *
161 * Populates the lpddr3_min_tck structure by extracting data
162 * from device tree node. Returns a pointer to the populated
163 * structure. If any error in populating the structure, returns NULL.
164 */
165const struct lpddr3_min_tck *of_lpddr3_get_min_tck(struct device_node *np,
166						   struct device *dev)
167{
168	int			ret = 0;
169	struct lpddr3_min_tck	*min;
170
171	min = devm_kzalloc(dev, sizeof(*min), GFP_KERNEL);
172	if (!min)
173		goto default_min_tck;
174
175	ret |= of_property_read_u32(np, "tRFC-min-tck", &min->tRFC);
176	ret |= of_property_read_u32(np, "tRRD-min-tck", &min->tRRD);
177	ret |= of_property_read_u32(np, "tRPab-min-tck", &min->tRPab);
178	ret |= of_property_read_u32(np, "tRPpb-min-tck", &min->tRPpb);
179	ret |= of_property_read_u32(np, "tRCD-min-tck", &min->tRCD);
180	ret |= of_property_read_u32(np, "tRC-min-tck", &min->tRC);
181	ret |= of_property_read_u32(np, "tRAS-min-tck", &min->tRAS);
182	ret |= of_property_read_u32(np, "tWTR-min-tck", &min->tWTR);
183	ret |= of_property_read_u32(np, "tWR-min-tck", &min->tWR);
184	ret |= of_property_read_u32(np, "tRTP-min-tck", &min->tRTP);
185	ret |= of_property_read_u32(np, "tW2W-C2C-min-tck", &min->tW2W_C2C);
186	ret |= of_property_read_u32(np, "tR2R-C2C-min-tck", &min->tR2R_C2C);
187	ret |= of_property_read_u32(np, "tWL-min-tck", &min->tWL);
188	ret |= of_property_read_u32(np, "tDQSCK-min-tck", &min->tDQSCK);
189	ret |= of_property_read_u32(np, "tRL-min-tck", &min->tRL);
190	ret |= of_property_read_u32(np, "tFAW-min-tck", &min->tFAW);
191	ret |= of_property_read_u32(np, "tXSR-min-tck", &min->tXSR);
192	ret |= of_property_read_u32(np, "tXP-min-tck", &min->tXP);
193	ret |= of_property_read_u32(np, "tCKE-min-tck", &min->tCKE);
194	ret |= of_property_read_u32(np, "tCKESR-min-tck", &min->tCKESR);
195	ret |= of_property_read_u32(np, "tMRD-min-tck", &min->tMRD);
196
197	if (ret) {
198		dev_warn(dev, "Errors while parsing min-tck values\n");
199		devm_kfree(dev, min);
200		goto default_min_tck;
201	}
202
203	return min;
204
205default_min_tck:
206	dev_warn(dev, "Using default min-tck values\n");
207	return NULL;
208}
209EXPORT_SYMBOL(of_lpddr3_get_min_tck);
210
211static int of_lpddr3_do_get_timings(struct device_node *np,
212				    struct lpddr3_timings *tim)
213{
214	int ret;
215
216	ret = of_property_read_u32(np, "max-freq", &tim->max_freq);
217	if (ret)
218		/* Deprecated way of passing max-freq as 'reg' */
219		ret = of_property_read_u32(np, "reg", &tim->max_freq);
220	ret |= of_property_read_u32(np, "min-freq", &tim->min_freq);
221	ret |= of_property_read_u32(np, "tRFC", &tim->tRFC);
222	ret |= of_property_read_u32(np, "tRRD", &tim->tRRD);
223	ret |= of_property_read_u32(np, "tRPab", &tim->tRPab);
224	ret |= of_property_read_u32(np, "tRPpb", &tim->tRPpb);
225	ret |= of_property_read_u32(np, "tRCD", &tim->tRCD);
226	ret |= of_property_read_u32(np, "tRC", &tim->tRC);
227	ret |= of_property_read_u32(np, "tRAS", &tim->tRAS);
228	ret |= of_property_read_u32(np, "tWTR", &tim->tWTR);
229	ret |= of_property_read_u32(np, "tWR", &tim->tWR);
230	ret |= of_property_read_u32(np, "tRTP", &tim->tRTP);
231	ret |= of_property_read_u32(np, "tW2W-C2C", &tim->tW2W_C2C);
232	ret |= of_property_read_u32(np, "tR2R-C2C", &tim->tR2R_C2C);
233	ret |= of_property_read_u32(np, "tFAW", &tim->tFAW);
234	ret |= of_property_read_u32(np, "tXSR", &tim->tXSR);
235	ret |= of_property_read_u32(np, "tXP", &tim->tXP);
236	ret |= of_property_read_u32(np, "tCKE", &tim->tCKE);
237	ret |= of_property_read_u32(np, "tCKESR", &tim->tCKESR);
238	ret |= of_property_read_u32(np, "tMRD", &tim->tMRD);
239
240	return ret;
241}
242
243/**
244 * of_lpddr3_get_ddr_timings() - extracts the lpddr3 timings and updates no of
245 * frequencies available.
246 * @np_ddr: Pointer to ddr device tree node
247 * @dev: Device requesting for ddr timings
248 * @device_type: Type of ddr
249 * @nr_frequencies: No of frequencies available for ddr
250 * (updated by this function)
251 *
252 * Populates lpddr3_timings structure by extracting data from device
253 * tree node. Returns pointer to populated structure. If any error
254 * while populating, returns NULL.
255 */
256const struct lpddr3_timings
257*of_lpddr3_get_ddr_timings(struct device_node *np_ddr, struct device *dev,
258			   u32 device_type, u32 *nr_frequencies)
259{
260	struct lpddr3_timings	*timings = NULL;
261	u32			arr_sz = 0, i = 0;
262	struct device_node	*np_tim;
263	char			*tim_compat = NULL;
264
265	switch (device_type) {
266	case DDR_TYPE_LPDDR3:
267		tim_compat = "jedec,lpddr3-timings";
268		break;
269	default:
270		dev_warn(dev, "Unsupported memory type\n");
271	}
272
273	for_each_child_of_node(np_ddr, np_tim)
274		if (of_device_is_compatible(np_tim, tim_compat))
275			arr_sz++;
276
277	if (arr_sz)
278		timings = devm_kcalloc(dev, arr_sz, sizeof(*timings),
279				       GFP_KERNEL);
280
281	if (!timings)
282		goto default_timings;
283
284	for_each_child_of_node(np_ddr, np_tim) {
285		if (of_device_is_compatible(np_tim, tim_compat)) {
286			if (of_lpddr3_do_get_timings(np_tim, &timings[i])) {
287				devm_kfree(dev, timings);
288				of_node_put(np_tim);
289				goto default_timings;
290			}
291			i++;
292		}
293	}
294
295	*nr_frequencies = arr_sz;
296
297	return timings;
298
299default_timings:
300	dev_warn(dev, "Failed to get timings\n");
301	*nr_frequencies = 0;
302	return NULL;
303}
304EXPORT_SYMBOL(of_lpddr3_get_ddr_timings);
305
306/**
307 * of_lpddr2_get_info() - extracts information about the lpddr2 chip.
308 * @np: Pointer to device tree node containing lpddr2 info
309 * @dev: Device requesting info
310 *
311 * Populates lpddr2_info structure by extracting data from device
312 * tree node. Returns pointer to populated structure. If error
313 * happened while populating, returns NULL. If property is missing
314 * in a device-tree, then the corresponding value is set to -ENOENT.
315 */
316const struct lpddr2_info
317*of_lpddr2_get_info(struct device_node *np, struct device *dev)
318{
319	struct lpddr2_info *ret_info, info = {};
320	struct property *prop;
321	const char *cp;
322	int err;
323	u32 revision_id[2];
324
325	err = of_property_read_u32_array(np, "revision-id", revision_id, 2);
326	if (!err) {
327		info.revision_id1 = revision_id[0];
328		info.revision_id2 = revision_id[1];
329	} else {
330		err = of_property_read_u32(np, "revision-id1", &info.revision_id1);
331		if (err)
332			info.revision_id1 = -ENOENT;
333
334		err = of_property_read_u32(np, "revision-id2", &info.revision_id2);
335		if (err)
336			info.revision_id2 = -ENOENT;
337	}
338
339	err = of_property_read_u32(np, "io-width", &info.io_width);
340	if (err)
341		return NULL;
342
343	info.io_width = 32 / info.io_width - 1;
344
345	err = of_property_read_u32(np, "density", &info.density);
346	if (err)
347		return NULL;
348
349	info.density = ffs(info.density) - 7;
350
351	if (of_device_is_compatible(np, "jedec,lpddr2-s4"))
352		info.arch_type = LPDDR2_TYPE_S4;
353	else if (of_device_is_compatible(np, "jedec,lpddr2-s2"))
354		info.arch_type = LPDDR2_TYPE_S2;
355	else if (of_device_is_compatible(np, "jedec,lpddr2-nvm"))
356		info.arch_type = LPDDR2_TYPE_NVM;
357	else
358		return NULL;
359
360	prop = of_find_property(np, "compatible", NULL);
361	for (cp = of_prop_next_string(prop, NULL); cp;
362	     cp = of_prop_next_string(prop, cp)) {
363
364#define OF_LPDDR2_VENDOR_CMP(compat, ID) \
365		if (!of_compat_cmp(cp, compat ",", strlen(compat ","))) { \
366			info.manufacturer_id = LPDDR2_MANID_##ID; \
367			break; \
368		}
369
370		OF_LPDDR2_VENDOR_CMP("samsung", SAMSUNG)
371		OF_LPDDR2_VENDOR_CMP("qimonda", QIMONDA)
372		OF_LPDDR2_VENDOR_CMP("elpida", ELPIDA)
373		OF_LPDDR2_VENDOR_CMP("etron", ETRON)
374		OF_LPDDR2_VENDOR_CMP("nanya", NANYA)
375		OF_LPDDR2_VENDOR_CMP("hynix", HYNIX)
376		OF_LPDDR2_VENDOR_CMP("mosel", MOSEL)
377		OF_LPDDR2_VENDOR_CMP("winbond", WINBOND)
378		OF_LPDDR2_VENDOR_CMP("esmt", ESMT)
379		OF_LPDDR2_VENDOR_CMP("spansion", SPANSION)
380		OF_LPDDR2_VENDOR_CMP("sst", SST)
381		OF_LPDDR2_VENDOR_CMP("zmos", ZMOS)
382		OF_LPDDR2_VENDOR_CMP("intel", INTEL)
383		OF_LPDDR2_VENDOR_CMP("numonyx", NUMONYX)
384		OF_LPDDR2_VENDOR_CMP("micron", MICRON)
385
386#undef OF_LPDDR2_VENDOR_CMP
387	}
388
389	if (!info.manufacturer_id)
390		info.manufacturer_id = -ENOENT;
391
392	ret_info = devm_kzalloc(dev, sizeof(*ret_info), GFP_KERNEL);
393	if (ret_info)
394		*ret_info = info;
395
396	return ret_info;
397}
398EXPORT_SYMBOL(of_lpddr2_get_info);
399